Abstract: A method of fabricating an image TFT array of a direct X-ray image sensor includes forming a first transparent conductive layer on a substrate; forming a gate line including a gate electrode, a common line, and a common electrode jutting out from the common line; forming an insulation layer; forming a semiconducting island on the insulation layer in the transistor region; forming a first via hole for the common electrode; forming a data line and a source electrode and a drain electrode; forming a passivation layer and a second via hole penetrating the passivation layer for the source electrode; forming a second transparent conductive layer as a top electrode. The insulation layer is formed on the first transparent conductive layer to serve as a dielectric layer of a capacitor before the TFT structure formed and can be formed at a relatively high temperature.

Abstract: Light sensors in an imager having sloped features including, but not limited to, hemispherical, v-shaped, or other sloped shapes. Light sensors having such a sloped feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for absorption there.

Abstract: A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

Abstract: A pixel and imager device, and method of forming the same, where the pixel has a transfer transistor gate associated with a photoconversion device and is isolated in a substrate by shallow trench isolation. The transfer transistor gate does not overlap the shallow trench isolation region.

Abstract: A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film and a wiring film, the multilayer film being disposed on a second surface of the substrate opposite to the first surface, and a transmission-preventing film disposed at least between the wiring film in the multilayer film and the substrate.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.

Abstract: An invention relates to an organic electroluminescent display. The organic electroluminescent display comprises a substrate, a bonding pad, and an FPC (Flexible Print Circuit). The substrate comprises a luminescent surface and a non-luminescent surface. An organic electroluminescent (EL) structure is disposed on the non-luminescent surface to provide the organic EL structure to electrically connect to an outer circuit. The FPC, disposed on the same side of the organic electroluminescent structure, comprises a junction portion and a main portion, in which the main portion connects to the junction portion and electrically connects to the outer circuit. The junction portion is adapted to connect to the bonding pad and the main portion is directly extended to the direction toward the organic electroluminescent structure.

Abstract: A conventionally followed technique of manufacturing a liquid crystal display device is a method for forming various types of coatings over an entire surface of a substrate and for removing the coatings with a small region left by etching, which requires wasting a material cost and treating a large quantity of waste. A liquid crystal display device is manufactured by forming at least one or more of patterns necessary for manufacturing a liquid crystal display device by a method capable of selectively forming a pattern. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition prepared for a specific purpose is employed as the method capable of selectively forming a pattern.

Abstract: A CMOS image sensor includes a semiconductor substrate; a pinned photodiode formed in a light-sensing region of the semiconductor substrate, the pinned photodiode comprising a charge-accumulating diffusion region and a surface pinning diffusion region overlying the charge-accumulating diffusion region; a transfer transistor, wherein the transfer transistor has a transfer gate comprising a protruding first gate segment with a first gate dimension and a second gate segment with a second gate dimension that is smaller than the first gate dimension. A first overlapping portion between the protruding first gate segment and the charge-accumulating diffusion region is greater than a second overlapping portion between the second gate segment and the charge-accumulating diffusion region.

Abstract: Active devices in a thin film diode (TFD) liquid crystal display (LCD) panel used to control liquid crystal are formed by a metal layer, a transparent conductive layer, and an insulating layer sequentially on a substrate, wherein the metal layer is used as transmitting signal and the transparent conductive layer is used as bottom metal layer of metal-insulator-metal (MIM) thin film diode. The metal layer, the transparent conductive layer, and the insulating layer are defined with desired patterns. Further, a dielectric layer is formed over the substrate, metal layer, the transparent conductive layer, and the insulating layer, and defined to form the locations of electrode terminal and MIM thin film diode by using lithographic process. Next, another transparent conductive layer is formed on the dielectric layer and defined to form a pixel electrode and top metal layer of the MIM thin film diode by using lithographic process.

Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.

Abstract: Thin-film transistors constituting a liquid crystal module have a channel forming region that is a crystal structural body in which a plurality of rod-like or flat-rod-like crystals are arranged in a particular direction. In the thin-film transistors, deteriorations in device characteristics due to hot carrier injection or the like can be prevented effectively when the temperature is in a range of 80° C.-250° C. (preferably 100° C.-200° C.). Therefore, a projection TV that is very high in reliability can be realized.

Abstract: Methods, devices, and systems for an image sensor device are disclosed. An image sensor device comprises an array of image pixels wherein each pixel is configured for sensing light incident on the pixel. An image sensor device may further comprise a ground contact shared between at least two image pixels of the plurality. The ground contacts may be provided in an even pattern, a random pattern, or a repeating random pattern across the array. The image sensor device may further include an array of shared pixel structures comprising a plurality of pixels, wherein a ground contact may be evenly or randomly placed within each pixel structure across the array of pixel structures.

Abstract: A pixel comprises a substrate comprising a first well region formed in a top portion of the substrate, having a first conductivity type. A plurality of shallow trench isolation (STI) structures is formed in the first well region of the substrate, defining a pixel region over the substrate. A second well region is formed in a potion of the first well region of the pixel region, having a second conductivity type opposite to the first conductivity type. A top surface region is formed in a top portion of the second well region, having the first conductivity type. A MOS transistor formed on portions the pixel region, having a pair of source/drain regions formed in the first well region, wherein the source/drain regions are formed of the second conductivity type and one thereof electrically connects the first and well doping regions and the first well region is formed with a depth greater than that of the adjacent STI structure.

Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.

Abstract: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.

Abstract: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding electrode electrically isolated from the data line, covering the data line at least in part, and having an aperture exposing the data line.

Abstract: A method forms a plurality of pillars, the pillars arranged such that positions of the pillars control flow of a liquid, the plurality of pillars forming a fluidic template, the method dispenses the liquid into the fluidic template such that the liquid assumes a shape corresponding to the fluidic template, and dries the liquid to form at least a portion of a patterned structure. Another method forms a multi-layer printed structure by forming a plurality of pillars, the pillars arranged such that positions of the pillars control flow of a liquid, the plurality of pillars forming a fluidic template, dispensing a first liquid into a first region containing the pillars such that liquid spreads only in the first region, dispensing a second liquid into a second region such that liquid spreads in the second region and partially into the first region, forming an overlap region, an extent of the overlap region controlled by the positions of the pillars.

Abstract: An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

Abstract: A dopant gradient region of a first conductivity type and a corresponding channel impurity gradient below a transfer gate and adjacent a charge collection region of a CMOS imager photodiode are disclosed. The channel impurity gradient in the transfer gate provides a complete charge transfer between the charge collection region of the photodiode and a floating diffusion node. The dopant gradient region is formed by doping a region at one end of the channel with a low enhancement dopant and another region at the other end of the channel with a high enhancement dopant.

Abstract: Exemplary embodiments of the present invention include an electro-optical device including storage capacitors having excellent breakdown-voltage performance to function properly. Exemplary embodiments further include an electro-optical device including data lines, scanning lines, thin film transistors, and pixel electrodes formed on a substrate. The electro-optical device also includes storage capacitors composed of first electrodes electrically connected to the thin film transistors and the pixel electrodes, second electrodes that are arranged to face the first electrodes, and dielectric films arranged between the first electrodes and the second electrodes, and oxidation films obtained by oxidizing part or all of the surfaces of at least one of the first electrodes and the second electrodes.

Abstract: An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

Abstract: An imager having a photodiode with a shallow doping profile with respect to the top surface of a substrate is disclosed. An imager with a graded pinned surface layer, self-aligned to a gate stack is provided. A photodiode with a shallow doping profile with respect to the top surface of a substrate and a graded pinned surface layer, self-aligned to a gate stack is provided. These photodiodes exhibit reduced image lag, transfer gate leakage, and photodiode dark current generation.

Abstract: The invention discloses a display panel. A substrate comprising a chip bonding region and a cut cross-section is provided. A first conductive layer is disposed on the chip bonding region. An insulating layer is disposed on the substrate between the first conductive layer and the cut cross-section, covering a sidewall of the first conductive layer. A second conductive layer is disposed on the insulating layer extending until the cut cross-section and electrically connected to the first conductive layer.

Abstract: In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is displayed in the pixel area. A first signal electrode is disposed in a circuit area. A first insulating layer includes an opening, through which the first signal electrode is exposed. A second signal electrode is disposed on the first insulating layer in the circuit area, and spaced apart from the first signal electrode. A second insulating layer is disposed on the first insulating layer, and includes a contact hole, through which the first and second signal electrodes are exposed. A conductive layer electrically connects the first signal electrode to the second signal electrode. Therefore, a manufacturing process is simplified so that a yield of the lower substrate is increased.

Abstract: A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6a; a step of forming a dummy protection insulation film 6c corresponding to the photodiode protection insulation film 6a both in the peripheral circuit region 1b and the scribe lane region 1c; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1a in which pixels and the photodiode protection insulation film 6a are formed, a peripheral circuit region 1b in which a driving circuit and the dummy protection insulation film 6c are formed, and a scribe lane region 1c in which the dummy protection insulation film 6c is formed, wherein the dummy protection insulation film 6c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1b and the scribe lane region 1c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1a, be

Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.

Abstract: To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention includes: first and second islands-shaped polycrystalline silicon (p-Si) layers provided above an insulating substrate and having relatively large grain sizes; a third islands-shaped p-Si layer having relatively small grain sizes; a first gate insulating film provided on the first p-Si layer and having a first thickness; second and third gate insulating films provided on the second and third p-Si layers having second and third thicknesses which are not less than the first thickness; gate electrodes provided on the gate insulating films; n-type high-concentration source/drain regions formed by adding an n-type impurity to a high concentration outside channel regions; and second and third n-type low-concentration-source/drain regions provided between the channel regions and the n-type high-concentration source/drain regi

Abstract: An organic electroluminescent device, includes: a first substrate including a first pixel region, the first pixel region including first, second and third sub-pixel regions; an array element layer on an inner surface of the first substrate, the array element layer including a thin film transistor in each sub-pixel region; a second substrate facing the first substrate and being spaced apart from the first substrate, the second substrate including a second pixel region corresponding to the first pixel region, and the second pixel region including fourth, fifth and sixth sub-pixel regions; an organic electroluminescent diode on an inner surface of the second substrate in each sub-pixel region; and a connection electrode electrically connecting the first substrate to the second substrates, wherein the fourth, fifth and sixth sub-pixel regions have different sizes from each other.

Abstract: A photoelectric-conversion apparatus includes a photoelectric-conversion area where a plurality of photoelectric-conversion elements configured to convert incident light into electrical charges, a plurality of floating-diffusion areas, a plurality of transfer-MOS transistors configured to transfer electrical charges of the photoelectric-conversion element to the floating-diffusion area, and a plurality of amplification-MOS transistors configured to read and transmit a signal generated based on the transferred electrical charges to an output line are provided. An antireflection film is provided on a light-receiving surface of the photoelectric-conversion element. The gate of the amplification-MOS transistor is electrically connected to one floating-diffusion area by providing one conductor in a single contact hole, and the anti-reflection film covers the photoelectric-conversion area except a base part of the contact hole.

Abstract: An active-matrix substrate 30 includes multiple function lines 31, a structure for fixing up the arrangement of the function lines, a first conductive layer 43, a second conductive layer 42, multiple transistors 32 and multiple pixel electrodes 33. Each of the function lines 31 includes: a core 36, at least the surface of which has electrical conductivity; an insulating layer 37 that covers the surface of the core; and a semiconductor layer 38 that covers the insulating layer. Some portions of the first and second conductive layers 43 and 42 overlap with the respective semiconductor layers of the function lines but the others not. The transistors 32 are provided so as to have their channel defined as a region 44 in the semiconductor layer by the first and second conductive layers. The pixel electrodes 33 are electrically connected to the first conductive layer 43.

Abstract: A thin film transistor array panel is provided, which includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer covering the gate line, a data line formed on the gate insulating layer, a lower passivation layer covering the data line, an upper passivation layer formed on the lower passivation layer and made of organic insulating material, and a pixel electrode formed on the upper passivation layer. The thicknesses of the gate insulating layer, the lower passivation layer, and the pixel electrode are respectively represented as dG, dP, and dI, the refraction indexes of the gate insulating layer, the passivation layer, and the pixel electrode are respectively represented as nG, nP, and nI, and condition equations are satisfied according to: 4(dGnG+dPnP)=, which is an even multiple of the wavelength; and 4dInI=, which is an even multiple of the wavelength.

Abstract: A highly reliable capacitor, a semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. A capacitor formed of a first conductive film 102, a dielectric 103 made of an insulating material, and a second conductive film 104 is characterized in that a pin hole 106 formed by chance in the dielectric 103 is filled up with an insulating material (filler) 107 made of a resin material. This can prevent short circuit between the first conductive film 102 and the second conductive film 104. The capacitor is used as a storage capacitor provided in a pixel of a semiconductor device.

Abstract: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied to the light-emitting element from the power feeding line. The power feeding line includes a portion interposed between the first electrode and the driving transistor.

Abstract: An organic thin film transistor (“TFT”) substrate for facilitating control of the turn-on and turn-off actions of the TFT. The organic TFT substrate includes a gate line on a substrate, a pixel electrode in the same plane as the gate line, a data line insulated from the gate line, an organic TFT including a gate electrode connected to the gate line, a source electrode connected to the data line and insulated from the gate line, a drain electrode connected to the pixel electrode and insulated from the gate electrode, and an organic semiconductor layer contacting each of the source and drain electrodes, and a gate-insulating layer on the gate line and the gate electrode.

Abstract: A plurality of gate lines are formed on a substrate. After depositing a gate insulating layer, a semiconductor layer and a doped amorphous silicon layer are sequentially formed thereon. A lower insulating layer made of silicon nitride and an upper insulating layer made of a photosensitive organic material are deposited thereon after forming data lines and drain electrodes. The upper insulating layer is patterned to form an unevenness pattern on its surface and contact holes on the drain electrodes. The lower insulating layer is patterned together with the gate insulating layer using a photoresist pattern having apertures located in the contact holes to form other contact holes respectively exposing the drain electrodes, portions of the gate lines, and portions of the data lines.

Abstract: Semiconductor layers for serving as active layers of a plurality of thin film transistors in a pixel are arranged in the same direction and irradiated with laser light with the scanning direction matched to the channel length direction of the semiconductor layers. It is possible to coincide the crystal growth direction with the carrier moving direction, and high field effect mobility can be obtained. Also, semiconductor layers for serving as active layers of a plurality of thin film transistors in a driving circuit and in a CPU are arranged in the same direction, and are irradiated with laser light with the scanning direction matched to the channel length direction of the semiconductor layers.

Abstract: The corrosion of aluminum-based metal films may be minimized by applying a lactate-containing solution to the aluminum-based metal films before the aluminum-based metal films are etched. The lactate-containing solution is applied to the aluminum-based metal film before the film is etched with a corrosive etchant. Minimizing the corrosion of the aluminum-based film may increase the yield and performance of the highly reflective pixel arrays that are formed from the aluminum-based metal for use in liquid crystal on silicon (LCOS) microprocessors for digital televisions.

Abstract: An LCD panel includes a plurality of gate lines and gate electrodes formed on a substrate and a gate insulating film formed on the substrate including the gate lines and the gate electrodes. A semiconductor film is formed in a region on the gate insulating film and an ohmic contact film formed on the semiconductor film. A plurality of data lines cross the gate lines; a source electrode is formed on the ohmic contact film; and a pixel electrode is formed in a pixel region defined by the gate and data lines. A drain electrode is formed on the ohmic contact film, and has an uneven width. Since a portion of drain electrode that overlaps with the gate electrode has a smaller width than a width of other portions of the drain electrode, variation in an area of the drain electrode overlapped with the gate electrode is small, so that variation of the parasitic capacitance can be reduced, thereby improving picture quality.

Abstract: A method for processing a scratched surface of a material that is transparent to electromagnetic radiation includes a step of depositing onto the scratched surface at least one layer of a polymer material having substantially the same optical index as the material having the scratched surface, so as to fill in the scratches, and a step of polymerizing the polymer material. The method may be applied to the manufacture of semiconductor wafers including imagers.

Abstract: There are provided a TFT substrate for an LCD apparatus and a method of manufacturing the same. A substrate (10), a diffusion barrier layer (11) and a copper alloy layer (12) are formed on the TFT substrate, consecutively. The copper alloy includes a material from about 0.5 at % to about 15 at % to form a gate wiring layer. The material is used to form the diffusion barrier layer (11). A compound that comprises a material such as Zr, Ti, Hf, V, Ta, Ni, Cr, Nb, Co, Mn, Mo, W, Rh, Pd, Pt, etc. is deposited on the diffusion barrier layer (11) to a thickness from about 50 ? to about 5,000 ?. The deposited compound is then heat treated to convert the deposited compound into a silicide compound (11b). The transistor substrate has low resistance and high conductance. Also, etching process is simplified, and a mutual diffusion is prevented by means of the thin diffusion barrier layer.

Abstract: A thin film transistor array panel includes a substrate with a plurality of gate lines and data lines crossing each other, wherein the gate lines and the data lines define pixel groups each including a plurality of pixels, and a plurality of thin film transistors are connected to the gate lines and the data lines and include an organic semiconductor, wherein the thin film transistors from adjacent pixels of different pixel groups are disposed proximate to one another.

Abstract: A method of manufacturing a pixel structure is provided. A gate, a scan line, and at least one first auxiliary pattern are formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate and the scan line and expose the first auxiliary pattern and a part of the scan line. A channel layer is formed on the gate insulating layer over the gate. A source, a drain, a data line, a top electrode, and at least one second auxiliary pattern are formed, wherein the data line is electrically connected to the exposed first auxiliary pattern and the second auxiliary pattern is electrically connected to the exposed scan line. A passivation layer and a pixel electrode are formed, and the pixel electrode is electrically connected to the drain and the top electrode.

Abstract: A liquid crystal display includes first pixels and second pixels, a plurality of gate lines to transmit gate signals, and a plurality of pairs of first and second data lines crossing the gate lines, the pairs of first data lines and second data lines facing each other with a pixel interposed there between. Each of the first pixels and the second pixels includes pixel electrode and each pixel electrode includes a first sub-pixel electrode and a second sub-pixel electrode. A first drain is electrode disposed on the right of the first data line, and a second drain electrode is disposed on the left of the second data line. The first drain electrode is connected to the first sub-pixel electrode while the second drain electrode is connected to the second sub-pixel electrode in the first pixels, and the first drain electrode is connected to the second sub-pixel electrode while the second drain electrode is connected to the first sub-pixel electrode in the second pixels.

Abstract: A flat panel display device has a transistor in which cross-talk is minimized. The flat panel display device includes a substrate, a first gate electrode formed on the substrate, a first electrode insulated from the first gate electrode, a second electrode insulated from the first gate electrode and surrounding the first electrode in the same plane, a semiconductor layer insulated from the first gate electrode and contacting the first electrode and the second electrode, and a display element including a pixel electrode electrically connected to one of the first electrode and the second electrode.

Abstract: The invention in one of the embodiments refers to a method for forming an integrated memory device, the method including a forming a plurality of bitlines, wherein forming the plurality of bitlines includes forming diffusion lines in a substrate, forming an electrically conductive silicidation barrier layer on a substrate surface exposed, and depositing a conductive layer comprising a metal on the silicidation barrier layer.

Abstract: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film transistor and a pixel electrode. The thin film transistor has a gate electrode, a source electrode and a drain electrode. The gate electrode, the source electrode and the drain electrode are connected electrically to a scan line, a data line and the pixel electrode respectively. A portion of the pixel electrode is located above the data line. Next, a repairing portion is formed at the space between the data line and the pixel electrode. The repairing portion is utilized to electrically connect the pixel electrode and the data line.

Abstract: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film transistor and a pixel electrode. The thin film transistor has a gate electrode, a source electrode and a drain electrode. The gate electrode, the source electrode and the drain electrode are connected electrically to a scan line, a data line and the pixel electrode respectively. A portion of the pixel electrode is located above the scan line. Next, a repairing portion is formed at the space between the scan line and the pixel electrode. The repairing portion is utilized to electrically connect the pixel electrode and the scan line.

Abstract: A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.

Abstract: A method for fabricating a solid state imaging device comprising photoelectric conversion sections and charge transfer sections having single-layered charge transfer electrodes for transferring charges generated in the photoelectric conversion sections, the method including formation of the charge transfer electrodes, wherein the formation of the charge transfer electrodes comprises the steps of: forming a conductive film on a surface of a semiconductor substrate having formed thereon a gate oxide film; forming a mask pattern on the conductive film; forming interelectrode spacings in the conductive film using the mask pattern as a mask to make a patterned conductive film; and forming an insulating film to fill in the interelectrode spacings by vacuum chemical vapor deposition.