Abstract: A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component also includes a control electrode (540, 1240) in the trench. The semiconductor component further includes a channel region (120) in the semiconductor layer and adjacent to the trench. The semiconductor component still further includes a region (755) in the semiconductor layer. The region has a conductivity type different from that of the portion of the semiconductor layer. The region also has a charge density balancing the charge density of the portion of the semiconductor layer.

Abstract: A semiconductor device that suppresses partial discharging to a semiconductor substrate caused by local concentration of current. The semiconductor device includes a semiconductor substrate, a gate electrode buried in the semiconductor substrate, a conductor buried in the semiconductor substrate further inward from the gate electrode, a wiring layer formed in the semiconductor substrate in connection with the conductor, and an insulation film arranged between the gate electrode and the conductor. The conductor is higher than the surface of the semiconductor substrate.

Abstract: A semiconductor device includes a base layer of a first conductivity type, a barrier layer of a first conductivity type formed on the base layer, a trench formed from the surface of the barrier layer to such a depth as to reach a region in the vicinity of an interface between the barrier layer and the base layer, a gate electrode formed in the trench via a gate insulating film, a contact layer of a second conductivity type selectively formed in a surface portion of the barrier layer, a source layer of the first conductivity type selectively formed in the surface portion of the barrier layer so as to contact the contact layer and a side wall of the gate insulating film in the trench, and a first main electrode formed so as to contact the contact layer and the source layer.

Abstract: An electrostatic discharge (ESD) protection circuit for dissipating an ESD current from a first pad to a second pad during an ESD event. The ESD protection circuit includes a first bipolar transistor having an emitter coupled to the first pad. A second bipolar transistor having a base and a collector coupled to the second pad is used. Zero or more bipolar transistors are sequentially coupled between the first and second bipolar transistors in a base-to-emitter manner. A collector of the first bipolar transistor and the sequentially coupled transistors is connected to a base of a subsequently coupled bipolar transistor for helping to turn on the first, second and sequentially coupled bipolar transistors to provide a current path from the first pad to the second pad during an ESD event.

Abstract: High voltage semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device capable of high-voltage operation, comprising a substrate comprising a first well formed therein. A gate stack is formed overlying the substrate, comprising a gate dielectric layer and a gate electrode formed thereon. A channel well and a second well are formed in portions of the first well. A source region is formed in a portion of the channel well. A drain region is formed in a portion of the second well, wherein the gate dielectric layer comprises a relatively thinner portion at one end of the gate stack adjacent to the source region and a relatively thicker portion at one end of the gate stack adjacent to and directly contacts the drain region.