Pn Homojunction Potential Barrier (epo) Patents (Class 257/E31.057)
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Publication number: 20090321869Abstract: A semiconductor device has a structure including the first semiconductor region 103 which is provided in the first terminal portion 100 and includes the first n-type impurity region 106, the first resistance region 107 provided at an inner periphery portion of the first n-type impurity region 106 in a plane view, and the first p-type impurity region 108 provided at an inner periphery portion of the first resistance region 107 in the plane view, and the second semiconductor region 104 which is provided in the second terminal portion 101 and includes the second p-type impurity region 109, the second resistance region 110 provided at an inner periphery portion of the second p-type impurity region 109 in the plane view, and the second n-type impurity region 111 provided at an inner periphery portion of the second resistance region 110 in the plane view.Type: ApplicationFiled: June 5, 2009Publication date: December 31, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
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Publication number: 20090309036Abstract: Disclosed is a die having photodetectors provided on a first surface thereof. The die includes an insulative shell member, a conductive shell member and a photodetector conductor. The insulative shell member extends around a periphery of the photodetector receptors and extending through a depth of the semiconductor die. The conductive shell member bridges the insulative shell member and extends through the depth of the semiconductor die. The photodetector conductors are provided on the first surface of the semiconductor die and electrically couple respective photodetectors with a corresponding conductive shell member. Also disclosed is a process for making a semiconductor die and an integrated circuit structure.Type: ApplicationFiled: June 12, 2008Publication date: December 17, 2009Applicant: Analog Devices, Inc.Inventors: Shrenik DELIWALA, Michael C. COLN, Alain Valentin GUERY
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Publication number: 20090230498Abstract: An optical semiconductor device includes a semiconductor substrate; a light receiving element formed on the semiconductor substrate; a light absorbing element formed on the semiconductor substrate and located adjacent to the light receiving element; and a semiconductor element formed on the semiconductor substrate and used for signal processing. The light absorbing element includes a fifth semiconductor layer, and a light absorption region in the light receiving element has a different structure from a light absorption region in the light absorbing element.Type: ApplicationFiled: March 4, 2009Publication date: September 17, 2009Inventors: Takaki Iwai, Hironari Takehara, Hisatada Yasukawa
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Publication number: 20090218606Abstract: Embodiments hereof include a photosensing device, comprising an isolation layer; a photodetector layer comprising a plurality of pixels, wherein the photodetector layer is in contact with a first side of the isolation layer, wherein the photodetector layer comprises a laser-processed semiconductor material; and a semiconductor layer disposed on a second side of the isolation layer.Type: ApplicationFiled: March 2, 2009Publication date: September 3, 2009Inventors: Nathaniel J. McCaffrey, James E. Carey, Stephen Saylor
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Patent number: 7579208Abstract: An image sensing device includes a gate dielectric layer formed on a substrate and a transfer gate formed on the gate dielectric layer. A masking layer is formed on the transfer gate, the masking layer having a width smaller than a width of the transfer gate, such that a portion of the transfer gate protrudes laterally from under the masking layer. A photodiode is formed in the substrate to be self-aligned with the masking layer and to extending laterally under the transfer gate, that is, to overlap the transfer gate. Because of the overlap of the photodiode with the transfer gate, offset between the photodiode and the transfer gate is eliminated, such that an image lag phenomenon is eliminated.Type: GrantFiled: January 3, 2007Date of Patent: August 25, 2009Assignee: Samsung Electronics Co., Ltd.Inventor: Young Hoon Park
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Publication number: 20090194836Abstract: An image sensor includes a semiconductor substrate including circuitry, an interlayer dielectric including metal lines arranged on the semiconductor substrate, crystalline photodiode patterns arranged on the interlayer dielectric such that the photodiode patterns are connected to the metal lines, hard mask patterns arranged on the respective photodiode patterns, a device-isolation trench interposed between the adjacent photodiode patterns, to isolate the photodiode patterns from each other, a barrier film implanted with impurity ions, arranged into the inner wall of the device-isolation trench, and a device-isolation insulating layer arranged over the interlayer dielectric including the photodiode pattern and the device-isolation trench.Type: ApplicationFiled: December 27, 2008Publication date: August 6, 2009Inventor: Jong-Man Kim
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Publication number: 20090179293Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a circuitry, a first substrate, a photodiode, a metal interconnection, and an electrical junction region. The circuitry and the metal interconnection may be formed on and/or over the first substrate. The photodiode may contact the metal interconnection and may be formed on and/or over the first substrate. The circuitry may include an electrical junction region on and/or over the first substrate and a first conduction type region on and/or over the electrical junction region and connected to the metal interconnection. According to embodiments, an image sensor and a manufacturing method thereof may provide a vertical integration of circuitry and a photodiode.Type: ApplicationFiled: December 28, 2008Publication date: July 16, 2009Inventors: Hee-Sung Shim, Seoung-Hyun Kim, Joon Hwang, Kwang-Soo Kim, Jin-Su Han
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Publication number: 20090180010Abstract: A method of forming a CMOS active pixel sensor (APS) cell structure having at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.Type: ApplicationFiled: January 14, 2008Publication date: July 16, 2009Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan
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Publication number: 20090174026Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.Type: ApplicationFiled: February 4, 2009Publication date: July 9, 2009Applicant: PRESIDENT AND FELLOWS OF HARVARD COLLEGEInventors: James E. Carey, III, Eric Mazur
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Publication number: 20090166792Abstract: Embodiments relate to an image sensor and a method of forming an image sensor. According to embodiments, an image sensor may include a first substrate and a photodiode. A circuitry including a metal interconnection may be formed on and/or over the first substrate. The photodiode may be formed over a first substrate, and may contact the metal interconnection. The circuitry of the first substrate may include a first transistor, a second transistor, an electrical junction region, and a first conduction type region. The first and second transistors may be formed over the first substrate. According to embodiments, an electrical junction region may be formed between the first transistor and the second transistor. The first conduction type region may be formed at one side of the second transistor, and may be connected to the metal interconnection.Type: ApplicationFiled: December 28, 2008Publication date: July 2, 2009Inventors: Hee-Sung Shim, Seoung-Hyun Kim, Joon Hwang, Kwang-Soo Kim, Jin-Su Han
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Publication number: 20090166789Abstract: An image sensor includes a first substrate and a photodiode. A circuitry including a metal interconnection is formed over the first substrate. The photodiode is formed over a first substrate, and contacts the metal interconnection. The circuitry of the first substrate includes a transistor over the first substrate, an electrical junction region at a side of the transistor, and a first conduction type region. The first conduction type region is connected to the metal interconnection and contacts the electrical junction region.Type: ApplicationFiled: December 28, 2008Publication date: July 2, 2009Inventor: Hee-Sung Shim
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Publication number: 20090166516Abstract: A photoelectric conversion device manufacturing method comprises: a first implantation step of implanting impurity ions of a first conductivity type into an underlying substrate via a region of the oxide film exposed by an opening, thereby forming a first semiconductor region having a first thickness in the element region; an the oxidation step of oxidizing the region of the oxide film exposed by the opening, thereby thickening the exposed region; an the exposure step of exposing a region of the oxide film which is not exposed by the opening; a the second implantation step of, after the exposure step, implanting the impurity ions of the first conductivity type into the underlying substrate via a region unthickened in the oxidation step, thereby forming a second semiconductor region having a second thickness larger than the first thickness in the element isolation region; and an the element formation step.Type: ApplicationFiled: December 22, 2008Publication date: July 2, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Seiichi Tamura, Tetsuya Itano
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Publication number: 20090146238Abstract: A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes arType: ApplicationFiled: August 20, 2008Publication date: June 11, 2009Applicant: Electronics and Telecommunications Research InstituteInventors: Yong Sun Yoon, Kun Sik Park, Jong Moon Park, Bo Woo Kim, Jin Yeong Kang
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Publication number: 20090108385Abstract: A pixel sensor cell includes a substrate of a first conductivity type, and a photoconversion region. The photoconversion region includes a pinning layer of the first conductivity type for receiving incident light of multiple colors, and a diode implant layer of a second conductivity type, disposed below the pinning layer, for accumulating photo-generated charge. Also included is a deep well of the first conductivity type, disposed below the diode implant layer, for rejecting at least one color of the incident light. The deep well includes a doped region, vertically disposed at a predetermined depth below the diode implant layer. The diode implant layer is effective in accumulating photo-generated charge of a blue color, and the deep well is effective in rejecting photo-generated charges of green and red colors from the diode implant layer.Type: ApplicationFiled: October 29, 2007Publication date: April 30, 2009Applicant: Micron Technology, Inc.Inventors: Thomas Edward Dungan, Christopher Silsby, Chintamani Prabhakar Palsule
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Publication number: 20090101919Abstract: A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers.Type: ApplicationFiled: October 3, 2008Publication date: April 23, 2009Inventor: Jie Yao
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Publication number: 20090095888Abstract: The present invention provides a semiconductor photodetecting device that suppresses sensitivity of a short wavelength component of irradiated light as well as a long wavelength component thereof and has a spectral sensitivity characteristic approximately coincident with a human visibility characteristic, and an illuminance sensor including the semiconductor photodetecting device. The semiconductor photodetecting device has a P-type well region and an N-type well region provided side by side along the surface of a P-type semiconductor substrate, a high-concentration N-type region formed in the neighborhood of the surface of the P-type well region, and a high-concentration P-type region formed in the neighborhood of the surface of the N-type well region.Type: ApplicationFiled: September 29, 2008Publication date: April 16, 2009Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Noriko Tomita
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Patent number: 7504672Abstract: A photodiode for detection of preferably infrared radiation wherein photons are absorbed in one region and detected in another. In one example embodiment, an absorbing P region is abutted with an N region of lower doping such that the depletion region is substantially (preferably completely) confined to the N region. The N region is also chosen with a larger bandgap than the P region, with compositional grading of a region of the N region near the P region. This compositional grading mitigates the barrier between the respective bandgaps. Under reverse bias, the barrier is substantially reduced or disappears, allowing charge carriers to move from the absorbing P region into the N region (and beyond) where they are detected. The N region bandgap is chosen to be large enough that the dark current is limited by thermal generation from the field-free p-type absorbing volume, and also large enough to eliminate tunnel currents in the wide gap region of the diode.Type: GrantFiled: October 13, 2005Date of Patent: March 17, 2009Assignee: DRS Sensors & Targeting Systems, Inc.Inventor: Michael A. Kinch
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Publication number: 20090065887Abstract: Provided is an image sensor and a method for manufacturing the same. In the image sensor, a first substrate has a lower metal line and circuitry thereon. A crystalline semiconductor layer contacts the lower metal line and is bonded to the first substrate. A photodiode is provided in the crystalline semiconductor layer and electrically connected with the lower metal line. A pixel isolation layer is formed in regions of the photodiode.Type: ApplicationFiled: September 5, 2008Publication date: March 12, 2009Inventor: JOON HWANG
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Patent number: 7495273Abstract: A pinned photodiode, which is a double pinned photodiode having increased electron capacitance, and a method for forming the same are disclosed. The invention provides a pinned photodiode structure comprising a substrate base over which is a first layer of semiconductor material. There is a base layer of a first conductivity type, wherein the base layer of a first conductivity type is the substrate base or is a doped layer over the substrate base. At least one doped region of a second conductivity type is below the surface of said first layer, and extends to form a first junction with the base layer. A doped surface layer of a first conductivity type is over the at least one region of a second conductivity type and forms a second junction with said at least one region of a second conductivity type.Type: GrantFiled: July 27, 2004Date of Patent: February 24, 2009Assignee: Aptina Imaging CorporationInventor: Inna Patrick
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Publication number: 20090040502Abstract: A spatial information detecting device is provided, which is capable of reducing the possibility that a saturation phenomenon is caused by the influence of an environmental light. This device includes a photoelectric converting portion for receiving a signal light from a target space to generate electric charges, a charge separating portion for separating electric charges corresponding to a constant amount of a bias component as undesired electric charges from the electric charges generated by the photoelectric converting portion, a charge accumulating portion for accumulating the remaining electric charges as effective electric charges reflecting a fluctuation component of the signal light, a barrier control electrode for forming a potential barrier between the charge separating portion and the charge accumulating portion, and a charge take-out portion for outputting the effective electric charges as an received-light output.Type: ApplicationFiled: November 14, 2006Publication date: February 12, 2009Inventors: Yusuke Hashimoto, Yuji Takada, Kenji Imai, Fumi Tsunesada
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Publication number: 20090026511Abstract: A barrier implanted region of a first conductivity type formed in lieu of an isolation region of a pixel sensor cell that provides physical and electrical isolation of photosensitive elements of adjacent pixel sensor cells of a CMOS imager. The barrier implanted region comprises a first region having a first width and a second region having a second width greater than the first width, the second region being located below the first region. The first region is laterally spaced from doped regions of a second conductivity type of adjacent photodiodes of pixel sensor cells of a CMOS imager.Type: ApplicationFiled: August 22, 2008Publication date: January 29, 2009Inventors: Frederick Brady, Inna Patrick
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Publication number: 20090008739Abstract: Methods of manufacturing a photo diode include sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a substrate. The second and first epitaxial layers are etched to form a trench that exposes a portion of the buried layer. A conductive plug of the first conductivity type is formed in the trench. A first electrode is formed on an upper surface of the second epitaxial layer. A second electrode may be formed to contact an upper surface of the conductive plug. Photodiodes having a conductive plug contact to a buried layer are also provided.Type: ApplicationFiled: September 17, 2008Publication date: January 8, 2009Inventors: Sung-ryoul Bae, Dong-kyun Nam
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Publication number: 20080318358Abstract: An active pixel using a pinned photodiode with a pinning layer formed from indium is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. A pinning layer formed from indium is then formed at the surface of the N? region. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.Type: ApplicationFiled: August 28, 2008Publication date: December 25, 2008Applicant: OMNIVISION TECHNOLOGIES, INC.Inventor: Howard E. Rhodes
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Publication number: 20080272455Abstract: An n/p semiconductor substrate is formed in such a manner that an n type semiconductor layer is deposited on a p+ semiconductor substrate. An imaging area including a plurality of n type semiconductor regions making photoelectric conversion and a plurality of p type semiconductor region for isolation formed around the n type semiconductor regions, is formed in the n/p semiconductor substrate. The n type semiconductor layer is divided into an upper layer and a lower layer. A second n type semiconductor region is formed to connect to the p+ type semiconductor substrate from a surface of the n/p semiconductor substrate in a peripheral region of the imaging area.Type: ApplicationFiled: October 18, 2007Publication date: November 6, 2008Inventor: Ikuko Inoue
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Patent number: 7432578Abstract: A photosensitive device is disclosed which comprises a semiconductor substrate, at least one reverse biased device, such as a P-N junction diode formed in the semiconductor substrate, and at least one photosensitive layer disposed above the semiconductor substrate and substantially covering the reverse biased device, the photosensitive layer releasing electrons and holes when struck by photons, wherein the photon generated electrons and holes in the photosensitive layer reach the reverse biased device and create a combination current therein when a light shines thereon.Type: GrantFiled: April 24, 2007Date of Patent: October 7, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shine Chung, Shou-Gwo Wuu
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Publication number: 20080217724Abstract: A backside illuminated solid-state imaging device is provided and includes: a p-type semiconductor substrate; an imaging region that receives a subject light through a back side of the p-type semiconductor substrate to accumulate a signal corresponding to an amount of the received light; a signal reading element disposed in a front side of the p-type semiconductor substrate, the signal reading element reading out the signal from the imaging region; and an n-well region disposed in the front side of the p-type semiconductor substrate and in a periphery of the imaging region, the n-well region being biased to a positive voltage.Type: ApplicationFiled: February 15, 2008Publication date: September 11, 2008Inventor: Shinji UYA
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Publication number: 20080149973Abstract: A method for manufacturing a semiconductor device is provided. The method includes: forming a gate insulating layer on a semiconductor substrate having an isolation layer formed therein, forming a gate electrode on the gate insulating, implanting low-concentration impurity ions on the semiconductor substrate at a first side of the gate electrode to form a lightly doped drain (LDD) region, forming a low-concentration impurity region on the semiconductor substrate at a second side of the gate electrode, implanting impurities into the low-concentration impurity region to form a photodiode, and forming micro pits on a top surface of the photodiode using a wet etching process.Type: ApplicationFiled: December 20, 2007Publication date: June 26, 2008Inventor: Jea Hee Kim
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Publication number: 20080150067Abstract: An image sensor including a first epitaxial layer formed over a semiconductor substrate; first photodiodes formed spaced apart in the first epitaxial layer; a first isolation region electrically isolating the first photodiodes from each other; a second epitaxial layer formed over the first epitaxial layer; second photodiodes formed spaced apart in the second epitaxial layer; and a second isolation region electrically isolating the second photodiodes from each other.Type: ApplicationFiled: November 29, 2007Publication date: June 26, 2008Inventor: Jeong-Su Park
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Publication number: 20080150071Abstract: In a photodiode formed by a region of a first type inside a region of a second type, of a semiconductor substrate, the region of the first type includes a first zone including a dopant of the first type having a first concentration and a first depth. The region of the first type also has a second zone adjacent to the first zone in the dopant of the first type has a second concentration higher than the first concentration and a second depth smaller than the first depth. A method for making such a diode is also disclosed.Type: ApplicationFiled: December 24, 2007Publication date: June 26, 2008Applicant: STMICROELECTRONICS S.A.Inventor: FRANCOIS ROY
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Publication number: 20080142920Abstract: According to the present invention, a highly sensitive photo-sensing element and a sensor driver circuit are prepared by planer process on an insulating substrate by using only polycrystalline material. Both the photo-sensing element and the sensor driver circuit are made of polycrystalline silicon film. As the photo-sensing element, a photo transistor is formed by using TFT, which comprises a first electrode 11 prepared on an insulating substrate 10, a photoelectric conversion region 14 and a second electrode 12, and a third electrode 13 disposed above the photoelectric conversion region 14. An impurity layer positioned closer to an intrinsic layer (density of active impurities is 1017 cm?3 or lower) is provided on the regions 15 and 16 on both sides under the third electrode 13 or on one of the regions 15 or 16 on one side.Type: ApplicationFiled: December 14, 2007Publication date: June 19, 2008Inventors: Mitsuharu Tai, Hideo Sato, Mutsuko Hatano, Masayoshi Kinoshita
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Publication number: 20080128847Abstract: A Complementary Metal Oxide Semiconductor (CMOS) image sensor includes a red photodiode formed in an first epitaxial layer, an isolation layer formed with a contact region left in a partial area of the red photodiode, a green photodiode formed in a surface of the isolation layer, a contact formed in the contact region at a predetermined spatial distance from the green photodiode, a second epitaxial layer formed on the first epitaxial layer in which the green photodiode is formed, a plurality of plugs formed in the second epitaxial layer and electrically connected to the green photodiode and the contact, a device isolation film formed in a surface of the second epitaxial layer, a blue photodiode formed in a surface of the second epitaxial layer above the green photodiode, and a well region formed in the second epitaxial layer inside the plug.Type: ApplicationFiled: October 9, 2007Publication date: June 5, 2008Inventor: Hyuk Woo
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Publication number: 20080124829Abstract: A method is provided for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. An N+ region is implanted in a P-type substrate and a P-type well separates the N+ region from the shallow trench isolation (STI) structure. At least a P+ region is formed over the N+ region and overlapping at least part of the P-type well and a substrate portion between the N+ region and P-type well. The space between the N+ region and a damaged region adjacent the STI is greater than the expansion distance of the depletion region between the N+ region and the P-type well. The junctions of the various features are optimized to maximize a photosensitive response for the wavelength of the absorbed light as well as for reducing or eliminating electrical leakage.Type: ApplicationFiled: January 29, 2008Publication date: May 29, 2008Inventor: Dun-Nian Yaung
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Publication number: 20080105944Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.Type: ApplicationFiled: March 6, 2007Publication date: May 8, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-Wei Chang, Han-Chi Liu, Chun-Yao Ko, Shou-Gwo Wuu
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Patent number: 7365409Abstract: A two-transistor pixel of an imager has a reset region formed adjacent a charge collection region of a photodiode and in electrical communication with a gate of a source follower transistor. The reset region is connected to one terminal of a capacitor which integrates collected charge of the photodiode. The charge collection region is reset by pulsing the other terminal of the capacitor from a higher to a lower voltage.Type: GrantFiled: April 20, 2004Date of Patent: April 29, 2008Assignee: Micron Technology, Inc.Inventor: Eric R. Fossum
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Publication number: 20080073737Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.Type: ApplicationFiled: November 16, 2007Publication date: March 27, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
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Patent number: 7348651Abstract: A method and system is disclosed for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. Provided is a system with an N+ region implanted in a P-type substrate; a P-type well separating the N+ region from the shallow trench isolation (STI) structure; and at least a P+ region over the N+ region, and overlapping at least part of the P-type well and a substrate portion between the N+ region and P-type well. The space between the N+ region and a damaged region adjacent the STI is greater than the distance that the depletion region between the N+ region and the P-type well, expands. The junctions of the various features are optimized to maximize a photosensitive response for the wavelength of the absorbed light as well as reducing or eliminating electrical leakage.Type: GrantFiled: December 9, 2004Date of Patent: March 25, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Dun-Nian Yaung
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Publication number: 20080048220Abstract: A CMOS image sensor and a fabricating method thereof are provided. The method includes forming a nitride layer over a boundary region between a device isolation region and a pixel region, forming a silicide barrier layer in the pixel region and performing a silicide process. A boundary portion of the silicide barrier layer formed in the pixel region can be prevented from being wet-etched while the silicide barrier layer is removed by the wet etching process.Type: ApplicationFiled: August 20, 2007Publication date: February 28, 2008Inventor: Jin-Han Kim
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Publication number: 20080012088Abstract: An n/p?/p+ substrate where a p?-type epitaxial layer and an n-type epitaxial layer have been deposited on a p+-type substrate is provided. In the surface region of the n-type epitaxial layer, the n-type region of a photoelectric conversion part has been formed. Furthermore, a barrier layer composed of a p-type semiconductor region has been formed so as to enclose the n-type region of the photoelectric conversion part in a plane and reach the p?-type epitaxial layer from the substrate surface. A p-type semiconductor region has also been formed at a chip cutting part for dividing the substrate into individual devices so as to reach the p?-type epitaxial layer from the substrate surface.Type: ApplicationFiled: July 12, 2007Publication date: January 17, 2008Inventors: Tetsuya YAMAGUCHI, Hiroshige Goto, Hirofumi Yamashita, Ikuko Inoue, Nagataka Tanaka, Hisanori Ihara
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Publication number: 20060261430Abstract: An integrated layer stack arrangement, an optical sensor and a method for producing an integrated layer stack arrangement is disclosed. Generally, an integrated layer stack arrangement includes a plurality of layer stacks arranged on top of each other, each layer stack including a metal layer and a dielectric layer arranged; at least one photodiode integrated into the plurality of layer stacks; a trench arranged above the last least one photodiode, the trench extending through at least a portion of the plurality of layer stacks so that light impinging on the plurality of layer stacks impinges on the integrated photodiode along the trench; a first passivation partial layer applied on the plurality of layer stacks; and a second passivation partial layer applied on the plurality of layer stacks and a bottom and walls of the trench.Type: ApplicationFiled: March 28, 2006Publication date: November 23, 2006Inventor: Jurgen Holz
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Publication number: 20060138580Abstract: A photo-detecting device includes a buried doping layer of a first conductivity type and disposed at an upper portion of a silicon substrate. A first silicon epitaxial layer of first conductivity type is disposed on the buried doping layer, and a second silicon epitaxial layer of second conductivity type is disposed on the first silicon epitaxial layer. An isolation doping layer doped of first conductivity type is disposed at a predetermined region of the second silicon epitaxial layer to define a body region of second conductivity type. A silicon germanium epitaxial layer of second conductivity type is disposed on the body region.Type: ApplicationFiled: December 19, 2005Publication date: June 29, 2006Inventors: Tae-Jin Kim, Kwang-Joon Yoon, Phil-Jae Chang, Kye-Won Maeng, Young-Jun Park