Plural Electrical Components Patents (Class 264/272.14)
  • Patent number: 6562272
    Abstract: An apparatus and method for providing delamination-resistant, array type molding of chip laminate packages such that larger chip array block sizes may be employed. An advanced mold die provides multiple wells for the formation of ejector pin tabs to be formed integrally to the mold cap of a chip laminate package. The die further provides for an ejector pin hole to be located at each ejector pin tab such that the ejector pins, when pressed for release of the laminate package from the mold die, bear against the integrally formed pin tabs rather than against the substrate of the chip/substrate assembly. The placement of the ejector pins for bearing against the pin tabs precludes the loading of the interface within the laminate package between the mold cap and the chip/substrate assembly. Substantially reduced delamination of the chip laminate package is achieved allowing for the use of larger chip array block sizes and providing for a substantial reduction in chip laminate package moisture sensitivity.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: May 13, 2003
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bo Chang, Vani Verma, Annie Tan
  • Patent number: 6562278
    Abstract: A method for producing a monolithic, seamless, polymeric housing structure for a micromachine uses a stereolithographic method to produce the structure layer by layer by exposing sequentially formed films of photopolymer to a beam of electromagnetic radiation scanned over patterns of locations corresponding to at least partially superimposed layers of the housing structure. The housing structure may include openings through which movable elements such as shafts and linkages may extend, and may provide sealed passage for electrical conductors therethrough from the micromachine to the exterior of the housing structure. Complex housing structures including closed or almost closed chambers and interior partition walls as well as interior passages of complex configuration may be formed to accommodate individual components or component assemblies.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: May 13, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Kevin G. Duesman
  • Patent number: 6558600
    Abstract: A method and apparatus for encapsulating a microelectronic substrate. In one embodiment, the apparatus can include a mold having an internal volume with a first portion configured to receive the microelectronic substrate coupled to a second portion configured to receive a pellet for encapsulating the microelectronic substrate. A plunger moves axially in the second portion to force the pellet into the first portion and around the microelectronic substrate. The pellet has overall external dimensions approximately the same as a conventional pellet, but has cavities or other features that reduce the volume of the pellet and the amount of pellet waste material left after the pellet encapsulates the microelectronic substrate. Accordingly, the pellet can be used with existing pellet handling machines. The mold and/or the plunger can have protrusions and/or other shape features that reduce the size of the first portion of the internal volume.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: May 6, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Vernon M. Williams, Chad A. Cobbley
  • Patent number: 6554598
    Abstract: A mold assembly including: a first mold half; a second mold half relatively movable with respect to the first mold half; and a thin film disposes between the both mold halves and in contact with the surface of a semiconductor chip. Because of the contact between the edges of the surface of the semiconductor chip and the thin film, the portion of the semiconductor chip at which the burr is liable to be generated is protected and no burrs are generated.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: April 29, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Hisayuki Tsuruta
  • Patent number: 6549821
    Abstract: A stereolithographic method and apparatus for applying packaging material to workpieces such as preformed electronic components, including semiconductor dice, with a high degree of precision, and resulting articles. A machine vision system including at least one camera is operably associated with a computer controlling a stereolithographic system for application of material so that the system may recognize the position and orientation of workpieces, such as semiconductor dice, to which the material is to be applied. The requirement for precise mechanical workpiece alignment is eliminated, and the ability of the system to recognize size, configuration and topography of different workpieces affords greater manufacturing flexibility. The method includes stereolithographic application of material for packaging electronic components, and the electronic components so packaged are also part of the invention.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: April 15, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Mark S. Johnson
  • Patent number: 6531083
    Abstract: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly. A prepackaged sproutless mold compound insert 71 is placed in a rectangular receptacle 91 in a bottom mold chase 81. The receptacle is coupled to a plurality of die cavities 85 by runners 87. Leadframe strip assemblies containing leadframes, integrated circuit dies, and bond wires coupling the leadframes and dies are placed over the bottom mold chase 81 such that the integrated circuit dies are each centered over a bottom mold die cavity 85. A top mold chase 90 is placed over the bottom mold chase 81 and the mold compound package 71. The top mold chase 90 has die cavities 95 corresponding to those in the bottom mold chase 81. The mold compound insert 71 is preferably packaged in a plastic film 75 which has heat sealed edges 77. The mold compound is forced through the package 75 and heat seals 77 during the molding process by the pressure applied by a rectangular plunger 101.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: March 11, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Mario A. Bolanos, Jeremias L. Libres, George A. Bednarz, Tay LiangChee, Julius Lim, Ireneus J. T. M. Pas
  • Patent number: 6527998
    Abstract: A method of fabricating a pack tray is provided wherein a plurality of modules are secured in a master frame. Each pack tray typically includes two types of modules: a chip module having an aperture therein to secure an integrated circuit chip and a pick-up module for picking up the pack tray. In one embodiment, all modules are identical in size. In another embodiment, the modules differ in size.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: March 4, 2003
    Assignee: Xilinx, Inc.
    Inventor: Carl D. McCann
  • Patent number: 6523254
    Abstract: A method and device for providing a gate blocking material. Specifically, a method for molding a substrate having known good and bad sites thereon, by blocking the gate area of the bad sites during the molding process. A blocking material or an injection pin are used to interrupt the flow of molding compound through an injection molding system, and thereby prevent molding compound from flowing onto the known bad substrate sites.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: February 25, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, Casey L. Prindiville, Cary Baerlocher
  • Publication number: 20030030180
    Abstract: The present invention relates (with reference to FIG. 1a) to a method of manufacture of an integrated camera and illumination device. The method comprises assembling together an optical sensor (12), illumination means (17) and associated electronic circuitry (10) into an assembled unit; placing the assembled unit into a mold; introducing an encapsulant in liquid state into the mold to surround the components therein; and the encapsulant solidifying to form an encapsulated assembly of optical sensor, illumination means and associated electronic circuitry.
    Type: Application
    Filed: August 7, 2002
    Publication date: February 13, 2003
    Inventors: Timothy Meek, Christopher David Reeve
  • Patent number: 6503433
    Abstract: An encapsulation system is used to encapsulate semiconductor products. A bottom mold unit includes a mold pot and a mold piston. A substrate loader loads a substrate into a cavity in the bottom mold unit. A liquid dispenser dispenses encapsulation material into the mold pot. The encapsulation material is in an uncured liquid state when placed into the mold pot. A top mold unit is clamped to the bottom mold unit.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: January 7, 2003
    Assignee: Infineon Technologies North America Corp.
    Inventor: Haryanto Chandra
  • Publication number: 20020190429
    Abstract: A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the card circuit to the circuit of another apparatus by removable insertion therein. The substrate is defined by a peripheral opening in a surrounding frame, which may be part of a multiframe strip. The substrate is connected to the frame by connecting segments. The card includes a first plastic casting molded to the substrate and encapsulating the semiconductor components while leaving a peripheral portion of the substrate uncovered. A second plastic casting is molded to the peripheral portion to abut the first plastic casting and form the card periphery. A method for fabricating the semiconductor card is also included.
    Type: Application
    Filed: August 5, 2002
    Publication date: December 19, 2002
    Inventor: Todd O. Bolken
  • Patent number: 6491857
    Abstract: A semiconductor chip mounted on a lead frame is sealed in a synthetic resin package through a molding process, and pressure is applied to synthetic resin softened from granular. synthetic resin so as to evacuate the air from the synthetic resin before injecting the synthetic resin into cavities formed in a molding die, thereby preventing the synthetic resin package from void.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: December 10, 2002
    Assignee: NEC Corporation
    Inventor: Hiroshi Ise
  • Patent number: 6482340
    Abstract: A wire harness comprises a plurality of wires routed along a surface of a trim panel. The wires are encased and secured to the trim panel by a foam polymer. The wires are first routed on a surface of the trim panel. A foam gun including a wire guide and a nozzle is moved along the length of the wires, simultaneously gathering and aligning the wires and spraying a foamable liquid onto the wires. The liquid polymer foams and cures, thereby securing the wires to the trim panel and encasing the wires.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: November 19, 2002
    Assignee: Lear Corporation
    Inventors: Joseph J. Davis, Jr., David C. Pudduck
  • Patent number: 6432247
    Abstract: A hearing aid instrument of the in-the-ear type (and preferably CIC) provides a plate member with electronic hearing aid components mounted thereto. The plate member is preferably of a harder material such as hard plastic. A soft polymeric body is bonded to the plate member and encapsulates preferably a plurality of the electronic hearing aid components. The body is soft and is shaped to conform to the ear canal of the user. The soft polymeric body and encapsulated electronic hearing aid components define a soft structure compliant to the ear canal during use and that is substantially solid and free of void spaces between at least some of the components and the ear canal. This combination of soft compliant structure and encapsulated electronic hearing aid components addresses problems of peripheral leakage, poor fit, pivotal displacement that occurs with jaw motion and internal cross talk of components housed in prior art hollow type hearing aids.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: August 13, 2002
    Assignee: Softear Technologies, L.L.C.
    Inventors: Roger P. Juneau, Lynn P. Creel, Edward J. Desporte, Michael Major, Gregory R. Siegle, Kelly M. Kinler
  • Patent number: 6428731
    Abstract: The invention relates to a mould part of a mould for encapsulating electronic components mounted on a carrier, composing at least one mould cavity provided in said mould part and at least one runner for moulding material connecting to said mould cavity, wherein the gate from said runner to said mould cavity has an oblong shape. The invention also relates to a mould with at least one such mould part. The invention also provides a method for encapsulating electronic components mounted on a carrier, wherein the liquid moulding material is fed into the mould cavity through a wide supply opening. Finally, the invention also provides an encapsulated electronic component mounted on a carrier, which component is manufactured by this method.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: August 6, 2002
    Assignee: Fico, B.V.
    Inventors: Hendrikus Johannes Bernardus Peters, Marcel Gerardus Antonius Tomassen
  • Publication number: 20020056566
    Abstract: Cable splices and methods for splicing cables wherein two segments of cable, each of which includes a central conduit, a plurality of electrical wires and a plurality of supporting wires are joined together. In one embodiment, the cable segments are coupled by cleanly cutting the ends of the two cable segments to prepare them to be spliced, folding back the wires and joining the conduits of the two cables, then connecting each of the electrical wires of one segment to a corresponding wire of the other segment, then connecting each of the support wires of the two cable segments to a support structure which surrounds the conduit and electrical wires, and finally placing a mold over the spliced area and filling the mold with a protective material which will harden and thereby strengthen the splice and protect the embedded conduit and wires.
    Type: Application
    Filed: May 24, 2001
    Publication date: May 16, 2002
    Inventor: Jimmy L. Laake
  • Patent number: 6375778
    Abstract: The lining is provided with a support layer (4) which can be shaped in a mold so that recesses (8) are formed in it, which will receive the various functions (5), said support (4) complemented by the remaining layers (9) which make up the lining, which are also suitably shaped in order to adapt to support (4), closing the openings of recesses (8). The procedures consists of forming support (4), housing functions (5) in its recesses (8), and in another press, or simultaneously and in the same one, forming the remaining layers (9), and finally attaching the set with suitable adhesives.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: April 23, 2002
    Assignee: Grupo Antolin-Ingenieria, S.A.
    Inventors: Alberto Cremades Schulz, Eleuterio Gonzalez Güemes, Jose Manuel Dominguez Ruano, Alberto Ortega Martinez
  • Patent number: 6355199
    Abstract: A molded flexible circuit assembly and method of forming a molded flexible circuit assembly which use a molded stiffener, and do not require any additional type of stiffener, are described. A molded stiffener is formed on a flexible tape at the same time molded encapsulation units are formed to encapsulate circuit die which are attached to the flexible tape. The molded stiffeners provide adequate rigidity for processing of the molded flexible circuit assembly. When the stiffeners are no longer needed they are removed at the same time the mold runners are removed. No additional processing steps are required for either the formation or removal of the molded stiffeners.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: March 12, 2002
    Assignee: St. Assembly Test Services Pte Ltd
    Inventors: John Briar, Raymundo M. Camenforte
  • Patent number: 6344162
    Abstract: The method of manufacturing semiconductor devices is capable of efficiently manufacturing semiconductor devices and preventing production of bad products. The method is executed in a molding machine including an tipper die and a lower die, in one of which a plurality of cavities corresponding to resin-molded parts of the semiconductor devices are formed. And, the method comprises the steps of: covering inner faces of the cavities and a parting face of one of the dies, which contacts a substrate of the semiconductor devices, with release film, which is easily peelable from the dies and resin for molding; clamping the substrate with the dies; filling the resin in the cavities; and forming the semiconductor devices by cutting the molded substrate.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: February 5, 2002
    Assignee: Apic Yamada Corporation
    Inventor: Fumio Miyajima
  • Patent number: 6338813
    Abstract: A molding method for a BGA semiconductor chip package comprising a substrate supporting an array of chips having two lines of bonding pads formed at two respective side thereof. The molding method comprises the steps of: (A) providing a molding apparatus comprising a molding die having a molding cavity and at least two runners connected to the molding cavity; (B) closing and clamping the molding die in a manner that the chips are located in the molding cavity thereof; (C) transferring a molding compound into the molding cavity wherein each chip is arranged in a manner that the two lines of bonding pads thereof are substantially perpendicular to the flowing direction of the molding compound; (D) curing the molding compound; and (E) unclamping and opening the molding die to take out the molded product.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: January 15, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Chun Hung Lin, Tao-Yu Chen
  • Patent number: 6334971
    Abstract: A manufacturing method for a diode group processed by injection molding on the surface thereof, the diode group is formed by having a plurality of left and right elongate tapes which are pressed to form respectively left and right contact ends, each pair of the left and right elongate tapes have a left lap end and a right lap end to sandwich a chip therebetween. Then injection molding is performed to envelop the left and right elongate tapes and to form an elongate strip having an insulation outer layer with the left and right contact ends exposed and with a recess at the bottom of and between every two neighboring chips. The recesses separate the left contact ends of the left elongate tapes from the right contact ends of the right elongate tapes but still leave the plural diodes in series connected mutually in an insulation state. The strip can be broken off at desire recesses to get a diode group having desired number of diodes processed by injection molding on the surface of the strip.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: January 1, 2002
    Inventor: Wen-Ping Huang
  • Patent number: 6332766
    Abstract: The upper and lower mold plates of a transfer molding machine are configured for one-side encapsulation of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator. The pair of devices is positioned back-to-back within a single mold cavity for simultaneous encapsulation. A buffer member, optionally with cut-outs or apertures, may be placed between the two back-to-back substrates for protecting the grid-arrays and enabling encapsulation of devices with varying thicknesses without adjustment of the molding machine. Alternately, the upper and lower plates are configured for one-side encasement using covers of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: December 25, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Steven G. Thummel
  • Publication number: 20010045686
    Abstract: The upper and lower mold plates of a transfer molding machine are configured for one-side encapsulation of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator. A buffer member, optionally with cut-outs or apertures, may be placed between the two back-to-back substrates for protecting the grid-arrays and enabling encapsulation of devices with varying thicknesses without adjustment of the molding machine. Alternately, the upper and lower plates are configured for one-side encasement using covers of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator.
    Type: Application
    Filed: August 1, 2001
    Publication date: November 29, 2001
    Inventor: Steven G. Thummel
  • Publication number: 20010042941
    Abstract: In accordance with the present invention, a carriage assembly for carrying read/write heads into engagement with a recording medium is provided. The carriage assembly comprises a carriage body. The body defines a sidewall having a first open end and a second open end with a passage extending therebetween. A coil is interlockingly coupled with the carriage body sidewall. At least one carriage arm for carrying at least one head is interlockingly coupled with the carriage body sidewall.
    Type: Application
    Filed: July 31, 2001
    Publication date: November 22, 2001
    Inventor: Thomas J. Angellotti
  • Patent number: 6315540
    Abstract: A molding die used for concurrently packaging semiconductor chips in a large piece of synthetic resin has a cavity rectangular in cross section and having two long peripheral lines and two short peripheral lines for accommodating a circuit panel where the semiconductor chips are mounted, melted synthetic resin is supplied through a gate extending along one of the long peripheral lines to the cavity so that the melted synthetic resin smoothly flows over the cavity, and the smooth flow prevents the molded product from voids and a wire weep.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: November 13, 2001
    Assignee: NEC Corporation
    Inventor: Hisayuki Tsuruta
  • Patent number: 6315936
    Abstract: Method for implementing a multi-phase plastic package for electronic components, and packaged electronic components produced according to the method. The present invention contemplates the use of molding compounds having two or more discrete phases in a transfer molding process wherein a temperature differential is induced between the electronic component to be packaged and the mold of the molding apparatus prior to molding. Each of the molding compound phases, when used in a current transfer molding apparatus, generates a separate layer in the resultant package, and each of the resultant layers possesses certain unique properties. In its simplest implementation, the present invention provides a two-phase molding compound pellet which provides an outer layer containing mold release compounds to facilitate release of the completed packaged device from the mold, and an inner layer without mold release agents. Other implementations include multiple layers.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: November 13, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: J. Courtney Black, Richard C. Blish, II, Colin D. Hatchard
  • Patent number: 6312624
    Abstract: A substrate is precisely positioned by a positioning element belonging to the substrate in an assembly device. While positioned in the assembly device, a converter is disposed and fixed on the substrate in a precise position relative to the positioning element. After that, the substrate is positioned precisely in an injection mold by the positioning element and surrounded by a moldable material, causing the formation of a molded body. The molded body has at least one functional surface, such as a lens or a stop face, serving the purpose of optical coupling.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: November 6, 2001
    Assignee: Infineon Technologies AG
    Inventor: Jörg-Reinhardt Kropp
  • Patent number: 6308389
    Abstract: This invention relates to a method of manufacturing an ultrasonic transducer. First, a plurality of printed boards in each of which a plurality of leads are formed in a line are stacked. The end portions of the leads protrude from each printed board. These lead end portions are inserted into a plurality of lead holes of an alignment jig. The plurality of printed boards are buried in the back surface of this alignment jig, and a backing layer is formed by resin molding. After that, the alignment jig is removed from the surface of the backing layer, and the surface of the backing layer is flattened. Since the end portions of the leads are exposed to this flattened surface of the backing layer, discrete electrodes formed on the back surfaces of transducer elements are electrically connected to these lead end portions. The accuracy of lead arrangement is thus improved by the use of the alignment jig. This reduces alignment errors of leads with respect to the discrete electrodes of the transducer elements.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: October 30, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoru Tezuka
  • Patent number: 6296789
    Abstract: In the method of making an optical module in accordance with the present invention, an optical module principal portion is molded by means of a molding die. The molding die has a ferrule accommodating portion f or accommodating a ferrule and a positioning portion which are located on its lead frame-mounting surface. The method of making an optical module comprises the steps of: preparing a lead frame having an alignment portion enabling the positioning with respect to the mold die; preparing the optical module principal portion; aligning the optical module principal portion with the lead frame and securing them to each other by means of a positioning jig so that the ferrule secured to the optical module principal portion meets the ferrule accommodating portion of the molding die; placing the lead frame with the optical module principal portion secured thereto on the molding die; and resin-molding the lead frame and the optical module principal portion by means of the molding die.
    Type: Grant
    Filed: February 19, 1999
    Date of Patent: October 2, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hisao Go, Shunichi Yoneyama
  • Patent number: 6287503
    Abstract: The upper and lower mold plates of a transfer molding machine are configured for one-side encapsulation of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator. The pair of devices is positioned back-to-back within a single mold cavity for simultaneous encapsulation. A buffer member optionally with cut-outs or apertures, may be placed between the two back-to-back substrates for protecting the grid-arrays and enabling encapsulation of devices with varying thicknesses without adjustment of the molding machine. Alternately, the upper and lower plates are configured for one-side encasement using covers of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: September 11, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Steven G. Thummel
  • Patent number: 6257857
    Abstract: A molding apparatus for use in forming a flexible substrate based package comprises a plurality of pots. Two flexible substrates are installed at two sides of the pots. A plurality of sets of chips mounted on the upper surface of the substrate wherein each set of chips is in an array arrangement. The molding apparatus further comprises a plurality of runners. Each runner independently extends from one side of the pot to one side of the substrate, and connects to a cavity of a upper part of a mold disposed on the substrate through a gate. The present invention characterized in that, the molding apparatus is provided with a first communication channel formed corresponding to one side of the substrate and a second communication channel formed corresponding to the other side of the substrate. The first and the second communication channels interconnect the cavities at two opposite sides thereof.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: July 10, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chang Lee, Gwo Liang Weng
  • Patent number: 6258314
    Abstract: According to the present invention, a method for manufacturing a resin-molded semiconductor device by interposing a sealing sheet within a molding die for encapsulating a lead frame, on which a semiconductor chip has been bonded, with a molding compound, is provided. In adhering the sealing sheet to the lead frame and encapsulating the lead frame with the molding compound, tension is applied to the sealing sheet.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: July 10, 2001
    Assignee: Matsushita Electronics Corporation
    Inventors: Seishi Oida, Yukio Yamaguchi, Nobuhiro Suematsu, Takeshi Morikawa, Yuichiro Yamada
  • Patent number: 6255587
    Abstract: Electronic devices include at least two electronic components in electrical contact by a connector, the components being at least partially encased by a molded resin. Preferably, the connector is a compression connector and the molded resin maintains a compressive force on the connector to ensure that reliable contact is maintained.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: July 3, 2001
    Assignee: AT&T Corporation
    Inventors: William Roger Lambert, John David Weld
  • Publication number: 20010003385
    Abstract: A semiconductor chip mounted on a lead frame is sealed in a synthetic resin package through a molding process, and pressure is applied to synthetic resin softened from granular synthetic resin so as to evacuate the air from the synthetic resin before injecting the synthetic resin into cavities formed in a molding die, thereby preventing the synthetic resin package from void.
    Type: Application
    Filed: January 13, 1998
    Publication date: June 14, 2001
    Inventor: HIROSHI ISE
  • Patent number: 6214273
    Abstract: An improved mold system (20) is provided. The mold system (20) includes a mold (30) having a mold cavity (28). A pot (22) is connected to the mold cavity (28) through a boomerang runner system (24). The boomerang runner system may include a boomerang passage (25) having an inner curvilinear surface (44) and an outer curvilinear surface (42).
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: April 10, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Chee Tay Liang, Jeremias P. Libres, Julius Lim, Jin Sin Sai, Chee Moon Ow, Mario A. Bolanos-Avila
  • Patent number: 6202853
    Abstract: A new continuous carrier for surface mount or other electrical or mechanical parts, and a method of fabricating same, formed by molding one or a pair of continuous flexible film strips to a side or sides of a series of desired electrical or mechanical components such that the components are attached to the single strip or filament or suspended between the film strips or filaments. Following the initial molding step, the components, while still supported by the film strips or filament, are subjected to secondary processing Examples are: providing electrically-conductive coatings on the component throughout or selectively, providing electrically-conductive traces on the moldings, or molding in a second molding stage a part of a different composition or shape to the initial molded part.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: March 20, 2001
    Assignee: AutoSplice Systems, Inc.
    Inventors: Giuseppe Bianca, Robert M. Bogursky
  • Patent number: 6200504
    Abstract: An apparatus for encapsulating with plastic lead frames carrying chips includes mutually movable halves. In the closed position the movable halves bound a mold cavity for receiving a lead frame, a feed runner connecting onto the mold cavity for supplying encapsulating material, a pot for receiving an encapsulating material and a plunger reciprocating in the pot, connected onto said feed runner for carrying up encapsulating material under pressure. At a distance from a head end of the plunger a peripheral groove is arranged which is connected to the head end by at least one flow channel. The outer wall of the plunger is provided with helically running grooves and the depth of the grooves increases as seen from the drive side of the plunger.
    Type: Grant
    Filed: June 9, 1997
    Date of Patent: March 13, 2001
    Assignee: Fico B.V.
    Inventor: Hendrikus Johannes Bernardus Peters
  • Patent number: 6191955
    Abstract: An electronic module comprises (a) an electrical assembly of electrical components and a cap. The cap surrounds a portion of the electrical assembly of electrical components to form a pocket between a portion of the electrical assembly of electrical components and the cap. The cap has at least one sidewall, each of the at least one sidewalls having an end, one of at least one sidewalls proximately positioned to at least one electrical lead and having at least one notch positioned in the end, the pocket filled with an encapsulant. A process comprises providing a cap and filling the cap with encapsulant, placing an electrical assembly of electrical components in the cap filled with the preselected amount of encapsulant, and allowing the electrical assembly to seat to a proper depth.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: February 20, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Joe Guillot, Michael Quan Dinh, Bill Roberts, Linda M. McLemore
  • Patent number: 6173490
    Abstract: A method and an apparatus for forming a panel of packaged integrated circuits is disclosed. A substrate panel having an array of integrated circuits mounted thereon is placed in a mold having a molding chamber. The molding chamber has a multiplicity of adjacent package recesses flowably interconnected by way of a plurality of molding compound flowgates. Each package recess is suitable for receiving at least one associated integrated circuits. A molding compound is passed into the molding chamber by way of a mold gate such that at least some of the molding compound passes through a plurality of different package recesses by way of their associated flowgates. In one embodiment, the mold includes a mold body having a molding chamber with a plurality of ridges that define the multiplicity of package recesses within the molding chamber. The multiplicity of package recesses are flowably interconnected through flowgates formed by the ridges.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: January 16, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Shaw Wei Lee, Hem P. Takiar, Fred Drummond