Barrier Layer Or Semiconductor Device Making Patents (Class 29/25.01)
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Publication number: 20150092379Abstract: A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.Type: ApplicationFiled: May 5, 2014Publication date: April 2, 2015Applicant: Mitsubishi Electric CorporationInventors: Naoki YOSHIMATSU, Masayoshi SHINKAI, Taketoshi SHIKANO, Daisuke MURATA, Nobuyoshi KIMOTO, Yuji IMOTO, Mikio ISHIHARA
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Publication number: 20150077612Abstract: There is provided an imaging apparatus that includes a photoelectric conversion section, a retention section, and first and second gates. The photoelectric conversion section is configured to convert a received light into charge. The retention section is configured to retain the charge provided by the photoelectric conversion section. The first and second gates are provided between the photoelectric conversion section and the retention section, the first and second gates being turned ON for transferring the charge from the photoelectric conversion section to the retention section, and the second gate being turned OFF after the first gate is turned OFF.Type: ApplicationFiled: September 11, 2014Publication date: March 19, 2015Inventors: Yoshimichi Kumagai, Takashi Abe, Kazuyoshi Yamashita
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Publication number: 20150064806Abstract: A system for self-aligning diamagnetic materials includes first and second magnets contacting each other along a contact line and having a diametric magnetization perpendicular to the contact line and a diamagnetic rod positioned to levitate above the contact line of the first and second magnets.Type: ApplicationFiled: November 10, 2014Publication date: March 5, 2015Inventors: Qing Cao, Oki Gunawan
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Publication number: 20150053003Abstract: In a method for fabricating an electrostatic capacitance-type acceleration sensor having a capacitor which electrostatic capacitance between a movable electrode and a fixed electrode changes according to the displacement of the movable electrode, the method includes: a step of forming a groove on at least one of the surface of an insulative substrate and the surface of a semiconductor substrate; a step of forming a hole in the semiconductor substrate so as to penetrate the semiconductor substrate at a position communicating with a passage formed by the groove; and a step of forming an electrode extraction hole in the insulative substrate so as to penetrate the insulative substrate, at a position communicating with the passage formed by the groove.Type: ApplicationFiled: March 15, 2013Publication date: February 26, 2015Inventors: Takahiro Tsunoda, Takashi Kunimi, Toru Sekine
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Publication number: 20150055748Abstract: A well-logging tool may include a sonde housing and a radiation generator carried by the sonde housing. The radiation generator may include a generator housing, a target carried by the generator housing, a charged particle source carried by the generator housing to direct charged particles at the target, and at least one voltage source coupled to the charged particle source. The at least one voltage source may include a voltage ladder comprising a plurality of voltage multiplication stages coupled in a uni-polar configuration, and at least one loading coil coupled at at least one intermediate position along the voltage ladder. The well-logging tool may further include at least one radiation detector carried by the sonde housing.Type: ApplicationFiled: September 14, 2012Publication date: February 26, 2015Applicant: SCHLUMBERGER TECHNOLOGY CORPORATIONInventors: Matthieu Simon, Anthony Durkowski, Christian Stoller
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Publication number: 20150056804Abstract: According to one embodiment of the present invention, a method of plating a TSV hole in a substrate is provided. The TSV hole may include an open end terminating at a conductive pad, a stack of wiring levels, and a plurality of chip interconnects. The method of plating a TSV may include attaching a handler to the plurality of chip interconnects, the handler having a conductive layer in electrical contact with the plurality of chip interconnects; exposing a closed end of the TSV hole, including the conductive pad, to an electrolyte solution; and applying an electrical potential along an electrical path from the conductive layer to the conductive pad causing conductive material from the electrolyte solution to deposit on the conductive pad and within the TSV hole, the electrical path including the conductive layer, the plurality of chip interconnects, the stack of wiring levels and the conductive pad.Type: ApplicationFiled: October 24, 2014Publication date: February 26, 2015Inventors: Mukta G. Farooq, John A. Fitzsimmons, Troy L. Graves-Abe
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Publication number: 20150036046Abstract: Optoelectronic modules include an optoelectronic device and a transparent cover. A non-transparent material is provided on the sidewalls of the transparent cover, which can help reduce light leakage from the sides of the transparent cover or can help reduce stray light from entering the module. The modules can be fabricated, for example, in wafer-level processes. In some implementations, openings such as trenches are formed in a transparent wafer. The trenches then can be filled with a non-transparent material using, for example, a vacuum injection tool. When a wafer-stack including the trench-filled transparent wafer subsequently is separated into individual modules, the result is that each module can include a transparent cover having sidewalls that are covered by the non-transparent material.Type: ApplicationFiled: July 24, 2014Publication date: February 5, 2015Inventors: Hartmut Rudmann, Simon Gubser, Susanne Westenhöfer, Stephan Heimgartner, Jens Geiger, Xu Yi, Thng Chong Kim, John A. Vidallon, Ji Wang, Qi Chuan Yu, Kam Wah Leong
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Publication number: 20150029773Abstract: A semiconductor memory cell includes a set of circuit structures, each having column input/output circuits. The semiconductor memory cell further includes a set of replicas corresponding to the column input/output circuits. The set of replicas are non-functional and fills an empty space next to the column input/output circuits and hence, provides context protection for the column input/output circuits.Type: ApplicationFiled: July 23, 2013Publication date: January 29, 2015Applicant: Texas Instruments IncorporatedInventors: Lakshmikantha Holla, Thomas ATON, Steve PRINS, Dharaneedharan S.
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Publication number: 20150029374Abstract: The present disclosure relates to an image sensor, a manufacturing apparatus and method, and an imaging apparatus that are capable of further enlarging a charge accumulation region. In the image sensor of this disclosure, a channel portion of a readout transistor that constitutes a pixel and a floating diffusion are formed so as to be overlaid with each other at least partly. For example, the channel portion and the floating diffusion are formed in the form of a column on a surface of a photodiode that constitutes the pixel. This disclosure can be applied to the manufacturing apparatus and method, and the imaging apparatus, in addition to the image sensor.Type: ApplicationFiled: February 1, 2013Publication date: January 29, 2015Applicant: SONY CORPORATIONInventor: Yoshiaki Kitano
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Publication number: 20150022262Abstract: Embodiments disclosed in the detailed description include a complete system-on-chip (SOC) solution using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) integration technology. The present disclosure includes example of the ability to customize layers within a monolithic 3DIC and the accompanying short interconnections possible between tiers through monolithic intertier vias (MIV) to create a system on a chip. In particular, different tiers of the 3DIC are constructed to support different functionality and comply with differing design criteria. Thus, the 3DIC can have an analog layer, layers with higher voltage threshold, layers with lower leakage current, layers of different material to implement components that need different base materials and the like. Unlike the stacked dies, the upper layers may be the same size as the lower layers because no external wiring connections are required.Type: ApplicationFiled: August 29, 2013Publication date: January 22, 2015Applicant: QUALCOMM IncorporatedInventor: Yang Du
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Publication number: 20140369386Abstract: A microfluidic-based sensor, comprising: a semiconductor body, having a first and a second side opposite to one another in a direction; a buried channel, extending within the semiconductor body; a structural layer, of dielectric or insulating material, formed over the first side of the semiconductor body at least partially suspended above the buried channel; and a first thermocouple element, including a first strip, of a first electrical conductive material, and a second strip, of a second electrical conductive material different from the first electrical conductive material, electrically coupled to the first strip. The first thermocouple element is buried in the structural layer and partially extends over the buried channel at a first location. A corresponding manufacturing method is disclosed.Type: ApplicationFiled: June 18, 2014Publication date: December 18, 2014Inventors: Praveen Kumar Radhakrishnan, Dino Faralli
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Publication number: 20140353529Abstract: A method for making an optical receiver assembly that can receive optical signals via an input optical fiber and can generate output electrical signals, including the following steps: providing an open-ended cavity formed of insulating material, such as a ceramic, comprising a base, peripheral sidewalls, and an open end opposite the base, the outside surface of the base defining a first surface and the inside surface of the base defining a second surface; disposing a first conductive region on a portion of the first surface and a second conductive region on a portion of the second surface; mounting, on the first surface, a semiconductor photodetector device having an active region for communicating optically with the input optical fiber, and coupling an electrical output of the photodetector device with the first conductive region; mounting, on the second surface, an amplifier that is electrically coupled with the second conductive region and produces the output electrical signals; and providing at least oneType: ApplicationFiled: May 29, 2014Publication date: December 4, 2014Applicant: QUANTUM ELECTRO OPTO SYSTEMS SDN. BHD.Inventors: Teyo Tuan Chin, Gabriel Walter
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Publication number: 20140347818Abstract: A power semiconductor module includes a substrate and a two-part cooling system arranged under the substrate. The cooling system has upper and lower pieces. The upper piece forms a flow channel with the substrate for a cooling liquid. The upper piece has a first inflow and an outflow, through which the cooling liquid can be introduced into the flow channel and removed. The upper piece also has at least one second inflow, which is spaced apart from the first inflow in a longitudinal direction. The lower piece has an inlet and an outlet, the outlet being connected to the outflow and the inlet being connected to the first inflow. The lower piece also has a channel branching off from the inlet, which includes at least one bypass channel, which is connected to the second inflow, so part of the cooling liquid passes through the bypass channel into the flow channel.Type: ApplicationFiled: May 20, 2014Publication date: November 27, 2014Inventors: Andre Uhlemann, Thorsten Fath
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Publication number: 20140340901Abstract: Techniques to fabricate and assemble a lighting system including multiple patterned OLED lighting panels to form a high-resolution macro image are provided. An image to be displayed is determined and divided into multiple portions. Patterned static OLED lighting panels that display each portion of the image are fabricated and assembled into a fixture to form a macro-image lighting system. The fixture may removably receive and hold individual panels, such that each panel may be replaced if any malfunction occurs. Each of the patterned OLED panels may be individually driven through an electrical connection within the fixture so as to be operated at substantially the same brightness and/or same chromaticity.Type: ApplicationFiled: May 15, 2014Publication date: November 20, 2014Applicant: UNIVERSAL DISPLAY CORPORATIONInventors: Emory Krall, Huiqing Pang, Jason Paynter, Jeffrey Silvernail, Ruiqing Ma
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Patent number: 8888869Abstract: Provided herein are methods, apparatuses and systems for fabricating photovoltaic cells and modules. In certain embodiments, the methods, apparatuses and systems involve coating ferromagnetic substrates with thin film solar cell materials and using magnetic force to constrain, move or otherwise manipulate partially fabricated cells or modules. According to various embodiments, the methods, apparatuses and systems provide magnetically actuated handling throughout a photovoltaic cell or module fabrication process, from forming photovoltaic cell layers on a substrate to packaging the module for transport and installation. The magnetically manipulated processing provides advantages over conventional photovoltaic module processing operations, including fewer mechanical components, greater control over placement and tolerances, and ease of handling. As a result, the methods, apparatuses and systems provide highly efficient, low maintenance photovoltaic module fabrication processes.Type: GrantFiled: September 15, 2011Date of Patent: November 18, 2014Assignee: Hanergy Holding Group Ltd.Inventors: Bruce Krein, Darin Birtwhistle, Jeff Thompson, William Sanders, Paul Alexander
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Publication number: 20140334108Abstract: A semiconductor package module including a self-assembled organic molecule layer and a method of manufacturing the semiconductor package module is provided. The semiconductor package module may include a module printed circuit board (PCB) having a plurality of metal line patterns and a plurality of mounting pads formed thereon. The semiconductor package may further include an insulation thin film self-assembled on at least one metal line pattern selected from among the plurality of metal line patterns. In order to manufacture the semiconductor package module, the insulation thin film is formed in a manner that the plurality of metal line patterns are formed on the module PCB wherein a plurality of via holes are formed, and then an organic compound is self-assembled on a surface of at least one metal line pattern selected from the plurality of metal line patterns.Type: ApplicationFiled: July 24, 2014Publication date: November 13, 2014Inventors: Jin-San JUNG, Joo-Han LEE, Jung-Chan CHO, Hyun-Seok CHOI
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Publication number: 20140331462Abstract: Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.Type: ApplicationFiled: July 23, 2014Publication date: November 13, 2014Inventors: Wen-Hsiung Lu, Ming-Da Cheng, Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chun-Cheng Lin, Chung-Shi Liu
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Patent number: 8883640Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.Type: GrantFiled: May 13, 2013Date of Patent: November 11, 2014Assignee: Novellus Systems, Inc.Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
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Publication number: 20140326791Abstract: An RFID tag is provided which does not give a user a feeling of strangeness even when contacting his/her body and is firmly attachable to a fabric such as clothes. The RFID tag is for wireless communications and includes a main antenna 30 formed by a conductive fiber, a loop antenna 12 electrically coupled to the main antenna 30 without direct conductive connection, a semiconductor device 20 electrically connected to a terminal 16 of the loop antenna 12, and a resin 28 collectively sealing the main antenna 30, the loop antenna 12, and the semiconductor device 20.Type: ApplicationFiled: September 6, 2012Publication date: November 6, 2014Applicant: APIC YAMADA CORPORATIONInventors: Fumihito Ishida, Masao Nishizawa, Kenji Kida, Tadahiko Hirano
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Publication number: 20140327412Abstract: Power switching circuits including an inductive load and a switching device are described. The switches devices can be either low-side or high-side switches. Some of the switches are transistors that are able to block voltages or prevent substantial current from flowing through the transistor when voltage is applied across the transistor.Type: ApplicationFiled: July 16, 2014Publication date: November 6, 2014Inventors: James Honea, Yifeng Wu
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Publication number: 20140321008Abstract: An RF switch with inter-domain ESD protection. The RF switch comprises an RF domain section having a plurality of RF switching elements; and a DC domain section having circuitry configured for driving the RF switching elements. At least one primary ESD protection element is operably coupled between the RF domain section and DC domain section.Type: ApplicationFiled: April 26, 2013Publication date: October 30, 2014Applicant: FERFICS LIMITEDInventors: JOHN KEANE, John O'Sullivan, Ian O'Regan
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Publication number: 20140317896Abstract: A method of manufacturing a semiconductor device uses a mounting jig having an insulated circuit board positioning jig, a tubular contact element positioning jig having a plurality of positioning holes formed at predetermined positions to insert a tubular contact element, and a tubular contact element press-down jig. By the insulated circuit board positioning jig and tubular contact element positioning jig, an insulated circuit board and the tubular contact elements are positioned, and the tubular contact elements are soldered to the insulated circuit board while being pressed down by the tubular contact element press-down jig.Type: ApplicationFiled: March 11, 2014Publication date: October 30, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Kenshi KAI, Nobuyuki KANZAWA, Mitsutoshi SAWANO
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Publication number: 20140311546Abstract: A method for disconnecting a photovoltaic assembly, wherein the photovoltaic assembly includes the following: a string having a plurality of photovoltaic modules having a plurality of solar cells, an electrical line, which connects the individual photovoltaic modules to one another to form the string and serve the purpose of conducting the current produced by the individual solar cells in the photovoltaic modules to a common inverter. The photovoltaic assembly is disconnected by a disconnection signal in a hazard situation. Furthermore, in order to ensure increased safety in an emergency situation, provision is made for the disconnection signal to be conducted via the electrical line to the individual photovoltaic modules in the string, for the disconnection signal to be detected at the respective photovoltaic module and for the respective photovoltaic module to be disconnected via a switching device arranged at the respective photovoltaic module.Type: ApplicationFiled: December 13, 2011Publication date: October 23, 2014Inventors: Ingmar Kruse, Roustam Asimov
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Publication number: 20140315480Abstract: Device for the air-conditioning and/or monitoring of building or warehouse areas, containing a housing consisting of plastic or composite material shaped as a hollow body and having air entry, air guidance and air exit sections, at least one fan roller provided with a plurality of profiled fins made of composite material or plastic, and drivable by at least one electric motor, the fan roller being positionable inside the housing, and a casing for the housing, formed by a flexible plastic or composite material panel that can be connected to the housing, wherein an end section of the casing can be releasably connected to a housing section, an approximately arc-shaped contour of the casing is formed by bending the casing lying outside the housing, and after further bending of the casing, the free end thereof can be releasably fastened to a different housing section.Type: ApplicationFiled: September 14, 2012Publication date: October 23, 2014Applicant: LSE GMBHInventor: Robert Falk
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Publication number: 20140313642Abstract: A power conversion apparatus includes plural press-pack power semiconductor devices; plural thermal and electric conducting blocks provided among the plural press-pack power semiconductor devices; and plural bus bars provided among the plural press-pack power semiconductor devices and the plural thermal and electric conducting blocks to form a first column that is clamped under a predetermined mechanical force. The plural bus bars are directly pressed in the first or more columns for electrical connection, at least one of the press-pack power semiconductor devices is sandwiched between two thermal and electrical conducting blocks, and at least one of the bus bars is sandwiched between two thermal and electric conducting blocks. A method for assembling the power conversion apparatus is also provided. The apparatus and the method can provide optimum heat transfer for press-pack power semiconductor devices and minimum commutation loss and stress.Type: ApplicationFiled: November 4, 2011Publication date: October 23, 2014Inventors: Fan Zhang, Junfeng Sheng, Xiaodan Zhang, Richard S. Zhang
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Publication number: 20140293552Abstract: A power semiconductor module, and method for its manufacture, comprising a first housing part having a cutout and a DC voltage load connection apparatus forming a structural unit, wherein the DC voltage load connection apparatus has first and second DC voltage load connection elements. The first DC voltage load connection element has a first leadthrough section arranged in the cutout, and the second DC voltage load connection element has a second leadthrough section arranged in the cutout forming a gap therebetween. The first and second leadthrough sections are sheathed by an elastomer, which fills the gap, is cohesively connected to the first and second leadthrough sections and seals off the first and second leadthrough sections with respect to the first housing part. The inventive power semiconductor module exhibits a high resistance to thermal cycling, and the distance between the DC voltage load connection elements can be configured to be small.Type: ApplicationFiled: March 27, 2014Publication date: October 2, 2014Applicant: Semikron Elektronik GmbH & Co., KGInventors: Ingo BOGEN, Jörn GROßMANN, Christian WALTER, Christian GÖBL
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Publication number: 20140292137Abstract: The subject matter here is an actuation device (1) comprising an actuation element (3) including a fixed portion (31) and a driving portion (32); wherein the fixed portion (31) includes a crawling surface (311), the driving portion (32) includes a flexible moveable blade (321) positioned in parallel and at a distance from the crawling surface (311), and wherein, when a power supply voltage is applied between the moveable blade (321) and the crawling surface (311), the free end (3211) comes into contact with the crawling surface (311), and a contact area, between the moveable blade (321) and the crawling surface (311), increases by propagation of the crawling front (3213) along the moveable blade (321), the propagation of the crawling front displacing the moveable blade (321) according to a first orientation.Type: ApplicationFiled: November 26, 2013Publication date: October 2, 2014Applicants: SILMACH, UNIVERSITE DE FRANCHE-COMTE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS)Inventors: Patrice Le Moal, Gilles Bourbon, Patrice Minotti, Paul Vescovo
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Publication number: 20140291796Abstract: There is provided an imaging device including a semiconductor having a light-receiving portion that performs photoelectric conversion of incident light, electrically conductive wirings, and a contact group including contacts that have different sizes and connect the semiconductor and the electrically conductive wirings.Type: ApplicationFiled: March 14, 2014Publication date: October 2, 2014Applicant: Sony CorporationInventors: Shunsuke Ishii, Satoshi Keino, Tomohiro Wada
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Patent number: 8849446Abstract: The present invention provides an efficient transferring control method in a vacuum processing apparatus of a linear tool in which plural vacuum robots are arranged in transferring mechanical units to which process chambers are connected and processing-target members are passed and received among the plural vacuum robots. In addition, the present invention provides a vacuum processing apparatus in which there are provided plural controlling methods, and a unit which determines whether rates of the transferring robots are to be controlled or rates of the process chambers are to be controlled on the basis of processing time of each processing-target member and switches the controlling method in accordance with a site whose rate is controlled.Type: GrantFiled: February 7, 2011Date of Patent: September 30, 2014Assignee: Hitachi High-Technologies CorporationInventors: Teruo Nakata, Hideaki Kondo, Susumu Tauchi, Keita Nogi
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Publication number: 20140283937Abstract: Provided are an electronic control mixing valve and a semiconductor manufacturing apparatus using the same that are capable of controlling a temperature of a chuck base by supplying recirculation oils using a slidable mixing valve or a rotatable mixing valve, which is electrically controlled.Type: ApplicationFiled: February 12, 2014Publication date: September 25, 2014Inventor: Soon Chang LEE
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Publication number: 20140288428Abstract: To implement a single-chip ultrasonic imaging solution, on-chip signal processing may be employed in the receive signal path to reduce data bandwidth and a high-speed serial data module may be used to move data for all received channels off-chip as digital data stream. The digitization of received signals on-chip allows advanced digital signal processing to be performed on-chip, and thus permits the full integration of an entire ultrasonic imaging system on a single semiconductor substrate. Various novel waveform generation techniques, transducer configuration and biasing methodologies, etc., are likewise disclosed. HIFU methods may additionally or alternatively be employed as a component of the “ultrasound-on-a-chip” solution disclosed herein.Type: ApplicationFiled: March 13, 2014Publication date: September 25, 2014Applicant: Butterfly Network, Inc.Inventors: Jonathan M. Rothberg, Keith G. Fife, Tyler S. Ralston, Gregory L. Charvat, Nevada J. Sanchez
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Patent number: 8842418Abstract: Provided is a method for forming a capacitor. The method includes: providing an anode with a dielectric thereon and a conductive node in electrical contact with the anode; applying a conductive seed layer on the dielectric; forming a conductive bridge between the conductive seed layer and the conductive node; applying voltage to the anode; electrochemically polymerizing a monomer thereby forming an electrically conducting polymer of monomer on the conductive seed layer; and disrupting the conductive bridge between the conductive seed layer and the conductive node.Type: GrantFiled: September 21, 2011Date of Patent: September 23, 2014Assignee: Kemet Electronics CorporationInventors: Jeffrey Poltorak, Brandon K. Summey, Yongjian Qiu
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Publication number: 20140266399Abstract: An integrated circuit can comprise: a first port, a second port, and a third port; and a plurality of microwave operational amplifiers coupled to each other and the first port, the second port, and the third port. The plurality of microwave operational amplifiers can be arranged to substantially pass a signal provided to the first port to the second port while substantially isolating the signal provided to the first port from the third port; the plurality of microwave operational amplifiers can be arranged to substantially pass a signal provided to the second port to the third port while substantially isolating the signal provided to the second port from the first port; and the plurality of microwave operational amplifiers can be arranged to substantially pass a signal provided to the third port to the first port while substantially isolating the signal provided to the third port from the second port.Type: ApplicationFiled: March 7, 2014Publication date: September 18, 2014Inventors: David W. Corman, Glenn Diemond, Donald E. Crockett, III, David W. Self
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Publication number: 20140264397Abstract: Light emitter devices, such as light emitting diode (LED) devices and related methods are disclosed. A light emitter device includes a ceramic based substrate, at least one LED chip disposed on the substrate, and a filling material. The ceramic substrate can include one or more surface features. The filling material can be disposed over and/or within a portion of the one or more surface features. Surface features can include one or more pedestals, trenches, holes, indentions, depressions, waves, and/or convexly or concavely curved surfaces. Surface features can improve optics of the LED device, for example, improving brightness, reflection, and/or light extraction associated with the device. Related methods are disclosed.Type: ApplicationFiled: March 17, 2014Publication date: September 18, 2014Inventors: Erin R. F. Welch, Harry A. Seibel, II, Christopher P. Hussell
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Patent number: 8834582Abstract: The present invention provides an apparatus for manufacturing semiconductor wafer comprising at least two manipulators, at least one set of chemical gas/liquid distribution unit and an air circulating and filtering unit. The air circulating and filtering unit is separated into three regions, including the front region, the middle region, and the side region, which are controlled by respective control electric motors to achieve uniform air flow and uniform pressure in the respective regions. The cleaning degree in the internal of the apparatus can be improved by the regional control of the air circulating and filtering unit; the wafer transport efficiency can be enhanced by the double-armed manipulators having multiple degrees of freedom; and the product yield per unit area can be increased by the chemical gas/liquid distribution unit providing stable and uniform gas/liquid flow and pressure.Type: GrantFiled: June 13, 2012Date of Patent: September 16, 2014Assignee: Beijing Sevenstar Electronics Co., Ltd.Inventors: Hongyu Zhao, Xiaohong Zhang, Likun Pei, Bao Zhang, Ruiting Wang
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Patent number: 8836478Abstract: An electronic device may include a housing and circuitry carried by the housing. The electronic device may also include a finger sensing device carried by the housing and coupled to the circuitry. The finger sensing device may include a mounting substrate, and a semiconductor interposer having a lower surface adjacent the mounting substrate. The finger sensing device may also include a plurality of semiconductor finger sensing die on an upper surface of the semiconductor interposer in side-by-side and abutting relation, and defining a finger sensing surface to receive at least one finger thereon.Type: GrantFiled: September 25, 2011Date of Patent: September 16, 2014Assignee: Authentec, Inc.Inventors: Robert H. Bond, Giovanni Gozzini
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Publication number: 20140246768Abstract: A semiconductor device that improves noise performance includes a circuit substrate, an enclosing case, and a metal part. A control circuit is mounted on the front surface of the circuit substrate. The enclosing case is a resin case in which semiconductor elements are installed. The metal part, included inside the enclosing case, includes a first mounting portion, a second mounting portion, and a bus bar. The first mounting portion mounts the circuit substrate on the enclosing case, and is connected to a ground pattern of the circuit substrate when mounting. The second mounting portion mounts an external instrument on the enclosing case, and is grounded when mounting. The bus bar connects the first mounting portion and second mounting portion.Type: ApplicationFiled: May 13, 2014Publication date: September 4, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventor: Shin SOYANO
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Publication number: 20140240952Abstract: An optical assembly that installs red, green, blue laser diodes (LDs) within a single package is disclosed. The LDs are mounted on a base via respective sub-mounts. Light emitted from the LDs is collimated by collimating lenses and multiplexed by two wavelength filters so as to align optical axes of the light. The multiplexed light has an axis substantially leveled with the axes of the red, green, and blue light measured from the top of the base.Type: ApplicationFiled: February 27, 2014Publication date: August 28, 2014Applicant: Sumitomo Electric Industries, Ltd.Inventors: Hiromi NAKANISHI, Takeshi OKADA
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Patent number: 8814954Abstract: The method for manufacturing products having a metal surface by imparting microfeatures onto the metal surface. The method if further described as the steps of: creating a transfer tool from a microstructured intermediate fabricated from a microstructured prototype having microfeatures; and, transferring the microfeatures to said metal surface using the transfer tool.Type: GrantFiled: August 26, 2010Date of Patent: August 26, 2014Assignee: Hoowaki, LLCInventors: Ralph A. Hulseman, David Mammarella, Andrew H. Cannon, William P. King
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Publication number: 20140233152Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming an electrochemical capacitor device by forming pores in low-purity silicon materials. Various embodiments described herein enable the fabrication of high capacitive devices using low cost techniques.Type: ApplicationFiled: December 27, 2011Publication date: August 21, 2014Inventors: Donald S. Gardner, Cary L. Pint, Charles W. Holzwarth, Wei Jin, Zhaohui Chen, Yang Liu, Eric C. Hannah, John L. Gustafson
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Patent number: 8808402Abstract: An arrangement (1) for holding a substrate (10) in a material deposition apparatus, which substrate (10) has a deposition side (10a) upon which material (M) is to be deposited, and which arrangement (1) comprises: a shadow mask (20) comprising a number of deposition openings (Di); a support structure (30) comprising a number of surround openings (Si); and a support structure holding means (6) for holding the support mask (30) and/or a substrate holding means (5) for holding the substrate (10), such that the support structure (30) is on the same side as the deposition side (10a) of the substrate (10), and the shadow mask (20) is positioned between the substrate (10) and the support structure (30) such that at least one deposition opening (Di) of the shadow mask (10) lies within a corresponding surround opening (Si) of the support structure (30).Type: GrantFiled: March 29, 2010Date of Patent: August 19, 2014Assignee: OSRAM Opto Semiconductors GmbHInventors: Johannes Krijne, Erwin Eiling, Karl-Heinz Hohaus, Wolfgang Goergen, Andreas Lovich, Marc Philippens, Richard Scheicher, Ansgar Fischer, Martin Mueller
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Publication number: 20140220774Abstract: A method of forming external terminals of a package is provided in which a package substrate may be fixed, an edge portion of the package substrate may be supported to prevent the edge portion of the package substrate from being upwardly bent, a mask having openings may be arranged on the package substrate, and the external terminals may be supplied to the package substrate through the openings of the mask. The supporting portion may downwardly press the edge portion of the package substrate so that the edge portion of the package substrate may not be upwardly bent. As a result, the external terminals on the package substrate may have a uniform thickness.Type: ApplicationFiled: February 4, 2014Publication date: August 7, 2014Applicant: Samsung Electronics Co., LtdInventors: Yo-Se EUM, Sang-Geun KIM, Seok-Yong LEE
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Publication number: 20140208554Abstract: The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.Type: ApplicationFiled: November 15, 2013Publication date: July 31, 2014Applicant: SPANSION LLCInventors: Akira Ogawa, Masaru Yano
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Publication number: 20140211546Abstract: Static random access memories (SRAM) with read-preferred cell structures and write drivers are disclosed. In one embodiment, the SRAM has a six transistor bit cell. The read-preferred bit cell is implemented by providing two inverters, each having a pull up transistor, a pull down transistor and a pass gate transistor. Each pull up transistor is associated with a feedback loop. The feedback loop improves random static noise margin. Each transistor has a width and a length. The lengths of the pass gate transistors are increased. The widths of the pull down transistors are equal to one another and also equal to the widths of the pass gate transistors. The widths of the pass gate and pull down transistors may also be increased relative to prior designs. A write assist circuit may also be used to improve performance.Type: ApplicationFiled: April 24, 2013Publication date: July 31, 2014Applicant: Industry-Academic Cooperation Foundation, Yonsei UniversityInventors: Seong-Ook Jung, Younghwi Yang, Bin Yang, Zhongze Wang, Choh fei Yeap
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Publication number: 20140204536Abstract: A semiconductor module arrangement is provided having a first subassembly, a second subassembly and a third subassembly. The third subassembly has a quantity of adjustment pins which are fixedly connected to one another. The first subassembly has a number N1 of first adjustment openings, and the second subassembly has a number N2 of second adjustment openings. Each of the adjustment pins engages into a different one of the first adjustment openings and/or into one of the second adjustment openings. A corresponding method of producing the semiconductor module arrangement is also provided.Type: ApplicationFiled: January 22, 2014Publication date: July 24, 2014Inventors: Patrick Jones, Christoph Koch, Michael Sielaff
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Publication number: 20140189989Abstract: The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single types of substrates in multiple types of cleanspace environments. In some embodiments, a collocated composite cleanspace fabricator may be capable of processing semiconductor devices into integrated circuits and then performing assembly operations to result in product in packaged form.Type: ApplicationFiled: March 14, 2013Publication date: July 10, 2014Inventor: Frederick A. Flitsch
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Publication number: 20140187960Abstract: Sold-state intravascular ultrasound (IVUS) imaging devices, systems, and methods are provided. Some embodiments of the present disclosure are particularly directed to compact and efficient circuit architectures and electrical interfaces for an ultrasound transducer array used in a solid-state IVUS system. In one embodiment, an intravascular ultrasound (IVUS) device includes: a flexible elongate member; an ultrasound scanner assembly disposed at a distal portion of the flexible elongate member, the ultrasound scanner assembly including an ultrasound transducer array; an interface coupler disposed at a proximal portion of the flexible elongate member; and a cable disposed within and extending along a length of the flexible elongate member between the ultrasound scanner assembly and the interface coupler. The cable includes four conductors electrically coupling the ultrasound scanner assembly and the interface coupler.Type: ApplicationFiled: December 20, 2013Publication date: July 3, 2014Applicant: Volcano CorporationInventor: Paul Douglas Corl
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Publication number: 20140186999Abstract: An apparatus for the wafer level packaging (WLP) of micro-bolometer vacuum package assemblies (VPAs), in one embodiment, includes a wafer alignment and bonding chamber, a bolometer wafer chuck and a lid wafer chuck disposed within the chamber in vertically facing opposition to each other, means for creating a first ultra-high vacuum (UHV) environment within the chamber, means for heating and cooling the bolometer wafer chuck and the lid wafer chuck independently of each other, means for moving the lid wafer chuck in the vertical direction and relative to the bolometer wafer chuck, means for moving the bolometer wafer chuck translationally in two orthogonal directions in a horizontal plane and rotationally about a vertical axis normal to the horizontal plane, and means for aligning a fiducial on a bolometer wafer held by the bolometer wafer chuck with a fiducial on a lid wafer held by the lid wafer chuck.Type: ApplicationFiled: December 26, 2013Publication date: July 3, 2014Applicant: FLIR Systems, Inc.Inventors: Paul Schweikert, Andrew Sharpe, Gregory A. Carlson, Alex Matson, Scott Vilander, Bob Zahuta, Richard M. Goeden
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Publication number: 20140183610Abstract: A decoupling capacitor formed from a fin field-effect transistor (FinFET) and method of using the same are provided. An embodiment decoupling capacitor includes a fin field-effect transistor (FinFET) having a semiconductor substrate supporting a gate stack, a source, and a drain, a first terminal coupled to the semiconductor substrate and to the gate stack, the first terminal configured to couple with a first power rail, and a second terminal coupled to the source and to the drain, the second terminal configured to couple with a second power rail having a higher potential than the first power rail.Type: ApplicationFiled: January 29, 2013Publication date: July 3, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jam-Wem Lee, Yi-Feng Chang
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Publication number: 20140160691Abstract: There is provided a semiconductor module capable of being easily manufactured. The semiconductor module includes: a control part including at least one control device; and a power part including at least one power device, wherein any one of the control part and the power part includes contact pins having elasticity, and the control part and the power part are electrically connected to each other by the contact pins.Type: ApplicationFiled: December 4, 2013Publication date: June 12, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Young Ho SOHN, Eun Jung JO, Jae Hyun LIM, Tae Hyun KIM