With Amplitude Control Patents (Class 327/140)
  • Patent number: 10423201
    Abstract: An information handling system includes an application processor that executes instructions of an intelligent energy management system that determines energy demands for an enterprise, application processor determines a statistical model of power demand estimation for a client in the enterprise. The information handling system includes a network adapter that receives component device utilization data from client, and includes a memory device that stores component device utilization data received from the client. The application processor determines power consumption for component devices across the enterprise that has the client for use in the statistical model of consumed power.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: September 24, 2019
    Assignee: Dell Products, LP
    Inventors: Michael S. Gatson, Joseph Kozlowski, Yuan-Chang Lo, Nikhil M. Vichare
  • Patent number: 10065561
    Abstract: Embodiments are disclosed for generating masking sounds in a vehicle, such as an at least partially electric vehicle. An example sound generation system in a vehicle includes a speaker, a processor, and a storage device holding instructions executable by the processor to modulate a sound characteristic of a first frequency range of a synthetic sound to generate a modulated synthetic sound portion while maintaining the sound characteristic of a second frequency range of the synthetic sound that is lower than the first frequency range to generate an unmodulated synthetic sound portion. The instructions are further executable to output a combined synthetic sound including both the modulated synthetic sound portion and the unmodulated synthetic sound portion. The sound characteristic of the first frequency range may be modulated as a function of a vehicle operating parameter.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: September 4, 2018
    Assignee: Harman International Industries, Incorporated
    Inventors: Kevin J. Bastyr, Antonio Gomez
  • Patent number: 9000813
    Abstract: Waveform generation circuits are provided. A waveform generation circuit includes a waveform generation block configured to generate a waveform signal corresponding to a driving control signal, and a control signal generation block configured to generate the driving control signal to compensate the waveform signal for an environmental factor affecting the waveform generation circuit.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: April 7, 2015
    Assignee: Magnachip Semiconductor, Ltd.
    Inventor: Kyu-Young Chung
  • Patent number: 8896356
    Abstract: A ramp output control device includes a driver configured to receive at least two inputs from a microcontroller. The driver includes a time duration register configured to store a current clock count until a preset time duration is reached. The driver also includes a ramp output register configured to store a current output value at an output of the device. The driver also includes a calculation block configured to determine whether to increase the current output value at the output based on the at least two inputs.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: November 25, 2014
    Assignee: NXP B.V.
    Inventor: Mikhail Svoiski
  • Publication number: 20140132314
    Abstract: There is provided a triangular waveform generating apparatus. The triangular waveform generating apparatus includes: a capacitor connected between an output terminal and a ground; a charging/discharging unit including a plurality of current sources to charge the capacitor with currents generated from the plurality of current sources or discharge currents therefrom; and a control unit comparing a charge voltage of the capacitor with a plurality of preset reference voltages and controlling the charging/discharging unit to allow a quantity of current charged in or discharged from the capacitor to be different in each of a plurality of periods formed by the plurality of reference voltages.
    Type: Application
    Filed: February 19, 2013
    Publication date: May 15, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Joo Yul KO
  • Patent number: 8629667
    Abstract: Disclosed herein are pulse width modulator (PWM) solutions with comparators not relying on a variable reference to adjust duty cycle. In accordance with some embodiments, a pulse width modulator having a comparator with an applied adjustable waveform to generate a bit stream with a controllably adjustable duty cycle is provided.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: January 14, 2014
    Assignee: Intel Corporation
    Inventors: Fabrice Paillet, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Sung T. Moon, Donald S. Gardner
  • Patent number: 8618848
    Abstract: A clock generator with comparator error compensation includes an amplifier which develops an error voltage based on a difference between a sample voltage of a charge voltage and a predetermined reference voltage. The charge voltage develops a clock signal, such as a sawtooth waveform. A comparator compares the charge voltage with the error voltage to develop a compare signal. A sample and discharge control network is operative to develop the sample voltage in response to the compare signal, and then to switch between charging and discharging of the charge voltage. The amplifier develops the error voltage to ensure that the charge voltage switches at a level of the reference voltage to eliminate comparator errors, such as switching delay or input offset voltage. A second comparator and another amplifier may be provided to control switching in both directions, such as for developing a triangular waveform or the like.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 31, 2013
    Assignee: Touchstone Semiconductor, Inc.
    Inventor: SanHwa Chee
  • Patent number: 8604845
    Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hui Dong Lee, Jaewon Nam, Young Kyun Cho, Jong-Kee Kwon, Yil Suk Yang, Jongdae Kim
  • Publication number: 20130027094
    Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.
    Type: Application
    Filed: June 4, 2012
    Publication date: January 31, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hui Dong LEE, Jaewon Nam, Young Kyun Cho, Jong-Kee Kwon, Yil Suk Yang, Jongdae Kim
  • Patent number: 8294495
    Abstract: A circuit includes a level-crossing detector to generate a level-crossing detection signal when an input signal crosses a predetermined voltage level. A first stage set of capacitors is operatively coupled to the level-crossing detector. A ramp circuit is operatively coupled to the set of series-connected capacitors. A second stage set of capacitors is operatively coupled to the first stage set of capacitors and the ramp circuit. The ramp circuit includes a feedback capacitor and a preset switch to provide a linear ramp output.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: October 23, 2012
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Hae-Seung Lee
  • Patent number: 8188772
    Abstract: A waveform generation circuit includes: a waveform generation block configured to generate a waveform signal corresponding to a driving control signal; and a control signal generation block configured to generate a driving control signal for compensating the waveform signal for an environmental factor reflected into the waveform generation circuit.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: May 29, 2012
    Assignee: Magnachip Semiconductor, Ltd.
    Inventor: Kyu-Young Chung
  • Publication number: 20120037791
    Abstract: An image sensor includes a band gap reference unit configured to provide a reference voltage having a predetermined voltage level, a storage unit configured to store the reference voltage, a switch configured to selectively connect the storage unit to the band gap reference unit, and a ramp signal generation unit configured to receive an input voltage corresponding to the reference voltage stored in the storage unit and generate a ramp signal.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 16, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hee Bum LEE, Tae Woo KIM
  • Patent number: 8115523
    Abstract: An apparatus is provided. The apparatus comprises a first current source and a second current source that charge and discharge a capacitor. Coupled between the capacitor and the second current source is a switch that can be actuated and deactuated by a controller. Preferably, the controller is coupled to the capacitor and receives a first threshold voltage and a second threshold voltage so that it can actuate the switch if the voltage across the capacitor is greater than the first threshold voltage and deactuate the switch if the voltage across the capacitor is less than the second threshold voltage. Additionally, there is a comparator that is coupled to the capacitor that compares the voltage across the capacitor to a reference voltage, and there is a a multiplexer that is coupled to the capacitor and that is coupled to the comparator.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: February 14, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Brian Thomas Lynch
  • Patent number: 7834592
    Abstract: A circuit includes a pulse transformer having primary and secondary windings. An oscillating waveform is applied to the primary winding to induce an oscillating waveform at the secondary winding. A transistor in series with a first resistor is coupled between the secondary winding and the ground. An R-C network formed by a second and a third resistor and a capacitor is coupled to a base junction of the transistor. The R-C network causes a slow, tapered linear pinch off of the transistor's conductance to enable the circuit to output a triangular waveform, which is characterized by a relatively short linear rise time followed by a substantially long linear fall time. The R-C network is coupled to the secondary winding via a first and a second diode, respectively.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: November 16, 2010
    Assignee: PulseTech Products Corporation
    Inventors: Pete Ward Smith, James Earl Huffman, David Lee Sykes, Clyde Ray Calcote
  • Patent number: 7800419
    Abstract: A dual differential sawtooth signal generator includes a first sawtooth voltage generator that has a first capacitor and a second capacitor that are alternately charged with a feedback control source current from a low voltage reference voltage level. A second sawtooth voltage generator has a first discharge capacitor and a second discharge capacitor that are alternately discharged with a feedback control sink current from a high voltage reference voltage level. The output signals of the two sawtooth voltage generators are compared to control a phase frequency comparator that provides signals to control a dual charge pump that provides the feedback control source current and that provides the feedback control sink current.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: September 21, 2010
    Assignee: Atmel Corporation
    Inventors: Daniel Payrard, Michel Cuenca, Eric Brunet
  • Publication number: 20100231272
    Abstract: A buck-boost power converter includes a power stage to convert an input voltage to an output voltage, an error amplifier to generate an error signal according to a reference voltage and a feedback signal proportional to the output voltage, a ramp generator to provide two ramp signals, and two comparators to generate two control signals according to the error signal and the two ramp signals to drive the power stage. By using feed-forward technique, one of the two ramp signals has a peak varying with the input voltage and the other ramp signal has a valley varying with the input voltage, so that the power converter has fast line response.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 16, 2010
    Applicant: RICHTEK TECHNOLOGY CORP.
    Inventors: KE-HORNG CHEN, PIN-CHIN HUANG, HSIN-HSIN HO
  • Patent number: 7746129
    Abstract: A low power servo-controlled single clock ramp generator (100) includes a fast switched comparator (102), charge pump (110) and voltage-to-current converter (120) connected to provide a feedback control mechanism under control of a pulse comparison clock signal (pulse_comp) and a reset pulse clock signal (rst_pulse) that are generated from a single input clock signal (clkin) so that there are well defined time intervals between pulses in the pulse comparison clock signal and the reset pulse clock signal, thereby providing a ramp signal (Vramp_out) having a stable, frequency-independent amplitude that is not limited by the reference voltage.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: June 29, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jung Hyun Choi, Fernando Chavez Porras
  • Patent number: 7741887
    Abstract: Triangular wave oscillation circuits generate A-wave and B-wave with phases opposite to each other, and are capable of independently controlling oscillation levels of the A-wave and the B-wave. A slope switching circuit including an output voltage monitoring circuit, a slope switching control circuit, and an inverter, monitors output voltages of the triangular wave oscillation circuits, to switch an output voltage generation mode of one triangular wave oscillation circuit whose triangular wave reaches a high level, from an up-slope waveform mode to a down-slope waveform mode, and to switch an output voltage generation mode of the other triangular wave oscillation circuit, from the down-slope waveform mode to the up-slope waveform mode. An oscillation level control circuit controls an oscillation level of the other triangular wave oscillation circuit so that the output voltage of the other of the triangular wave oscillation circuit becomes a reference lower limit crest value during the switching.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: June 22, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Narihiro Kubo
  • Publication number: 20100128552
    Abstract: A high-voltage sawtooth current driving circuit and a memory device including the same are described. In the high-voltage sawtooth current driving circuit includes a charge pump circuit configured to output a first voltage, a regulating circuit configured to regulate a second voltage using the first voltage output from the charge pump circuit, and a sawtooth current driver configured to generate a sawtooth current in response to the second voltage regulated by the regulating circuit.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 27, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Yong Hoon KANG
  • Patent number: 7671642
    Abstract: A sawtooth voltage generator has a first capacitor that is charged with a variable feedback control current to provide a sawtooth output signal with a controlled amplitude. A feedback loop includes a comparator that compares a version of the sawtooth output signal with a fixed voltage reference to provide a comparator output signal to a phase frequency comparator, the output of which controls a source of the variable feedback control current. A method includes controlling the amplitude of a sawtooth output signal by charging a capacitor in a sawtooth voltage generator with a variable feedback control current; comparing a version of the sawtooth output signal with a fixed reference voltage to provide a comparator output signal; processing the comparator output signal in a phase frequency comparator to provide up/down control signals; and controlling the variable feedback control current with the up/down control signals from the phase frequency comparator.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: March 2, 2010
    Assignee: Atmel Corporation
    Inventors: Daniel Payrard, Michel Cuenca, Eric Brunet
  • Publication number: 20090309636
    Abstract: A switching regulator maintain an output voltage substantially constant by using a first comparator that compares a power supply voltage with the output voltage of the switching regulator, a triangle wave formation circuit that changes amplitude of a triangle wave according to an output signal of the first comparator, and a triangle wave generated by the triangle wave formation circuit.
    Type: Application
    Filed: May 7, 2009
    Publication date: December 17, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Yoshitaka Nishigata
  • Patent number: 7583113
    Abstract: A controlled endpoint sawtooth waveform generator and methodology is implemented by a circuit that uses charge sharing between capacitors to produce a sawtooth having one or both endpoints that are suspended between the power supply rail and ground. The circuit may comprise a timing capacitor to which a charging source is coupled, and a switched capacitor coupled to the timing capacitor through a first controlled switch and to a source of switched capacitor reference voltage through a second controlled switch. The first and second controlled switches are responsive to a control signal, that may be internally or externally provided, for mutually exclusive switch operation. An output sawtooth thereby is produced having one endpoint determined by a fixed voltage source and the other endpoint in accord with the capacitance ratio of the timing and switched capacitors.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: September 1, 2009
    Assignee: Linear Technology Corporation
    Inventor: Jonathan W. Celani
  • Patent number: 7557602
    Abstract: A pre-emphasis circuit capable of controlling the slew rate of a signal output from a buffer that transfers the output signal to an output driver to increase the range of a controllable voltage step includes a first buffer, a second buffer, and an output driver. The first buffer buffers first and second main input signals having phases opposite to each other, outputs first and second main output signals, and controls slew rates of the first and second main output signals using at least one main control signal. The second buffer buffers first and second sub-input signals having phases opposite to each other, outputs first and sub-output signals, and controls slew rates of the first and second sub-output signals using at least one sub-control signal. The output driver generates first and second output signals having opposite phases using at least two control signals and the output signals of the first and second buffers.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: July 7, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chi-Won Kim, Myoung-Bo Kwak, Jong-Shin Shin
  • Patent number: 7508243
    Abstract: An accurate intermittent triangular wave signal without waveform distortion is generated by a triangular wave generation circuit 1 including a rectangular wave generation circuit 111 for generating an intermittent rectangular wave signal in which a rectangular wave interval and a direct current interval of a predetermined level are repeated; an integration circuit 12 for generating an intermittent triangular wave signal in which a triangular wave interval and a direct current interval are repeated based on a reference signal and the intermittent rectangular wave signal generated by the rectangular wave generation circuit 111; and a triangular wave correcting circuit 112 for correcting waveform distortion of the intermittent triangular wave signal based on a differential voltage between a starting point and an ending point of the direct current interval of the intermittent triangular wave signal output from the integration circuit 12.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: March 24, 2009
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Yasuhiro Sekiguchi, Masaki Hirōmōri
  • Publication number: 20080157830
    Abstract: The present invention relates to an oscillator outputting two triangle waves having the same amplitude and whose phases are inverted; and a pulse width modulator using the oscillator. A capacitor 3 is charged or discharged by a charge pump circuit 2 controlled by a Schmitt circuit 1, and a voltage integrated by a two-output differential amplification circuit 6 is positively fed back to the input of the Schmitt circuit 1 to output two triangle waves having the same amplitude and whose phases are inverted. Since the output stage is composed of a differential amplification circuit, the circuit has low output impedance and is protected from wiring capacity and connected input capacity, and since integral operation is caused to be performed by the differential amplification circuit, the distortion in the waveform of the triangle waves can be prevented.
    Type: Application
    Filed: December 5, 2007
    Publication date: July 3, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tomohiro Kume
  • Publication number: 20080143394
    Abstract: A sawtooth voltage generator has a first capacitor that is charged with a variable feedback control current to provide a sawtooth output signal with a controlled amplitude. A feedback loop includes a comparator that compares a version of the sawtooth output signal with a fixed voltage reference to provide a comparator output signal to a phase frequency comparator, the output of which controls a source of the variable feedback control current. A method includes controlling the amplitude of a sawtooth output signal by charging a capacitor in a sawtooth voltage generator with a variable feedback control current; comparing a version of the sawtooth output signal with a fixed reference voltage to provide a comparator output signal; processing the comparator output signal in a phase frequency comparator to provide up/down control signals; and controlling the variable feedback control current with the up/down control signals from the phase frequency comparator.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 19, 2008
    Applicant: ATMEL CORPORATION
    Inventors: Daniel Payrard, Michel Cuenca, Eric Brunet
  • Publication number: 20080111591
    Abstract: A ramp generation circuit including, a charge supply unit which generates predetermined charges every predetermined time, an integration circuit which accumulates the charges generated from the charge supply unit and converts the charges into a voltage, and, an attenuation unit which outputs, to an output terminal, a voltage obtained by attenuating a noise value of an output voltage from the integration circuit.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 15, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Akiko Mori
  • Patent number: 7362149
    Abstract: Zero crossings for a non-symmetrical VIN may be determined by first amplifying and clipping VIN to create a non-symmetrical square wave whose zero crossings are those of VIN. A selected polarity edge of the non-symmetrical square wave may be taken as a 0° indicator and is used to create a fundamental sawtooth ramp of the same frequency and in phase with VIN. The fundamental sawtooth ramp starts at zero volts, linearly ramps to some peak and is AC coupled to a comparator whose other input is zero volts. That creates a square wave that is symmetrical as to its half-cycles, and whose every other edge is synchronous with the start of the fundamental sawtooth ramp, and whose intervening edges occur in the middle of the ramp. The intervening edge is detected and taken as a 180° indicator.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: April 22, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Chin Hong Cheah, Lian Ping Teoh
  • Patent number: 7336110
    Abstract: A dual differential sawtooth signal generator includes a first sawtooth voltage generator that has a first capacitor and a second capacitor that are alternately charged with a feedback control source current from a low voltage reference voltage level. A second sawtooth voltage generator has a first discharge capacitor and a second discharge capacitor that are alternately discharged with a feedback control sink current from a high voltage reference voltage level. The output signals of the two sawtooth voltage generators are compared to control a phase frequency comparator that provides signals to control a dual charge pump that provides the feedback control source current and that provides the feedback control sink current.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: February 26, 2008
    Assignee: Atmel Corporation
    Inventors: Daniel Payrard, Michel Cuenca, Eric Brunet
  • Patent number: 7271632
    Abstract: A ramp generator is provided that includes an amplifier, first and second transistors, a variable resistive load having a control electrode, and a capacitor. The amplifier has an inverting input that receives a first reference voltage, and an output connected to the gate of the first transistor. The first transistor has a source connected to a second reference voltage, and a drain connected to the non-inverting input of the amplifier and also to the variable resistive load. The second transistor mirrors the current of the first transistor so as to charge the capacitor, which is periodically discharged by a discharging circuit. In one embodiment, the generator further comprises a comparator, a filter, and an integrator that control the variable resistive load so as to generate a slope having characteristics that are noticeably independent from dispersion, from manufacturing methods, and temperature.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: September 18, 2007
    Assignee: STMicroelectronics SA
    Inventors: Denis Cottin, Christophe Garnier
  • Patent number: 7251290
    Abstract: A bank of complex gain elements is used to provide a step-wise approximation of an arbitrary complex-gain predistortion function for a nonlinear transmitter. The bank of gain elements is in an adaptive loop realizing adaptive control. The adaptive loop is closed between an Input of the gain bank and an output of the transmitter through a linear receiver at an adaptive controller composed of a bank of proportional-integral (PI) controllers. The real and imaginary parts of each predistortion gain element are controlled by a corresponding adaptive PI controller. The signals processed by the adaptive controller are represented in orthogonal coordinates in terms of real and imaginary number pairs of complex numbers. The adaptive controller achieves unconditionally stable operation independently from the arbitrary phase rotation in the input signal or the adaptive loop.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: July 31, 2007
    Assignee: Nortel Networks Limited
    Inventors: Peter Zahariev Rashev, David M. Tholl, Christopher John Leskiw
  • Patent number: 6930520
    Abstract: A high bandwidth, feed-forward oscillator generates a ramp or sawtooth voltage for controlling the operation of a pulse width modulator-based, switched DC power supply circuit. The oscillator is operative to effectively immediately adjust the slope of each rising and falling portion of the ramp/sawtooth signal, as necessary, in proportion to the magnitude of the input voltage, while maintaining the frequency of the ramp waveform effectively constant. A comparator network establishes a difference between peak and valley portions of the sawtooth in accordance with input voltage. In response to a change in input voltage a control circuit modifies the value of the difference between the peak and valley portions to define a new set of respective peak and valley portions VpeakNEW and VvalleyNEW, and immediately causes the sawtooth waveform to transition to the new set of respective peak and valley portions VpeakNEW and VvalleyNEW at said prescribed frequency.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: August 16, 2005
    Assignee: Intersil Americas Inc.
    Inventor: Eric M. Solie
  • Patent number: 6909417
    Abstract: A level shifter 13 is provided for each of SR flip flops F1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter 13, and the operation is suspended at the end of the pulse output. Thus, the level shifters 13 can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1. As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: June 21, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hajime Washio, Yasushi Kubota, Kazuhiro Maeda, Yasuyoshi Kaise, Michael James Brownlow, Graham Andrew Cairns
  • Patent number: 6819154
    Abstract: A feed forward pulse width modulator compares a ramp signal with a control voltage to control respective states of a pulse width modulation signal. A respective cycle of the ramp signal is generated by charging a capacitor with a charging current that is proportional to input voltage until the voltage across the capacitor reaches a peak threshold that is also proportional to the input voltage. The capacitor is thereupon discharged with a discharging current proportional to the input voltage until the voltage across the capacitor reaches a (non-zero) valley threshold.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: November 16, 2004
    Assignee: Intersil Americas Inc.
    Inventor: Fred F. Greenfeld
  • Patent number: 6636092
    Abstract: A digital PLL's stability and immunity to jitter are improved by deriving the correction to the state machine count from an average over several computations of the phase error. The PLL stability is improved by retaining all of the phase errors measured during a succession of plural phase measurement intervals. The plurality of phase errors thus obtained are averaged together, and the state machine internal count is corrected (updated) in accordance with this average, rather than according to an instantaneous phase error. As a result, the performance of the PLL is less susceptible to jitter-induced temporary excursions in the phase error, a significant advantage.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: October 21, 2003
    Assignee: 3Com Corporation
    Inventor: Eric Stine
  • Patent number: 6633193
    Abstract: A switching device (20) is formed to generate a ramp voltage by using a capacitor (48) formed on the semiconductor die (90) with the switching device (20). The switching device (20) drives a high-power device to conduct load currents for a load. The ramp voltage is used to gradually increase the drive that is applied to the high-power device in order to gradually increase the current conducted by the high-power device.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: October 14, 2003
    Assignee: Wells Fargo Bank Minnesota, National Association, as Collateral Agent
    Inventors: Josef Halamik, Frantisek Sukup
  • Patent number: 6456127
    Abstract: A system and method of integrating switching amplifiers into systems with low amplitude front-end tuners to eliminate shielding and EMI filtering associated with signals, power and ground. An adaptive frequency programmable pulse frame rate switching amplifier scheme using either look-up tables or appropriate algorithms, ensures by design, the elimination of critical interference frequency generation.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: September 24, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Michael J. Tsecouras
  • Patent number: 6339349
    Abstract: A circuit for generating a ramped voltage having controlled maximum amplitude (e.g., for use in a switching controller), and a method for generating such a ramped voltage without use of a comparator. The ramped voltage is a voltage developed across a periodically charged and discharged capacitor, or optionally a level-shifted version of such voltage. Preferably, a ring oscillator generates a clock signal (without use of a comparator) for use in controlling the periodic charging and discharging of the capacitor, and a feedback loop generates a supplemental charging current for the capacitor in response to feedback indicative of the ramped output voltage.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: January 15, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Jayendar Rajagopalan
  • Patent number: 5955903
    Abstract: A frequency-to-current converter includes several capacitances with capacitive values that are effectively multiplied. After each of a series of periodic pulses, the voltage on a "ramp" capacitance is charged to a starting voltage. Then, during the period preceding the subsequent pulse, the ramp capacitance is allowed to discharge at a discharge rate that is a function of a voltage on a discharge-current bias capacitance. At the end of the period, the voltage on the ramp capacitance is sampled and compared to a reference. If the voltage on the ramp capacitance is too low or too high, indicating a discharge current that is too high or too low, respectively, the bias voltage on the bias capacitance is adjusted to compensate for the error. In another embodiment, a small ramp capacitance is repetitively charged and discharged between two reference voltage levels using alternating charge and discharge current levels.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: September 21, 1999
    Assignee: Siliconix incorporated
    Inventor: Giao Minh Pham
  • Patent number: 5929671
    Abstract: A novel waveform generating for generating a waveform having symmetrical rise and fall times. The waveform generator of the present invention includes a first current source, a second current source, a MOS capacitor and a clamping circuit. The first current source and the second current source are coupled to a node such that current generated by the first current source flows into the capacitor and current generated by the second current source flows out of the capacitor. The clamping circuit is also coupled to the node such that the output voltage generated by the waveform generator is limited to a minimum and a maximum value. Therefore, by controlling the current flowing into the node, and the capacitance at the node, the rate at which the output voltage changes over time is controlled. As such, a waveform having very precise rise and fall times is generated.
    Type: Grant
    Filed: February 5, 1996
    Date of Patent: July 27, 1999
    Assignee: Cypress Semiconductor Corporation
    Inventor: Scott C. Best
  • Patent number: 5642066
    Abstract: An ultra-linear chirp generator includes a voltage controlled oscillator (VCO) having a tuning characteristic which is naturally nonlinear, a linear ramp generator which generates a linearly ramping output signal having a linear slope characteristic with respect to time, a polynomial correction waveform generator which generates a polynomial correction signal, and a summer which is responsive to and sums the linearly ramping output signal and the polynomial correction signal. The summer generates a VCO tuning signal for tuning the VCO. The tuning signal corresponds to the linearly ramping output signal predistorted with a nonlinearity opposite to the natural nonlinearity of the VCO tuning characteristic. The linear chirp generator also includes a phase locked loop which is responsive to the output signal of the VCO and which has a reference frequency which is related to the repetition rate of the output signal of the VCO.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: June 24, 1997
    Assignee: Ail System, Inc.
    Inventor: Peter J. Burke
  • Patent number: 5585752
    Abstract: A circuit for dividing a reference current is composed of a number n of transistors connected in cascade, in a Darlington configuration, between current generator and a fractionary current output node and by N+k (where k is an integer different from zero) directly biased diodes in series, connected between the generator and the fractionary current output node. The circuit does not employ current mirrors, so all transistors may have the minimum size, which also minimizes the effects of leakage currents. Additionally, compensation elements may be used for compensating the leakage currents from the base regions of the transistors. The circuit is useful as a capacitance multiplier, or as a slow ramp generator in a large number of design situations. Independence from intrinsic parameters of the transistors used and/or from temperature of operation may be provided by employing a specifically designed reference current generator. Several embodiments are described.
    Type: Grant
    Filed: March 29, 1995
    Date of Patent: December 17, 1996
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Edoardo Botti, Giorgio Chiozzi
  • Patent number: 5585753
    Abstract: A sawtooth generates a sawtooth wave having a high response speed and good linearity with a simple arrangement in converting a change in phase of an input signal into a linear level change. A signal interpolating apparatus uses this sawtooth wave to output a predetermined signal (interpolation signal) every predetermined phase change of the input signal with a simple arrangement. An arithmetic operation section receives two sinusoidal signals A and B having equal periods and phases which are offset by 90.degree. and with respect to each other, obtain a signal X=A/(B+a) and a signal Y=A/(B+B) using constants .alpha. and .beta. respectively satisfying B+.alpha..apprxeq.0 and B+.beta..apprxeq.0. A switching unit selects the linear ramp portions of the signals X and Y to output a continuous sawtooth wave. On the basis of the value of this sawtooth wave, a desired interpolation signal is output from a memory which stores predetermined data.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: December 17, 1996
    Assignee: Anritsu Corporation
    Inventors: Muneo Ishiwata, Hiroaki Endoh
  • Patent number: 5502419
    Abstract: A triangular wave generator circuit having a triangular wave generator unit for generating a triangular wave signal, and a comparator for comparing the generated triangular wave signal with a predetermined level. The triangular wave generator unit controls the generated triangular wave signal in accordance with the comparison result by the comparator.
    Type: Grant
    Filed: June 3, 1993
    Date of Patent: March 26, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Somei Kawasaki, Masami Iseki, Hironari Ebata
  • Patent number: 5502410
    Abstract: A circuit (10) for generating a voltage ramp signal (V.sub.RAMP) having minimum amplitude variation over a large frequency range has been provided. The circuit includes a comparator (40) for comparing a voltage across a ramp capacitor (32) with a reference voltage. From the result of this comparison, a sampling capacitor (16) is discharged during the time that the voltage ramp signal is less than the reference voltage and charged during the time that the voltage ramp signal is greater than the reference voltage. The resulting voltage across the sampling capacitor is held and fed back to a transconductance amplifier (20) which adjusts the current that charges the ramp capacitor thereby adjusting the peak amplitude of the voltage ramp signal.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: March 26, 1996
    Assignee: Motorola, Inc.
    Inventors: Pak-Kong Dunn, Kwok-Ban Nip, Chi-Man Lin
  • Patent number: 5394020
    Abstract: A vertical ramp generator includes a voltage controllable charge current source and a switched discharge current source coupled across a ramp capacitor. A pair of comparators coupled to first and second reference potentials are supplied with the ramp capacitor voltage and drive a flip/flop, the output of which operates the discharge current source. A sync signal voltage is injected into the output of one of the comparators. Another comparator compares the ramp capacitor voltage with a third reference potential corresponding to the midpoint of the desired ramp voltage to control the switching of a pair of current sources that supply a square wave current to a correction capacitor which develops a DC correction voltage. The duty cycle of the square wave current is a function of the deviation of the ramp capacitor voltage from the third reference potential. The correction voltage controls the amount of current supplied by the charge current source.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: February 28, 1995
    Assignee: Zenith Electronics Corporation
    Inventor: David K. Nienaber