Fluctuating Or Ac Source With Rectifier Or Filter Patents (Class 327/531)
  • Patent number: 11601125
    Abstract: The present description concerns a method of controlling at least one switch (TH), including: the reception of signals (S3-i) having between one another at least one phase shift representative of a desired state of said at least one switch; the obtaining, from said signals, of a value (Si) representative of the desired state; and the application of the representative value to said at least one switch.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: March 7, 2023
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Dominique Bergogne, Thanh-Hai Phung
  • Patent number: 10897191
    Abstract: An integrated circuit for realizing a zero power consumption standby of switching power supply is disclosed, including a zero-power-consumption controller for controlling the switching power supply. The zero-power-consumption controller comprises a charge coupled circuit, a zero-power-consumption microprocessor, and a zero-power-consumption voltage regulation circuit, and an input from an AC power source is sequentially fed into the zero-power-consumption voltage regulation circuit and the zero-power-consumption microprocessor via the charge coupled circuit.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: January 19, 2021
    Inventor: Ming Liu
  • Patent number: 10749482
    Abstract: A power amplification circuit includes: a first amplifier that is input with a first signal and outputs a second signal; a bias circuit that supplies a bias current or voltage to the first amplifier; and a control voltage generating circuit that generates a control voltage in accordance with the first signal. The bias circuit includes a first transistor that outputs the bias current or voltage, a second transistor provided between the emitter or source of the first transistor and ground, and a third transistor that is supplied with the control voltage and that supplies a first current or voltage to the second transistor. The value of the first current or voltage when the signal level is a first level is larger than the value of the first current or voltage when the signal level is a second level. The first level is higher than the second level.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 18, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masatoshi Hase
  • Patent number: 8933688
    Abstract: A fast AC voltage detector includes a bridge rectifier connected to an AC power source, a threshold detector connected to an output of the bridge rectifier, a voltage isolation circuit connected to the threshold detector, a continuous voltage averager connected to an output of the voltage isolation circuit, and a Schmidt trigger connected to the continuous voltage averager. The Schmidt trigger is operable to output a first voltage level when a load is preset on said AC power source and a second voltage level when no load is present on said AC power source.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: January 13, 2015
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Eric O. Varland, Karl James Hamilton, Philip Chandler
  • Patent number: 8908807
    Abstract: Methods and apparatus are disclosed for transitioning a receiver from a first state to a second state using an in-band signal over a differential serial data link.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: December 9, 2014
    Assignee: Intel Corporation
    Inventor: Zale T. Schoenborn
  • Patent number: 8872550
    Abstract: An apparatus and a method for processing a signal, and for estimating a point corresponding to a maximum slope from an envelope of an input signal, are provided. A signal processing apparatus includes an envelope detecting unit configured to detect an envelope of an input signal. The signal processing apparatus further includes a correcting unit configured to correct slopes, each of the slopes being between respective points of the envelope, based on information on a clipping interval of the envelope. The signal processing apparatus further includes an estimating unit configured to estimate a point, of the envelope, in which a corrected slope, among the corrected slopes, includes a maximum value.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ui Kun Kwon, Sang Joon Kim, Seung Keun Yoon
  • Patent number: 8829982
    Abstract: A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: September 9, 2014
    Assignee: Intel Corporation
    Inventors: Rajeevan Mahadevan, Antonios Pialis, Robert Wang, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Patent number: 8710905
    Abstract: Disclosed herein are bias voltage generating circuits configured for switching power supplies, and associated control methods. In one embodiment, a bias voltage generating circuit can include: (i) a first control circuit configured to compare a drain-source voltage of a switch against a bias voltage; (ii) a capacitor, with the bias voltage across the capacitor; (iii) a second control circuit configured to control the switch, and that is enabled when the bias voltage is at least as high as an expected bias voltage; (iv) the first control circuit being configured to control the capacitor to charge when the drain-source voltage of the switch is greater than the bias voltage; and (v) the bias voltage being less than an overvoltage protection voltage when the capacitor charges, and where the overvoltage protection voltage comprises a voltage that is a predetermined amount higher than the expected bias voltage.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: April 29, 2014
    Assignee: Silergy Semiconductor Technology (Hangzhou) Ltd.
    Inventor: Wei Chen
  • Publication number: 20130183043
    Abstract: Apparatus and method for measuring current drain and reporting power consumption using current transformer with primary windings made of low ohmic alloy, enabling the use of the secondary coil to power the sensing and reporting circuits eliminating the power wasted by AC-DC power adaptors used for the current sensors. The saving is substantial as the current sensors will not drain a current when the AC outlets are disconnected from a load or when the load is switched off. The apparatus using low ohmic alloy is extended to the structuring of terminals, including power pins, power sockets and combinations to provide a low ohmic sensing elements in AC plugs, outlets, adaptors and extension cables with multi outlets, dissipating the heat from the sensing elements by the plugs and the larger metal heat dissipation.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 18, 2013
    Inventor: David Elberbaum
  • Patent number: 8487691
    Abstract: An apparatus comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to generate a first control voltage and a second control voltage. The second circuit may be configured to generate a bias signal in response to the first control voltage and the second control voltage. The third circuit may be configured to generate a filtered signal in response to the bias signal. The filtered signal may be added to the first control voltage and the second control voltage to provide AC noise suppression when generating the bias signal.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: July 16, 2013
    Assignee: LSI Corporation
    Inventors: Pankaj Kumar, Pramod Parameswaran, Vani Deshpande, Makeshwar Kothandaraman
  • Patent number: 8461914
    Abstract: According to an aspect of the invention, a reference signal generating circuit includes a band gap reference main unit that includes a first cascode current mirror unit having a plurality of first conductive-type transistors; a second cascode current mirror unit having a plurality of second conductive-type transistors; a reference unit that uses a band gap to generate a reference signal; a first bias voltage generating unit that generates a bias voltage of the second cascode current mirror unit; a second bias voltage generating unit that generates a bias voltage of the first cascode current mirror unit; and an output unit that generates a reference signal based upon an output of the band gap reference main unit to generate and outputs the reference signal, wherein the second cascode current mirror unit is connected between the first cascode current mirror unit and the reference unit.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: June 11, 2013
    Assignee: Fujitsu Limited
    Inventor: Naoya Shibayama
  • Publication number: 20130069709
    Abstract: AC powered logic circuits and systems including same are disclosed. According to one aspect, a system including a logic circuit powered using an alternating current (AC) power source includes at least one supply transistor connected to receive voltages of opposite phases from an AC power source such that the at least one supply transistor is strongly on during a first phase of the voltage of the AC power source and is strongly off during a second phase opposite the first phase of the voltage of the AC power source and at least one logic circuit connected to be powered by the AC power source through the at least one supply transistor and producing an output at an output terminal responsive to an input received at an input terminal.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 21, 2013
    Applicant: North Carolina State University
    Inventors: Paul D. Franzon, Peter Gadfort, Joshua Chris Ledford
  • Patent number: 8368789
    Abstract: Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 5, 2013
    Assignee: Aptina Imaging Corporation
    Inventors: Chen Xu, Yaowu Mo
  • Publication number: 20130027119
    Abstract: A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 31, 2013
    Inventors: Rajeevan Mahadevan, Antonios Pialis, Robert Wang, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Patent number: 8208590
    Abstract: Filter circuit includes Nth-order active filters switching circuit which switches shorting or non-shorting of active filter, and power-supply control circuit which controls such that a power supply of active filter is turned off when switching circuit shorts active filter. A receiver employing filter circuit turns off the power supply of active filter not needed when no interference wave exists within a given range from a desired frequency band. The foregoing structure allows lowering the power consumption of filter circuit.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: June 26, 2012
    Assignee: Panasonic Corporation
    Inventors: Eiji Okada, Takeshi Fujii, Hiroaki Ozeki
  • Publication number: 20110267138
    Abstract: This invention relates in Synchronous Rectifier Circuits, comprises: AC input terminal, switch, driving circuit, protect opposite current circuit and a load, to improved conventional Synchronous Rectifier Circuits, can be achieve rectify function.
    Type: Application
    Filed: May 3, 2010
    Publication date: November 3, 2011
    Inventor: Chao-Cheng Lu
  • Patent number: 7944273
    Abstract: Techniques for adjusting the voltage across an active filter element include a controlled circuit element and a control circuit element adapted to control the voltage across the controlled circuit element to increase transient load response and to reduce power dissipation.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: May 17, 2011
    Assignee: Picor Corporation
    Inventors: Patrizio Vinciarelli, Michael Briere, Jeffrey Gordon Dumas
  • Patent number: 7901546
    Abstract: The present invention includes systems, methods and apparatus for continuously, independently and in some cases remotely monitoring the operation of a current interrupter used to test a cathodic protection system, or the cathodic protection system itself, for verification of proper operation. Embodiments of the invention include electronic devices that may be temporarily attached to a current interrupter that is being used to test a cathodic protection system, or directly to the cathodic protection system itself. Embodiments of the invention monitor the activity of an interrupter by sampling the output (voltage and time) to identify the cycle(s) of the interrupter. The invention provides truly independent verification since it does not need to know in advance the sequence or cycle times of the current interrupter being monitored. The information obtained by the invention is output so that it may be provided to a user, displayed, downloaded or stored for future reference.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: March 8, 2011
    Assignee: M.C. Miller Co.
    Inventors: Melvin C. Miller, Marcelo Jakubzick, Juan Pablo Gutierrez
  • Publication number: 20100321097
    Abstract: A power supply circuit includes a first power circuit having a first power output terminal and a first ground output terminal, a second power circuit having a second power output terminal and a second ground output terminal, and a SATA control chip having a first input terminal, a second input terminal, a third input terminal, and a fourth input terminal. The first power circuit comprises a first filter circuit. The second power circuit comprises a second filter circuit. The first power output terminal, first ground output terminal, second power output terminal, and second ground output terminal are electrically coupled to the SATA control chip via the first input terminal, second input terminal, third input terminal, and fourth input terminal respectively. The first and second power circuits provide power to the SATA control chip via the first and second filter circuits respectively.
    Type: Application
    Filed: September 11, 2009
    Publication date: December 23, 2010
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: KE-YOU HU
  • Patent number: 7830151
    Abstract: A method and apparatus for supplying a voltage in an information handling system. A modulated voltage signal output circuit linked to an amplitude control element. The amplitude control element linked to a voltage output circuit, the output circuit including one or more electrical energy-storage elements to receive an electrical current. The voltage output circuit having one or more electronic switches to alter the current passing to the energy-storage element(s) to provide a modulated voltage output.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 9, 2010
    Assignee: Dell Products L.P.
    Inventors: Leszek Brukwicz, Ayedin Nikazm
  • Patent number: 7821323
    Abstract: A bias circuit for a switching power supply includes a rectifier that is connected to an AC power source and outputs a full wave rectified voltage Vs; a voltage divider, a diode, a first transistor, and a second transistor connected in parallel between Vs and ground; a capacitor connected between a first terminal of the second transistor and ground; and a node between the capacitor and the first terminal of the second transistor providing an output bias voltage Vcc from the bias circuit. A voltage from the voltage divider is provided to a gate of the first transistor, and the diode and a first terminal of the first transistor are connected to a gate of the second transistor.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: October 26, 2010
    Assignee: OSRAM SYLVANIA Inc.
    Inventor: Victor M. Simi
  • Publication number: 20100207682
    Abstract: A voltage conversion circuit with reduced power consumption can be used for a power supply device (100). The power supply device (100) is composed of a power supply circuit (3) including an alternating power supply (1) and a rectifying circuit (2); a voltage conversion circuit (6) including a plurality of capacitors (4) and a switching circuit (5); and a load circuit (7). The voltage conversion circuit (6) is connected between the power supply circuit (3) and the load circuit (7). The alternating power supply (1) is connected to a switching circuit (5) of the voltage conversion circuit (6) without having the rectifying circuit (2) in between. An output voltage (potential fluctuation: a potential difference generated in the signal waveform of the power supply voltage) from the alternating power supply (1) prior to rectification is applied to the switching circuit (5).
    Type: Application
    Filed: September 17, 2008
    Publication date: August 19, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Makoto Izumi
  • Patent number: 7755400
    Abstract: Systems and methods for digital isolation in circuits are provided. On power-up in an isolation application, there may be multiple power supplies. For example, one for an input side and one for an output side, both in relation to an isolation barrier. Upon power up, the input and output may not be at the same state. The bias of the output may be the opposite of what is on the input. An isolator solution is provided which integrates the digital isolation into the analog solution. A DC signal corresponds to the static state of the data at start-up and an AC signal is generated when switching begins. In one example, the output level corresponds to the input level when the steady state information is encoded and sent across as an AC signal.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: July 13, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Ricky Dale Jordanger, David Leonard Larkin, David Wayne Stout
  • Patent number: 7692469
    Abstract: In one embodiment, a voltage sense circuit receives an ac input signal and forms a rectified output voltage that is representative of the ac input signal.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: April 6, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Petr Kadanka
  • Patent number: 7616047
    Abstract: A transistor arrangement has first and second terminals and a control terminal which sets a current flow between the first and second terminals, and a signal conditioning device which applies a transistor control voltage to the control terminal in a manner dependent on a differential voltage present between the first and second terminals, and a driving apparatus is assigned to the signal conditioning device and switches the latter between at least two operating modes.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: November 10, 2009
    Assignee: Robert Bosch GmbH
    Inventors: Stephan Rees, Armin Ruf, Ulrich Ammann
  • Publication number: 20090161335
    Abstract: A housing adapted for a power filter and a power filter comprising the housing are provided. The power filter further comprises a filter element, a protection ring, and a connection line. The housing comprises a bottom wall, a sidewall, and an opening. The sidewall is disposed adjacent to the bottom wall to define a receiving space for receiving the filter element. The sidewall comprises an upper edge, with the opening extending downwards from the upper edge. The protection ring for protecting the connection line can be inserted into and fixed in the opening from the upper edge. With this opening, the power filter of the present invention can be assembled with greater ease.
    Type: Application
    Filed: April 30, 2008
    Publication date: June 25, 2009
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Wangzhou Li, Hengtao Zhao, Heng Zhang, Jianwen Sun
  • Patent number: 7532017
    Abstract: An AC maintain power signature detection circuit in a power sourcing equipment (PSE) for a Power over Ethernet system injects an AC test signal onto a power port of the PSE. The AC test signal is driven onto a first power terminal of the power port through a sense resistor. The voltages across the sense resistor are measured and scaled by first and second resistor dividers having different resistor ratios. The voltage and the scaled voltage at the first power terminal side of the sense resistor have a peak voltage being proportional to the load impedance of the load coupled to the power port. The comparator compares the scaled voltages measured across the sense resistor and generates the output signal indicative of the load impedance at the power port.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: May 12, 2009
    Assignee: Micrel, Inc.
    Inventor: Douglas Paul Anderson
  • Patent number: 7511558
    Abstract: A CMOS circuit in low-voltage implementation, low power-consumption implementation, high-speed implementation, or small-size implementation. In a circuit which uses a FD-SOI MOST where a back gate is controlled by a well, voltage amplitude at the well is made larger than input-voltage amplitude at the gate. Alternatively, the circuit is modified into a circuit which uses a MOST that changes dynamically into an enhancement mode and a depletion mode.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: March 31, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoo Itoh, Ryuta Tsuchiya, Takayuki Kawahara
  • Patent number: 7501885
    Abstract: A filter circuit includes a voltage amplifier, a resistor, a capacitor, and an analog switch connected between the voltage amplifier and the capacitor. When the voltage amplifier is turned on, the analog switch is opened so that the capacitor is disconnected from the voltage amplifier. Thus, an output voltage of the voltage amplifier sharply increases to its steady state value, as soon as the voltage amplifier is turned on. When the output voltage of the voltage amplifier is fully stabilized, the analog switch is closed so that the capacitor is connected to the voltage amplifier. During the period of time when the analog switch is closed, the filter circuit is configured as an imperfect integrator circuit with filter characteristics that depend on a capacitance of the capacitor and a resistance of the resistor.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: March 10, 2009
    Assignee: DENSO CORPORATION
    Inventors: Norio Kitao, Junji Hayakawa
  • Patent number: 7471137
    Abstract: The present invention relates to a frequency-independent voltage divider in which a compensation structure (10) for compensating a distributed parasitic capacitance of a resistor arrangement (20) is arranged between the resistor arrangement (20) and a substrate (50). Thereby, the compensation structure (10) shields the resistor arrangement (20) partly from the substrate (50), and thus shields the parasitic capacitance. This allows for an improved compensation.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: December 30, 2008
    Assignee: NXP B.V.
    Inventors: Paulus Petrus Franciscus Maria Bruin, Arnoldus Johannes Maria Emmerik
  • Patent number: 7443229
    Abstract: Techniques for adjusting the voltage across an active filter element include a controlled circuit element and a control circuit element adapted to control the voltage across the controlled circuit element to increase transient load response and to reduce power dissipation.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: October 28, 2008
    Assignee: Picor Corporation
    Inventors: Patrizio Vinciarelli, Michael Briere, Jeffrey Gordon Dumas
  • Patent number: 7385436
    Abstract: A CMOS circuit in low-voltage implementation, low power-consumption implementation, high-speed implementation, or small-size implementation. In a circuit which uses a FD-SOI MOST where a back gate is controlled by a well, voltage amplitude at the well is made larger than input-voltage amplitude at the gate. Alternatively, the circuit is modified into a circuit which uses a MOST that changes dynamically into an enhancement mode and a depletion mode.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: June 10, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoo Itoh, Ryuta Tsuchiya, Takayuki Kawahara
  • Publication number: 20080079484
    Abstract: An amplifier stage or circuit for providing cross-point adjustment. The circuit may include a first input node configured to receive a first data signal and a second input node configured to receive a second data signal that is complementary of the first data signal. The circuit also includes a programmable first stage having a first node coupled to the first input node and a second node coupled to the second input node that is configured to adjust an amount of current provided to the first and second data signals to create a signal offset. The circuit further includes a second stage having a first node coupled to a third node of the programmable first stage and a second node coupled to a fourth node of the programmable first stage configured to provide the signal offset at a third and fourth node of the second stage to adjust the cross-point of the first and second signals.
    Type: Application
    Filed: May 21, 2007
    Publication date: April 3, 2008
    Applicant: Finisar Corporation
    Inventors: Jason Y. Miao, Timothy G. Moran
  • Patent number: 7256638
    Abstract: The apparatus includes a series active continuous time voltage regulator operating in conjunction with a alternating current power source and one or more loads. The alternating current power source is a voltage source that induces currents at a first end of the apparatus. At a second end of the apparatus one or more loads consume power from the apparatus. The series buck-boost regulator is composed of a pure monochromatic voltage source of frequency equal to that of the alternating current power source, and of constant phase with respect to the alternating current power source. The regulator is further composed of a sampling network that provides a scaled continuous time sample of the voltage delivered by the power conditioner to the loads. Finally, the regulator is composed of a high gain differential amplifier.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: August 14, 2007
    Inventor: Michael Wendell Vice
  • Patent number: 7205831
    Abstract: There is provided a noise canceling circuit that includes a first source terminal, a second source terminal, an output terminal, a reference voltage generator for generating a reference voltage, a bias current generator for generating a bias current determining an operating current, a voltage-current generator for generating an output of a power circuit, a voltage divider for detecting a fluctuation of an output voltage at the output terminal, and an error amplifier for amplifying an error voltage between said reference voltage and an output voltage from the voltage divider.
    Type: Grant
    Filed: February 17, 2003
    Date of Patent: April 17, 2007
    Assignee: Nanopower Solution Co., Ltd.
    Inventor: Akita Shinichi
  • Patent number: 7161415
    Abstract: A current modulation filter for mitigating fluctuations in current on a power supply line due to time dependent current demands of a load circuit includes a biasing circuit for providing a source voltage reference and a quiescent current reference and a load voltage sensing circuit for providing a voltage measurement of the operating voltage of the load circuit. A current sensing circuit is electrically interposed between the power source and the load circuit. A voltage drop across the current sensing circuit is transmitted as a voltage difference to a current controller which subsequently supplies or sinks current to the power supply line so as to maintain a constant current level thereon.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: January 9, 2007
    Inventor: Harry S. Oliver, Jr.
  • Patent number: 7078937
    Abstract: Logic circuitry is powered by a partially rectified alternating current (ac) waveform. The waveform is partially rectified in the sense that it does not provide a clean, primarily dc power signal. Instead, it is possible to power logic circuitry with a waveform that includes a substantial ac component. The partially rectified ac waveform may be applied to logic circuitry incorporating thin film transistors based on amorphous or polycrystalline organic semiconductors, inorganic semiconductors or combinations of both.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: July 18, 2006
    Assignee: 3M Innovative Properties Company
    Inventors: Paul F. Baude, Michael A. Haase, Steven D. Theiss
  • Patent number: 7034604
    Abstract: A communications device, such as a transceiver, is used with a fiber optic communication line, wherein the communications device is powered from a host device. A voltage supply circuit, which comprises a full wave bridge rectifier responsive to data and control signals from the host device, produces plus and minus rectified voltage signals. First and second voltage regulators are responsive to the rectified voltage signals to produce plus and minus regulated voltages, for example ±5 volts, which is sufficient to power the communications device. A charge circuit alternately transfers energy from the plus and minus voltage lines to ensure the presence of plus and minus voltage signals when only positive or negative signals are provided by the host device.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: April 25, 2006
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventor: Timothy M. Minteer
  • Patent number: 6870417
    Abstract: A loss-less diode equivalent circuit which functions to reduce and eliminate the forward bias voltage or drop associated with conventional diodes. The loss-less diode comprises a reverse connected MOSFET device which is configured with a clamping circuit and coupled to an input stage. The drain is coupled to the input stage which receives an input signal. The source of the MOSFET device provides an output port for charging a capacitor in a conduction or on state.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: March 22, 2005
    Assignee: Siemens Milltronics Process Instruments, Inc.
    Inventor: Claude Mercier
  • Patent number: 6781432
    Abstract: A control circuit for a MOSFET used in a synchronous rectification circuit applies a gate voltage to the MOSFET during most of a period in which a current flows in a MOSFET. As a result, conduction loss is decreased, making it possible to increase device efficiency and form a device that is compact and lightweight.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: August 24, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Yukihiro Nishikawa
  • Patent number: 6741103
    Abstract: A device which uses a detection circuit to determine whether an output current thereof is source-induced or load-induced, and the method therefor. The device which performs some type of operation based upon the determination as to whether the output current thereof is source-induced or load-induced, and method therefor. The detection circuit determines whether polarities of the output current and an output voltage are the same, and determines the output current to be source-induced if the polarities are the same and load-induced if the polarities are opposite each other. Such a device may have many applications, including use in systems where distinctions between source and load-induced currents are employed in feedback systems to control the system voltage source, systems where the system voltage source is not controlled, but other sources are controlled to influence a summation of voltages and currents at sensing locations, and systems for measurement instrumentation.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: May 25, 2004
    Assignee: Agilent Technologies Inc.
    Inventor: James B. McKim, Jr.
  • Patent number: 6696882
    Abstract: A circuit for providing a regulated voltage to a load. The circuit includes a power converter coupled to the load and including at least one pulse-width modulated switching device, a control circuit for providing a pulse-width modulated control signal to the pulse-width modulated switching device of the power converter based on an output voltage of the power converter, and a transient override circuit responsive to a load voltage for biasing the pulse-width modulated switching device conductive during certain load voltage conditions.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: February 24, 2004
    Assignee: Artesyn Technologies, Inc.
    Inventors: Piotr Markowski, Mark S. Masera, Mark A. Jutras
  • Patent number: 6605980
    Abstract: The present invention relates to a synchronous rectifier circuit having a transformer (Ü) in single-phase center-tap connection. MOSFETs containing a body diode are used as switches. The MOSFETs are connected up in such a way that a current flows only from source to drain. The channel of the MOSFETs is always switched on if current would flow through the body diode.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: August 12, 2003
    Assignee: Patent-Treuhand-Gesellschaft fuer elektrische Gluehlampen mbH
    Inventor: Helmut Haeusser-Boehm
  • Patent number: 6522182
    Abstract: In the present invention, an external power source supplied to an integrated circuit device is divided into a first external power source for the DLL circuit and a second external power source for circuits other than the DLL circuit. According to the present invention, it is arranged that power source noise generated in the second external power source cannot be transmitted to the variable delay circuit by utilizing the first external power source preferably for the variable delay circuit of the DLL circuit and even more preferably for its delay unit. Also, preferably, it is arranged that power source noise generated in the second external power source cannot be transmitted to the phase coincidence detection unit by utilizing the first power source for the phase coincidence detection unit in the phase comparison circuit of the DLL circuit.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: February 18, 2003
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Tomita, Naoharu Shinozaki, Nobutaka Taniguchi, Waichirou Fujieda, Yasuharu Sato, Kenichi Kawasaki, Masafumi Yamazaki, Kazuhiro Ninomiya
  • Patent number: 6445221
    Abstract: An input driver for use with a differential folder in a flash A/D converter having a static ladder that provides an array of reference voltages and a method of operation thereof. The input driver includes a differential signal driver, coupled to an AC input signal, that generates first and second complementary drive signals for a differential folder stage. A tracking circuit, coupled to the differential signal driver, is utilized to maintain a voltage at the center of the static ladder to improve common mode rejection of the input driver without reducing bandwidth. In a related embodiment, the voltage at the center of the static ladder is an average DC voltage of the first and second drive signals.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventor: Joe Martin Poss
  • Patent number: 6411155
    Abstract: A monolithic assembly includes vertical power semiconductor components formed throughout the thickness of a low doped semiconductive wafer of a first conductivity type, whose bottom surface is uniformly coated with a metallization. At least some of these components, so-called autonomous components, are formed in insulated sections of the substrate, whose lateral insulation is provided by a diffused wall of the second conductivity type and whose bottom is insulated through a dielectric layer interposed between the bottom surface of the substrate and the metallization.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: June 25, 2002
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Robert Pezzani
  • Patent number: 6404267
    Abstract: An improved circuit for activating a high side mosfet drive during a predetermined phase of the A/C cycle. The circuit includes an electronic switch which is connected to an A/C line. The switch operates between an open and closed position. Also included is a mosfet drive connected to the A/C line. The mosfet drive is activated when the switch is in an open position and is deactivated when the switch is in a closed position. The circuit may also include a capacitor connected to the A/C line. The capacitor is charged during the positive phase of the A/C cycle and powers the mosfet drive during the negative portion of the A/C cycle when the switch is in an open position.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: June 11, 2002
    Assignee: Cooper Industries
    Inventor: Jeff Duve
  • Patent number: 6404268
    Abstract: There is disclosed a circuit for simulating zero cut-in voltage diode and a rectifier having zero cut-in voltage characteristic. The MOS transistors manufactured by the CMOS process are used as circuit components and are properly biased so as to provide the rectifying capability, and thus are used as a rectifying diode. Furthermore, with a proper bias, the rectifying diode has zero cut-in voltage and a low current loss, and thus a high efficient rectifier can be implement.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: June 11, 2002
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Hsi-Hsien Hung, Hsin Chou Lee
  • Patent number: 6400205
    Abstract: A diode detection circuit is capable of obtaining an ideal rectification voltage even the case of a minute input high-frequency voltage. The circuit includes a first diode that accepts an AC signal; a first parallel circuit consisting of a resistor and a capacitor, the first parallel circuit accepting a detection output from the first diode; a first operational amplifier having a positive input terminal that accepts a charging voltage for the capacitor of the first parallel circuit; a second diode that accepts an output from the first operational amplifier; a first switching circuit consisting of a first switch and an oscillator, the first switching circuit providing a control of the ratio of conduction to non-conduction of the first and second diodes; a second parallel circuit consisting of a resistor and a capacitor, the second parallel circuit accepting an output from the first switching circuit.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: June 4, 2002
    Assignee: Fujitsu Limited
    Inventor: Yasuhiro Yokota
  • Publication number: 20020039043
    Abstract: The present invention relates to a synchronous rectifier circuit having a transformer (Ü) in single-phase center-tap connection. MOSFETs containing a body diode are used as switches. The MOSFETs are connected up in such a way that a current flows only from source to drain. The channel of the MOSFETs is always switched on if current would flow through the body diode.
    Type: Application
    Filed: September 27, 2001
    Publication date: April 4, 2002
    Inventor: Helmut Haeusser-Boehm