Abstract: The present invention relates to a synchronous rectifier circuit having a transformer (Ü) in single-phase center-tap connection. MOSFETs containing a body diode are used as switches. The MOSFETs are connected up in such a way that a current flows only from source to drain. The channel of the MOSFETs is always switched on if current would flow through the body diode.

Abstract: An inductive load is controlled using a PWM control signal at the control terminal of a current switch. In parallel to the first circuit branch containing the inductive load to be controlled, there is located a second circuit branch including a flyback diode and a measuring resistor. The actual current signal corresponding to the current in the inductive load to be regulated, which is formed using the current in the measuring resistor as measurement voltage, is compared to a desired current signal, and the result of the comparison is processed by a PWM circuit to form a PWM control signal for current switch. Due to the fact that measuring resistor is disposed in the circuit parallel to the inductive load to be controlled, a favorable behavior of the power dissipation in the measuring resistor is obtained in accordance with the duty cycle of the PWM control signal. With a preset value of the measuring resistor, the power dissipation and the required chip area can thus be reduced.

Abstract: An analog voltage pulse generator, including a first break-over component of Shockley diode type to activate a rising edge of a pulse on an output terminal and a second component of thyristor type to block the first component and deactivate the pulse.

Abstract: Bias circuitry is configured to adjust bias current to one or more power amplifier stages based upon the level of the RF signal to be amplified. A feed-forward circuit senses the input power level of the signal to be amplified and dynamically adjusts the bias current for one or more amplifiers in the amplification path to ensure each amplifier is operating in a linear region for the given signal level. For amplifier configurations having multiple amplification stages, the bias circuitry provides proportional bias currents to each stage as necessary for the progressively increasing signal levels being amplified. The bias circuitry eliminates excessive quiescent bias currents that prior biasing techniques required to ensure linear operation by automatically increasing bias currents only as needed based on the effective magnitude of the RF signal to be amplified.

Abstract: A synchronous rectifier circuit (10) includes a polarity comparator (14) that generates a signal to a driver circuit (16) for controlling the voltage at the gate of a power MOSFET (60). The power MOSFET (60) is switched to operate in the conduction mode and short out a parasitic diode (62) when the diode is forward biased. The power MOSFET (60) is switched to operate in the nonconduction mode when the parasitic diode (62) is reverse biased. A bias supply circuit (12) uses a capacitor (70) to generate a regulated internal bias that provides power to the polarity comparator (14) and to the driver circuit (16). The internal bias allows the power MOSFET (60) to provide a current conduction that is substantially isolated from the changes in voltage levels at the terminals (64, 66) of the synchronous rectifier circuit (10).

Abstract: A pulse width modulated switch comprises a first terminal, a second terminal, and a switch that allows a signal to be transmitted between the first terminal and the second terminal according to a drive signal provided at a control input. The pulse width modulated switch also comprises a frequency variation circuit that provides a frequency variation signal and an oscillator that provides an oscillation signal having a frequency of that varies within a frequency range according to the frequency variation signal. The oscillator further provides a maximum duty cycle signal comprising a first state and a second state. The pulse width modulated switch further comprises a drive circuit that provides the drive signal when the maximum duty cycle signal is in the first state and a magnitude of the oscillation signal is below a variable threshold level.

Abstract: In a circuit for supplying a load with a direct voltage, a diode is connected in a current path for supplying the load, a step-up converter is connected in the current paths parallel with the diode, and a control unit drives the step-up converter according to predetermined criteria in order to supply the load at least partially via the step-up converter. Such a circuit has advantageous power consumption characteristics. In comparison to conventional circuits that require an expensive filter, this circuit is more economical and/or has a smaller structural size.

Abstract: An AC sensor for measuring voltage and detecting power outages is disclosed. In a disclosed embodiment, the AC sensor includes a plurality of integrators for independently integrating an AC voltage present on the AC power line. It also includes a timing circuit in communication with the integrators. The timing circuit initiates the integration cycles of the integrator such that the integration cycles are staggered in time and such that every two sequentially occurring integration cycles partially overlap.

Abstract: A charge pump, to generate a voltage (overvoltage) greater than the supply voltage, includes disk capacitors triggered via an oscillator circuit, the first terminals of the disk capacitors being connected to the oscillator circuit and their second terminals being wired together in a node to which the overvoltage is applied. The oscillator circuit includes an R-C phase shifter oscillator at whose outputs three output signals, phase shifted 120.degree., are applied, and the outputs are connected to disk capacitors via differential voltage current amplifiers.

Abstract: A power-generation detection circuit for detecting a power-generation state by an AC voltage supplied from a power-generation device including a capacitor, and switching element, a resistor, and an inverter circuit which controls the charging of the capacitor by a power-generation device. The switching element is switched by the AC voltage from the power-generation device. The voltage of the capacitor is detected by the inverter circuit thereby performing power-generation detection.

Abstract: An active power supply filter effectively eliminates power supply noise using a resistive element and a capacitive element coupled at a node, and a switch with a control terminal controlled by the node. The active power supply filter is suitable for high frequency operation of a voltage-controlled oscillator (VCO) in a phase-locked loop (PLL) of a high-speed microprocessor. The active power supply filter removes VCO noise that would otherwise create jitter that reduces the effective clock cycle of the microprocessor. The active power supply filter is similarly useful in applications other than VCOs, PLLs, and microprocessors in which removal of substantial amounts of noise from the power supply is useful.

Abstract: A pulse width modulated switch comprises a first terminal, a second terminal, and a switch that allows a signal to be transmitted between the first terminal and the second terminal according to a drive signal provided at a control input. The pulse width modulated switch also comprises a frequency variation circuit that provides a frequency variation signal and an oscillator that provides an oscillation signal having a frequency of that varies within a frequency range according to the frequency variation signal. The oscillator further provides a maximum duty cycle signal comprising a first state and a second state. The pulse width modulated switch further comprises a drive circuit that provides the drive signal when the maximum duty cycle signal is in the first state and a magnitude of the oscillation signal is below a variable threshold level.

Abstract: A frequency-independent voltage divider includes a series arrangement of resistors connected between an input terminal and a reference terminal for receiving an input signal. An output terminal for supplying an output signal is coupled to a tap of the series arrangement. The influence of parasitic capacitances is eliminated by compensation capacitors.

Abstract: In a control voltage producing apparatus, either a pulse-duration modulation signal or a pulse-width modulation signal, which are generated in response to a digital control signal, is from a first buffer circuit to an averaging circuit so as to be averaged. A power supply voltage is supplied from a first voltage source to this first buffer circuit. Then, the averaged signal is supplied to a control voltage producing circuit for producing a target control voltage. When a control voltage is produced, the same output voltage as that of the first buffer circuit is generated by a second buffer circuit, and then is supplied to the control voltage generating circuit and an operation control circuit. In response to the output voltage derived from the second buffer circuit, the operation control circuit applies the power supply voltage to the control voltage producing circuit so as to cause this control voltage producing circuit to be operable.

Abstract: An apparatus and method for deriving a signal from the AC line and conveying it to processing circuitry employs two wires each of which is non-conductively attached and capacitively coupled to a respective one of a two-wire AC power line. Each of the capacitive pick-offs is coupled to a respective input of a differential amplifier for amplification. Advantageously, because the output signal is a replica of the AC power line signal, the detection threshold can be set at or near zero volts. This makes the detection point insensitive to the amplitude variations of the AC power line. In one embodiment, an output signal is developed at a single ended output of the differential amplifier, and applied to a low pass filter to remove undesired higher frequencies. A further amplifier provides greater amplification of the filtered representation of the AC power line signal, and includes an amplitude limiting circuit to accommodate the wide range of AC line voltages which may be applied to the instrument.

Abstract: A switch mode voltage regulator with synchronous rectification that produces ripple cancellation with fast load response is described. The switch mode voltage regulator comprises a main step-down regulator with synchronous rectification with an auxiliary step-down regulator that produces an output ripple cancellation current that is equal but opposite to the output ripple of the main regulator during static load conditions. During changing load conditions a feedback control circuit changes the duty cycle of the main regulator while a time-delay circuit prevents a change of the duty cycle in the auxiliary regulator. Thus, the main regulator is allowed to change its average current while preventing a counteracting average current change in the auxiliary regulator. An embodiment is described in which the duty cycle in the auxiliary regulator is changed in phase with the duty cycle of main regulator to further improve the dynamic response to load changes.

Abstract: An integrated circuit arrangement with a diode characteristic including a source-drain section of a first transistor arranged in the current path between the input and output sides of the arrangement; a first inverter stage with an output fed back to its input, and whose supply voltage is provided by the voltage on the output side of the circuit arrangement; a second inverter stage to the input of which the output signal from the first inverter stage is fed and whose supply voltage is provided by the voltage on the input side of the circuit arrangement; and a third inverter stage having an input to which the output signal from the second inverter stage is fed, whose voltage supply is provided by the voltage on the output side of the circuit arrangement, and whose output signal is fed to the gate electrode of the first transistor, and thus regulates the current flow in the current path of the circuit arrangement.

Abstract: A double half-wave rectifier circuit with earth shift using an input differential amplifier and two current mirrors in cascode configuration in such a way that the input current is transferred to the output via one or the other of the current mirrors depending on whether the input signal voltage is greater than or less than an input reference voltage and therefore the current is positive or negative.

Abstract: A transistor bias circuit which achieves stable operation in a multistage-connected amplifier circuit or in a compound circuit is formed, for example, by a transistor amplifier and a mixer. The transistor bias circuit, which establishes the operating point of a transistor, has an input biasing circuit which is connected to a signal input terminal of the transistor and which applies a bias current to this input terminal from a power supply. The input biasing circuit has an input frequency selection unit which passes an AC input signal input to the transistor signals input terminal within a prescribed frequency band, and which attenuates an AC input signal input to the transistor signal input terminal outside the prescribed frequency band.

Abstract: An integrated circuit includes a semiconductor die and electronic circuitry elements formed therein. First and second internal power supply lines transmit first and second supply voltages to provide power for the circuitry elements. The die includes bypass circuitry to inhibit variations in the supply voltages. The bypass circuitry includes transconductance circuitry, characterized by a variable conductivity, having a first flow electrode coupled to the first supply line, a second flow electrode coupled to the second supply line, and a control electrode for controlling current flow between the flow electrodes. The conductivity of the transconductance circuitry varies in response to a voltage difference between the control electrode and the second flow electrode. Voltage amplifier circuitry has a first input terminal coupled to the first supply line and a second input terminal coupled to the second supply line.

Abstract: An input buffer circuit of a semiconductor memory capable of controlling a logic threshold voltage of the circuit according to a change in an external supply voltage, which includes an external supply voltage detecting unit for dividing the external supply voltage into a plurality of regions by comparing a plurality of voltages, which have been divided by different ratios of the entire external supply voltage, with a standard voltage; and a converting unit including a pull-up circuit and a pull-down circuit, for converting input signals of TTL level into signals of CMOS level, according to the regions of the external supply voltage obtained by the external supply voltage detecting unit.

Abstract: A motor control circuit is used to generate positive and negative voltage supply rails. The motor control circuit contains two halfbridges, each of which contains a pair of MOSFETs connected in series, each of the MOSFETs being formed without the customary short between the source and substrate (body). In one embodiment, a common node between the MOSFETs is connected to a positive voltage supply rail, and the body regions of the MOSFETs are connected to a negative voltage supply rail. The positive and negative voltage supply rails are biased by charging respective capacitors, using the positive and negative voltage spikes that appear at the outputs of the motor control circuit as the outputs switch from a low state to a high state, and vice versa.

Abstract: A voltage reference circuit (2) is provided that operates with a minimal amount of headroom. A low threshold voltage transistor (M71) is incorporated into a bandgap reference circuit (Q4, Q3, Q2, Q1, R2 and R1) to eliminate base current errors that a current mirror (Q3 and Q4) of the bandgap may introduce. A low threshold voltage transistor (M72) is incorporated into the gain circuit (Q7) to eliminate base current error that a gain transistor (Q7) may introduce. A third low voltage transistor (M73) may be incorporated into a feedback circuit (QS) to eliminate any voltage variations possibly caused by the addition of the first two low threshold transistors (M71 and M72). Using P channel type MOS low voltage threshold transistors for base drive cancellation allows the circuit to operate effectively with a very low input voltage of around about 2.0 volts.

Abstract: In integrated storage circuits which receive energy only via a coil in a contactless manner and which also execute the data exchange, the integrated storage circuit loads the coil to a greater extent dependent upon the data read. It is possible to detect this load variation in the device feeding the coil. Detection is more reliable as the load variation is greater. However in the case of a high coil load, the voltage across the coil decreases to such an extent that, after rectification, it is no longer sufficient to reliably energize. The supply voltage for the storage circuit is generated by means of a voltage increase circuit during the increased load. The voltage increase circuit is controlled by the data.