Abstract: An electronic system (10). The system comprises circuitry (P1) for receiving a system voltage from a voltage supply. The system also comprises circuitry (141), responsive to the system voltage, for providing data processing functionality. The circuitry for providing data processing functionality comprises a critical path (CP1) and the critical path comprises a plurality of transistors. At least some transistors in the plurality of transistors have a corresponding predetermined voltage operating limit corresponding to a predicted lifespan. The system also comprises circuitry (221) for indicating a potential capability of operational speed of the critical path. The system also comprises circuitry (CB) for coupling the system voltage to the critical path. Lastly, the system also comprises circuitry (26) for adjusting the system voltage, as provided by the voltage supply, in response to the circuitry for indicating a potential capability.

Abstract: The invention relates to a sense amplifier comprising the following element: a first current mirror unit coupled to a high voltage source, outputting a first current and a second current according to a first reference current, wherein the second current is twice the first current; a second current mirror unit coupled to a high voltage source, outputting a third current according to a second reference current; a first impedor coupled to the second current and a low voltage source; a second impedor coupled to the third current and a low voltage source; a third current mirror coupled to the first, second and third currents, and the first current is regarded as the reference current of the third current mirror unit, thus, the current which flows through the first impedor is the first current, and the current which flows through the second impedor is a fourth current.

Abstract: An apparatus and method for improving memory cell reliability is disclosed. The slew rate is reduced in an applied voltage signal used to program a memory cell when Fowler-Nordheim (FN) tunneling injection is detected. The applied programming signal is provided by a charge pump that is preferably a regulated charge pump. The charge pump is selectively controlled by a slew rate control circuit when FN tunneling injection is detected by a voltage level detection circuit at a predetermined threshold voltage level.

Abstract: The signal detection circuit of the present invention includes: a comparison section for comparing the absolute value of a voltage of an input differential signal with a threshold voltage corresponding to a first detection level adjustment signal to detect presence/absence of an input signal and outputting a detection signal indicating the detection result; a threshold adjustment control section for generating the first detection level adjustment signal in response to the detection signal and outputting the generated signal; and a detection section for detecting whether or not the level of the detection signal changes repeatedly.

Abstract: A voltage (UE1, UE2), other than a supply voltage (UV1, UV2), is monitored and controlled to avoid damage to circuit components by maintaining a required voltage level. Dissipation power losses are reduced by switching off a monitoring circuit when monitoring is not required. For this purpose a stepped down voltage is derived from the voltage to be monitored at a tap (N1) of a voltage divider connected between ground potential and the voltage to be monitored. The derived voltage is then evaluated, for example by comparing with a reference voltage. A controllable switch is connected in series with two voltage divider elements. The switch is controlled to open for switching off the voltage divider when monitoring is not needed. The switch is closed to activate the voltage divider when monitoring is needed.

Abstract: A circuit for adaptively adjusting the drive strength of output power transistors in a class D amplifier is provided. The circuit includes a driver circuit and a low-voltage detect circuit. The low-voltage detect circuit is arranged to assert a low-voltage detect signal if a low supply voltage condition is detected. The driver circuit is arranged to increase the drive strength if the low-voltage detect signal is asserted. The driver circuit includes a first driver and a second driver. The second driver is enabled if the low-voltage detect signal is asserted, and disabled if the low-voltage detect signal is unasserted.

Abstract: A device and method are disclosed, whereby the normally complicated and difficult frequency determination is achieved by simply arranged and executed measures, namely by means of larger, smaller and/or equal comparisons and a counting of certain events. The invention further relates to arrangements whereby the noise signal level, or the influence thereof on the verification to be carried out is reduced.

Abstract: A voltage detection circuit of the invention is composed of the minimum needed number of circuit elements and that permits the temperature characteristic of the reference level for voltage detection to be set arbitrarily. The voltage detection circuit has a first transistor and a second transistor that have the emitters thereof connected together to form a differential pair, a voltage division circuit that divides the input voltage into a first division voltage and a second division voltage, that is connected directly to the base of the first transistor to apply the first division voltage thereto, and that is connected directly to the base of the second transistor to apply the second division voltage thereto, and a resistor that has one end thereof connected to the base of the second transistor and that has the other end thereof connected to the emitter of the second transistor. Whether the input voltage is equal to a predetermined level or not is checked based on the output from the differential pair.

Abstract: A signal processing circuit includes a comparator having a fixed and a variable reference input for detection of a positive quasi-sinusoidal waveform pulse. A signal detection circuit includes a low pass input filter, a voltage input clamp, a variable detection threshold, and a zero crossing detector. The circuit produces an approximately square wave output substantially coinciding with the positive pulse of the quasi-sinusoidal waveform received, from a variable reluctance sensor. The circuit has a positive to negative zero crossing detector armed by a variable threshold of the positive quasi-sinusoidal pulse, thus providing variable noise immunity and a fixed phase relationship between the input and output signal for an input signal having a variable amplitude.

Abstract: A switching point detection circuit for detecting a switching point according to a fabrication condition of a MOS transistor includes a reference voltage generation circuit for generating a reference voltage, a first CMOS inverter circuit for receiving the reference voltage, and a second CMOS inverter circuit for receiving the reference voltage, wherein an NMOS transistor is a dominant transistor for the reference voltage in the first CMOS inverter circuit and a PMOS transistor is a dominant transistor for the reference voltage in the second CMOS inverter circuit.

Abstract: A control arrangement and method is provided that monitors the condition and operating parameters of a power electronic system having power electronic devices and responds to various detected abnormalities via appropriate action to optimize operation of the power electronic system. The arrangement increases reliability of operation and optimizes the continuous supply of power to a load For example, the arrangement responds to an overheated or shorted power electronic switch by switching to an alternate power electronic switch, the overheated power electronic switch being made available as a temporary alternate path. The arrangement also includes the capability for diagnosing the power electronic switches by detecting whether or not any switch is shorted in the series-connected stack of switch stages.

Abstract: A chopper comparator includes an input voltage conversion circuit, a reference voltage input circuit and a comparison amplifier. The input voltage conversion circuit is applied to an input voltage. The input voltage conversion circuit converts the input voltage to a converted input voltage that is lower than a first voltage. The reference voltage input circuit provides a reference voltage. The comparison amplifier compares a voltage of the converted input voltage with the reference voltage and amplifies a result of the comparison. The comparison amplifier includes an inverter having a withstand voltage substantially equal to the first voltage.

Abstract: Within one embodiment, a voltage detector circuit detects whether a voltage supply (e.g., VDD) is in a high or low range and generates a logic output. Using this logic output, a variable RC (resistor capacitor) VDD filter may be implemented such that at high VDD the amount of resistance is increased, thereby increasing the decoupling on the VDD line and reducing the size of current spikes on VDD. This is particularly useful in circuits that function over a wide range of VDD supply. The voltage detector circuit can also be used in other embodiments as well. For example, the voltage detector circuit may be used to change the drive strength (e.g., effective W/L) of an output driver such that more drive is provided at low VDD and less at high VDD thereby having the effect of reducing rise/fall time variation and reducing the size of current spikes at high VDD.

Abstract: A VBB control circuit includes an intermediate potential generation circuit receiving a substrate potential VBB which is a negative potential and outputting a divided potential between a power supply potential INTVDD and a ground potential, and an inverter receiving the divided potential and determining whether the substrate potential is higher or lower than a desired value. A logic threshold value of the inverter is (½)×INTVDD. If a relationship of VBB=VREFB−(½)×INTVDD is satisfied, the divided potential accurately becomes (½)×INTVDD. Thereby, it is possible to realize a semiconductor device including a detection circuit which can arbitrarily select a detected potential of the VBB by changing VREFB and which is less influenced by a change in manufacturing conditions.

Abstract: In order to avoid any malfunction for a temporary change in power supply voltage and suppress decrease in internal power supply voltage when transition is effected from the stand-by mode to the active mode, the disclosed semiconductor integrated circuit is provided with a detecting circuit which prevents malfunction in a temporary change in the power supply voltage from occurring by changing a detection level according to when the power supply voltage is increased or decreased. Further, a decrease in the internal power supply voltage immediately after the transition from the stand-by mode to the active mode is suppressed by employing a PMOS down converter in the stand-by mode and an NMOS down converter in the active mode, and setting an internal power supply voltage of the PMOS down converter in the stand-by mode higher than in the active mode.

Abstract: A voltage-comparing device applied in a cursor-control input device is provided. The voltage-comparing device includes an analog-signal converter obtaining an initial reference voltage for the follow-up device in an operational procedure corresponding to an input voltage and a comparing circuit sending a feedback to control the input resistance device, the reference voltage and the offset voltage for preventing the voltage comparing device from the disturbance of noises.

Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.

Abstract: A voltage control circuit for implementing, e.g., the CPS function in which a high-accuracy comparison is performed between a high external voltage and a reference voltage. A diode-connected transistor converts the external voltage to a voltage lower than the external voltage in conjunction with an external voltage dropping resistor. A comparator compares the converted voltage with a specified comparison voltage. The size of the transistor is determined such that the ratio of an increment of the converted voltage to an increment of the external voltage is sufficiently high in a comparison region in which the external voltage is close to the reference voltage. A clamping circuit clamps the converted voltage with a specified limit voltage such that the converted voltage does not exceed the withstand voltage of the circuit.

Abstract: A voltage comparator with hysteresis that includes a differential amplifier, voltage divider circuits and a current mirror circuit. The input terminals of the two differential amplifier circuit branches are biased at unequal potentials by the voltage divider circuits. One voltage divider output voltage is fixed and the other is variable. The input terminal of the differential amplifier circuit branch biased at the fixed potential receives an AC-coupled input signal voltage. The sum of the input signal voltage and the fixed bias voltage is compared against the variable bias voltage. A current mirror circuit, which is activated during conduction by the differential amplifier circuit branch biased at the variable potential, shunts a portion of the current used by the voltage divider circuit that generates the variable potential. This causes the variable voltage divider output voltage to change, thereby introducing hysteresis into the voltage comparison performed by the differential amplifier.

Abstract: A comparator circuit for positive and negative signals having zero consumption and suitable for devices with a single positive power supply includes a first and second comparator connected in parallel and receiving a common input signal and, respectively, a first positive threshold voltage and a second negative threshold voltage. The comparator circuit further includes a first logic circuit cascade-connected to the first and second comparators. The first and second comparators are respectively suitable to detect the crossing on the part of the input signal of the first and second threshold voltages. The second comparator is provided by n-channel and p-channel MOS transistors of the enhancement type. The comparator circuit also includes a second logic circuit cascade-connected to the first logic circuit, and a monostable circuit connected to the second logic circuit.

Abstract: An integrated circuit and method utilizes a differential input receiver having a first input that receives an input signal. A reference voltage adjustment circuit produces a variable reference signal for the second input of a differential input receiver. A feedback path is provided from the output of the differential input receiver to an input of the reference voltage adjustment circuit. The reference voltage adjustment circuit dynamically varies the variable reference voltage signal to facilitate hysteresis. The variable reference voltage signal is lowered in the case of a high input signal, and raised in the case of a low input signal.

Abstract: A multi-channel readout chip is provided in which each channel has an analog section and a digital section. Each channel of the readout chip employs low noise charge sensitive amplifier inputs with self triggering output. The trigger threshold can be adjusted to provide energy discrimination. The chip has different, externally selectable, operational modes including a sparse readout mode in which only the channels which have received signals greater than a preselected threshold value are readout. The sparse readout mode results in increased data throughput, thus providing fast data acquisition capabilities.

Abstract: A CMOS current comparator featuring shortened response delay times lower power consumption, smaller area and enhanced process robustness. The current comparator is comprised of a CMOS complementary amplifier, two resistive-load amplifiers and two CMOS inverters. The CMOS complementary amplifier receives an input current from an input node which generates an output voltage at a corresponding output node. The CMOS complementary amplifier is comprised of an N-type metal oxide semiconductor field effect transistor (NMOS) and a P-type metal oxide semiconductor field effect transistor (PMOS) connected in series. Control gates on both the NMOS and PMOS are connected to form the input node. NMOS and PMOS drain electrodes are also coupled to the output node. The CMOS complementary amplifier further has a resistive feedback circuit which is connected between the input and output nodes.

Abstract: A resistance element and an N channel MOS transistor are connected in series between an output terminal of a voltage generation circuit in a flash memory and a line of a ground potential. A constant current is conducted to the MOS transistor, and the potential of the drain of the N channel MOS transistor is compared with a reference potential by a comparator. The voltage conversion factor becomes 1, so that the voltage detection accuracy is improved.

Abstract: A device for detecting the application of a high voltage signal to an internal node of an integrated circuit includes a high-voltage divider circuit and a threshold detection circuit. The threshold detection circuit receives a signal given by the output of the divider circuit, and provides a threshold crossing detection signal at an output thereof based upon the signal crossing a threshold. The detection circuit is connected between the logic supply voltage and ground, and further includes a negative feedback loop. The negative feedback loop is connected to the output of the divider circuit to limit the voltage build-up of the high voltage signal at the output thereof after the crossing of the detection threshold by the signal.

Abstract: An internal circuit of a semiconductor integrated circuit includes an inverter inputted with an input signal and is supplied with a power supply voltage during normal operation. The input terminal and the internal circuit are connected by a signal line having a resistor. A voltage determining circuit for determining whether a voltage of an input signal inputted to the input terminal is a signal voltage for use in the normal operation of the internal circuit or a high voltage for setting up an internal circuit test mode is connected to a node of the signal line. P-type MOS transistors are connected in series across a node of the signal line and the power supply voltage. The source of a first one of the P-type MOS transistors is connected to the power supply voltage together with the gate electrode and the substrate, and the drain is connected to the drain of the other P-type MOS transistor.

Abstract: The temperature sensor measures temperatures within a defined temperature measuring range. The sensor includes a reference voltage source with an output terminal to which a reference voltage is applied and which is connected to a first input terminal of a comparator. A series circuit of a semiconductor component with temperature-independent current characteristic and a reference component is connected between a first and a second supply voltage terminal. A temperature-dependent voltage is applied to a node common to the semiconductor component and the reference component. The temperature-dependent voltage is fed to a second input terminal of the comparator. The supply voltage is adjustable within a defined supply voltage range and, within a voltage range resulting from the supply voltage range of a voltage across the reference component, the reference component has a voltage-dependent current characteristic.

Abstract: The present invention relates to an AC input cell for data acquisition circuits, comprising at least one circuit for detecting a voltage greater than the reference for the positive half-cycle at the input voltage, and a device for detecting a voltage greater than the reference for the negative half-cycle of the input voltage. Each detection circuit comprises a Zener diode, an optocoupler including an emission LED, a diode and a resistor arranged in series. Each detection circuit is arranged on a branch, and the two branches are in parallel with the devices arranged in opposite directions so that the two circuits conduct on alternate half cycles of the input AC signal.

Abstract: A semiconductor integrated circuit device includes an operating mode setting circuit for determining an operating mode. Operating mode setting circuit includes an operating mode control circuit and an operating mode alteration circuit. Operating mode control circuit generates an operating mode setting signal depending on wire bonding provided to external input pads. Operating mode alteration circuit includes fuse input pads, electric fuses, and an operating mode inverting circuit. Operating mode inverting circuit inverts an operating mode setting signal once determined by blowing each of electric fuses.

Abstract: A comparator with hysteresis having a simplified architecture such that the amount of hysteresis can be readily adjusted. In one aspect, a comparator with hysteresis comprises a first switch for coupling an analog input voltage to a signal node in response to a first clock signal; an inverter having an input port and an output port; a capacitor operatively coupled between the signal node and an input port of the inverter; a second switch operatively connected between the input port and the output port of the inverter, the second switch being responsive to the first clock signal; a latch having a clock port, an output signal port, an inverse output signal port, and an input data port, the input data port being coupled to the output port of the inverter; and a reference voltage control circuit for selectively outputting a first internal reference voltage and a second internal reference voltage to the signal node in response to the output signal and inverse output signal, respectively, received from the latch.

Abstract: A voltage detector circuit of a nonvolatile memory integrated circuit for determining the voltage potential of a supply voltage is provided. The voltage detector includes a first MOS device, a second MOS device, a bias circuit for adjusting the current through the first and second MOS devices that is responsive to the level of the supply voltage, and an output circuit that provides an output signal indicating the level of the supply voltage. The bias circuit may comprise a voltage divider circuit which provides a predetermined ratio of the supply voltage to the gate of one or both of the MOS devices. The voltage divider circuit may comprise MOS devices configured as resistive devices in series. The current through the MOS devices is provided to the output circuit, and the output circuit utilizes a measure of the difference in the current levels to determine the level of the voltage supply and provide the appropriate output signal.

Abstract: A multi-channel readout chip is provided in which each channel has an analog section and a digital section. Each channel of the readout chip employs low noise charge sensitive amplifier inputs with self triggering output. The trigger threshold can be adjusted to provide energy discrimination. The chip has different, externally selectable, operational modes including a sparse readout mode in which only the channels which have received signals greater than a preselected threshold value are readout. The sparse readout mode results in increased data throughput, thus providing fast data acquisition capabilities.

Abstract: A voltage sensing circuit consists of a sensing node, a transistor of a first conductivity type, a diode-like device, a first reference voltage source, a transistor of a second conductivity type, and a second reference voltage source. The transistor of a first conductivity type is configured with one source/drain receiving an input voltage signal and another source/drain connected to the sensing node. The diode-like device receives the input voltage signal and, accordingly, generates a voltage-dropped signal. The first reference voltage source is connected to a gate of the transistor of the first conductivity type. The transistor of a second conductivity type is configured with one source/drain connected to the sensing node and a gate receiving the voltage-dropped signal. The second reference voltage source is connected to another source/drain of the transistor of the second conductivity type.

Abstract: An integrated circuit and method utilizes a differential input receiver having a first input that receives an input signal. A reference voltage adjustment circuit produces a variable reference signal for the second input of a differential input receiver. A feedback path is provided from the output of the differential input receiver to an input of the reference voltage adjustment circuit. The reference voltage adjustment circuit dynamically varies the variable reference voltage signal to facilitate hysteresis. The variable reference voltage signal is lowered in the case of a high input signal, and raised in the case of a low input signal.

Abstract: A circuit configuration for a comparator provides that first and second transistors on an input side are connected jointly by their two control terminals to a first input terminal, and that the first and second transistors have different cutoff voltages. Such a circuit configuration has the advantage that at a zero-volt input voltage, no current is consumed. The circuit configuration can be connected directly to a high-voltage supply without the aid of regulating voltages or high-precision reference voltages.

Abstract: A high-speed differential comparator (300) is disclosed. A transconductance device is connected to the input terminal and the first and second output terminals (305 and 309, respectively) of the comparator. The transconductance device receives an input voltage (V.sub.IN) from the input terminal and generates a current between the first and second output terminals (305 and 309) in response to the input voltage. A load is connected between the first and second output terminals. The load, which includes a resonant tunneling diode (313), conducts the current and generates a voltage difference between the first and second output terminals (305 and 309) in response to the current. The comparator responds to input voltages at high speed and may be used for high frequency signal sampling and level determination.

Abstract: A temperature sensing circuit suitable for integration with a power semiconductor device (MOSFET/IGBT) includes temperature-sensing p-n diode means (D1, D2, etc . . . ) integrated together with first and second IGFETs (M1 and M2). A current path through the temperature-sensing p-n diode means (D1, D2, etc . . . ) provides a voltage drop (Vf) having a negative temperature coefficient. The IGFETs (M1 and M2) are coupled in separate current paths from each other so as to have separate gate-to-source voltage signals (Vgs1 and Vgs2) between their source and gate electrodes (s and g). The gate-to-source voltage (Vgs1) of the first IGFET (M1) has a negative temperature coefficient of greater magnitude than the temperature coefficient (if any) of the gate-to-source voltage (Vgs2) of the second IGFET (M2). One of the source and gate electrodes (s or g) of the first IGFET (M1) is coupled to the p-n diode means (D1, D2, etc . . .

Abstract: A continuous input cell for data acquisition circuits, particularly in railway applications. The cell consists of at least two parallel lines of identical elements, and each line includes at least one Zener diode (DZ1 or DZ2), a switch (SW1 or SW2) preferably consisting of an optocoupler (U1 or U2), and an optocoupler (U3 or U4) including an LED.

Abstract: A negative voltage detection circuit has a detection level of which is independent from the threshold voltage of a MOS transistor incorporated into the memory device. The negative voltage detection circuit detects whether or not the output voltage of a charge pump has a desired level, and then a signal is output in accordance with the detection result. The negative voltage detection circuit detects the negative voltage by comparing the multiple of the negative voltage by -(1/n) (n is a natural number) with a the positive inner reference voltage V.sub.ref. When the multiple and the reference voltage V.sub.ref are equal to each other, the negative voltage detection circuit determines that the negative voltage has the desired level. When the level of the output is lower than the desired level, the charge pump is stopped. Otherwise, a control signal is output to operate the charge pump so as to control the negative voltage at the desired level by the feed back control.

Abstract: This invention relates to a voltage comparator with an input for an analog signal and an output for a digital signal, comprising an inverter which has an input coupled to the comparator input and an output coupled to the comparator output, and comprising at least two MOS transistors coupled to each other, at least one of the two MOS transistors being of the floating gate type.

Abstract: A substrate voltage generating circuitry for a dynamic random access memory (DRAM) generates the substrate voltage using an intermittently enabled charge pump. The value to which the substrate voltage is regulated is adjusted responsive to the static refresh and dynamic refresh characteristics of the memory cells. The adjustment is made in the portion of the substrate voltage generating circuit used for sensing the substrate potential, using fusible links that can be interrupted or cut with a laser beam. Novel circuitry for sensing the substrate potential, which does not load the substrate so as to dissipate charge placed thereon by the charge pump, is used in preferred substrate voltage generating circuitry.

Abstract: The disclosed substrate potential detecting circuit can reduce both the power consumption and the pattern area thereof. The substrate potential detecting circuit comprises: a series circuit composed of a plurality of same-conductivity type MOS transistors. Each transistor has a source terminal connected to a substrate terminal thereof and a drain terminal connected to a gate terminal thereof. Further, the channel widths of all the MOS transistors are determined equal to each other and so selected that all the transistors can be operative in a sub-threshold region, respectively.

Abstract: An output circuit for a semiconductor device that outputs an output voltage based on a received external signal. The output circuit has an interface that receives the external signal, and a comparing unit that compares the external signal with a plurality of predetermined threshold voltages. The comparing unit outputs a voltage driving signal based on the comparison results. Also, the output circuit has an output unit that outputs the output voltage based on the voltage driving signal from the comparing unit.

Abstract: A circuit for generating a threshold voltage level from a time division duplex analog data signal. The circuit comprises a sample/hold circuit and an amplifier. The sample/hold circuit is arranged to sample the threshold voltage level during a reception interval and hold the threshold voltage level during a transmission interval. The amplifier includes an operational amplifier coupled to the sample/hold circuit for amplifying the analog data signal during a reception interval and amplifying the threshold voltage level during a transmission interval. A transconductance device is coupled to the operational amplifier, and a plurality of load legs are respectively coupled to a plurality of bias legs. A first selected pair of the respectively coupled load legs and bias legs is coupled to the transconductance device, and a second selected pair of the respectively coupled load legs and bias legs coupled to the output of the amplifier to provide the threshold voltage level.

Abstract: For providing a high voltage detector circuit for discriminating whether a voltage supplied to an input terminal (1) is higher or not than a power supply thereof, stably independent of its power supply fluctuation or noises and without problem of gate oxide break because of high voltage; a high voltage detector circuit of the invention comprises: a MOS transistor (P1) with its gate connected to the power supply; a first resistor (R1) connected between a source of the MOS transistor and the input terminal; a second resistor (R2) connected between a drain of the MOS transistor and a ground; and an inverter for outputting inverse logic of a drain voltage of the MOS transistor to an output terminal (OUT).

Abstract: A circuit arrangement is disclosed which detects a signal pauses in an audio signal, The audio signal is amplified, rectified, and then sent to a control unit. The control unit periodically sets the output of the rectifier to a predetermined level below a threshold level. The control unit then waits a predetermined period of time and determines whether the signal at the output of the rectifier has exceeded the threshold. If is does not, a signal pause has occurred.

Abstract: An eletronic system includes a power supply providing an operating voltage, and a reset circuit. The reset circuit includes a voltage sensing circuit, coupled to the power supply, for generating a control signal when the operating voltage drops below a predetermined voltage. A control circuit generates a rest signal in response to the control signal. Further circuitry provides power to the control circuit, independently of the power supply, when the operating voltage drops below the predetermined voltage.

Abstract: A resettable latched voltage comparator includes a resonant tunneling diode 10 connected in series with an amplifier 14 and a power source 16, and a reset circuit 12 connected between a circuit output terminal 18 and a second power source 20. Amplifier 14 converts the value of the voltage at an input terminal 22 into a proportional current at terminal 24; diode 10 detects the condition when the current at terminal 24 rises above a specific value equal to the resonant peak current of resonant tunneling diode 10; and reset circuit 12 controllably forces the voltage at terminal 18 of the circuit to a value approximately equal to the output voltage of power source 16 at terminal 29, thereby reducing the bias across diode 10 to approximately zero. A flash analog-to-digital converter configuration includes a plurality of comparators 200.sub.i having their reference voltage inputs biased from a series-connected chain of resistors 210.sub.i. The input terminals 22.sub.

Abstract: A voltage detector circuit for instantaneously detecting abnormal voltages in a micro controller includes a voltage detection circuit connected between the power supply and reset voltage ends of an internal circuit of the micro controller so as to instantaneously detect changes in the power supply, without the time delay associated with the external low pass filter that supplies the reset voltage. The detecting circuit is a logic "NOT" gate which has a power supply connecting end connected to a reset voltage end of the internal circuit, an input end connected to the power supply end of the internal circuit, and an output end connected to a cooperating input end of the latch circuit, so that the latch circuit latches a signal output by the voltage detector whenever an abnormal power supply voltage is detected, and outputs a flag signal to the micro controller to effect an instantaneous reset of the micro controller.

Abstract: Disclosed is a charge pump type of negative voltage generator circuit, constructed on a P type substrate and supplying a negative voltage at one output by the pumping of negative charges in n series-connected pumping cells, n being an integer, these pumping cells including P type transistors whose wells are connected to a node to be positively biased. This circuit includes a switching circuit for selectively supplying, at the node, a voltage for biasing of the wells that is greater than or equal to the potential present at the output so long as this potential is greater than a positive reference voltage, and provides a voltage of fixed value for biasing of the wells when the potential present at the output is smaller than the reference voltage. Thus, the appearance of latchup phenomena in the transistors of the pumping cells is prevented.