Bias Control Signal From Input Of Amplifier Patents (Class 330/136)
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Patent number: 10749476Abstract: A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit includes a state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein at least one operational mode comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes includes at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is controlled by a digital selection signal received from a digital communication interface associated therewith.Type: GrantFiled: April 18, 2019Date of Patent: August 18, 2020Assignee: Intel IP CorporationInventors: Ilan Sutskover, Eran Segev, Stephan Henzler, Alexander Belitzer
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Patent number: 10707820Abstract: A power amplifying apparatus includes a first bias circuit that generates a first bias current having a first magnitude, a first amplification circuit connected between a first node and a second node, and that receives the first bias current, amplifies a signal input through the first node, and outputs a first amplified signal to the second node, a second bias circuit that generates a second bias current having a second magnitude that is different from the first magnitude of the first bias current, and a second amplification circuit connected in parallel with the first amplification circuit between the first node and the second node, and that receives the second bias current, amplifies the signal input through the first node, and outputs a second amplified signal to the second node, wherein the second amplification circuit may have a size that is different from a size of the first amplification circuit.Type: GrantFiled: October 16, 2018Date of Patent: July 7, 2020Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyu Jin Choi, Jae Hyouck Choi
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Patent number: 10693420Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.Type: GrantFiled: August 31, 2018Date of Patent: June 23, 2020Assignee: Qorvo US, Inc.Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
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Patent number: 10680607Abstract: A gate-drive system according to the present invention which transmits a drive signal to a semiconductor switching device, includes: an inverter circuit to supply high-frequency power including a fundamental wave component and plural harmonic components each having different frequencies; a power transmission circuit which is connected to the inverter circuit and transmits the high-frequency power outputted from the inverter circuit; power receiving circuits to individually receive the fundamental wave component and plural harmonic components of the high-frequency power transmitted from the power transmission circuit; and a control circuit to generate the drive signal for the semiconductor switching device on the basis of the plural harmonic components of the high-frequency power received by the power receiving circuits.Type: GrantFiled: October 24, 2017Date of Patent: June 9, 2020Assignee: Mitsubishi Electric CorporationInventor: Takuya Yabumoto
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Patent number: 10651809Abstract: An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.Type: GrantFiled: June 1, 2018Date of Patent: May 12, 2020Assignee: Astrium LimitedInventor: Martin Goss
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Patent number: 10637399Abstract: A low modulation bandwidth (LMB) envelope tracking (ET) circuit is provided. The LMB ET circuit is configured to generate an ET modulated voltage at an output node based on a modulated target voltage for amplifying an LMB radio frequency (RF) signal. More specifically, the LMB ET circuit includes an amplifier configured to generate a modulated amplifier voltage based on the modulated target voltage and an offset circuit configured to raise the modulated amplifier voltage by a modulated offset voltage at the output node. The offset circuit is configured to generate the modulated offset voltage based on a modulated target offset voltage that is proportional to the modulated target voltage. As a result, it may be possible to maintain the ET modulated voltage at a defined voltage level for a defined duration such that the LMB RF signal can be amplified to a defined power level.Type: GrantFiled: July 30, 2018Date of Patent: April 28, 2020Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Manbir Singh Nag
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Patent number: 10637404Abstract: An amplifier apparatus (332) comprises a main linear amplifier sub-circuit (402) having a main driving signal input terminal (331) and a main amplifier output terminal (406). The apparatus also comprises an auxiliary linear amplifier sub-circuit (404) having an auxiliary driving signal input terminal (357) and an auxiliary amplifier output terminal (408). A combining network (410) is operably coupled between the main amplifier output terminal (406) and the auxiliary amplifier output terminal (408), the combining network (410) having a main-side terminal (424) and an auxiliary-side terminal (434). The main linear amplifier sub-circuit (402) is arranged to generate, when in use, a main amplified signal in response to a main driving signal applied at the main driving signal input terminal (331).Type: GrantFiled: December 17, 2015Date of Patent: April 28, 2020Assignee: u-blox AGInventor: John Haine
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Patent number: 10620702Abstract: An internal device of a brain-machine interface system includes: an electrode group including N electrodes, N being 2 or more; an amplification element group including N amplification elements; a communicator communicating with an external device; and a controller selectively executing one of: a normal operation mode in which electroencephalogram signals acquired through the N electrodes are supplied to the amplification element group in a manner that each of the N electrodes corresponds to a respective one of the N amplification elements, and N amplified electroencephalogram signals are transmitted; and a noise-reduction operation mode in which an electroencephalogram signal acquired through an M electrode of the electrode group is supplied to the amplification element group in a manner that each M electrode corresponds to respective plural ones of the amplification elements, and an M amplified electroencephalogram signal is transmitted, M being smaller than N.Type: GrantFiled: November 1, 2017Date of Patent: April 14, 2020Assignees: NIHON KOHDEN CORPORATION, OSAKA UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGYInventors: Kaoru Imajo, Katsuyoshi Suzuki, Masayuki Hirata, Seiji Kameda, Takafumi Suzuki, Hiroshi Ando
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Patent number: 10615893Abstract: An apparatus is provided, where the apparatus includes a transmitter comprising a first stage and a second stage, wherein the first stage is to receive an input voltage and generate bias for the second stage, and wherein the second stage comprises a driver circuitry to transmit data using the bias voltage; and a control circuitry to control generation of the bias, based on receiving a feedback of the input voltage.Type: GrantFiled: September 27, 2018Date of Patent: April 7, 2020Assignee: Intel CorporationInventors: Chenchu Punnarao Bandi, Amit Kumar Srivastava, Michael W. Altmann
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Patent number: 10615813Abstract: Multi-Nyquist differentiator circuits and a radio frequency sampling receiver that applies a multi-Nyquist differentiator circuit. A multi-Nyquist differentiator includes a fixed coefficient filter, a scaling circuit, and a summation circuit. The fixed coefficient filter is configured to filter digital samples generated by an ADC. The scaling circuit is coupled to an output of the fixed coefficient filter, and is configured to scale output of the fixed coefficient filter based on a selected Nyquist band. The summation circuit is coupled to the scaling circuit, and is configured to generate a derivative of the digital samples based on output of the scaling circuit.Type: GrantFiled: April 30, 2019Date of Patent: April 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sriram Murali, Jaiganesh Balakrishnan, Chandrasekhar Sriram, Sashidharan Venkatraman, Jagdish Kumar Agrawal
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Patent number: 10511264Abstract: The present invention relates to a method, of providing adaptive impedance in a Power Amplifier (PA), by providing more than one transistors in which one transistor is used to change the load line or to linearize the input signal by adapting the biasing of each transistor, wherein the transistors are connected in parallel.Type: GrantFiled: November 23, 2015Date of Patent: December 17, 2019Inventor: Ofer Gepstein
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Patent number: 10505501Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.Type: GrantFiled: July 9, 2014Date of Patent: December 10, 2019Assignee: Skyworks Solutions, Inc.Inventors: Oleksandr Gorbachov, Huan Zhao, Lisette L. Zhang, Lothar Musiol, Yongxi Qian
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Patent number: 10483924Abstract: An audio amplifier circuit for providing an output signal to an audio transducer may include a power amplifier and a control circuit. The power amplifier may include an audio input for receiving an audio input signal, an audio output for generating the output signal based on the audio input signal, and a power supply input for receiving a power supply voltage, wherein the power supply voltage is variable among at least a first supply voltage and a second supply voltage greater than the first supply voltage and wherein the power supply voltage is generated by a configurable charge pump power supply. The control circuit may be configured to predict, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the power supply voltage, and responsive to predicting the occurrence of the condition, change, at an approximate zero crossing of the signal indicative of the output signal, the power supply voltage.Type: GrantFiled: March 19, 2018Date of Patent: November 19, 2019Assignee: Cirrus Logic, Inc.Inventors: Tejasvi Das, John L. Melanson, Eric J. King
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Patent number: 10476441Abstract: An envelope tracking (ET) current bias circuit includes a rectifying circuit, a phase compensation circuit, and a voltage/current conversion circuit. The rectifying circuit is configured to detect an envelope voltage from a radio frequency (RF) signal. The phase compensation circuit is configured to compensate for a phase of the envelope voltage in which the phase thereof is delayed in the rectifying circuit to output a phase compensated enveloped voltage. The voltage/current conversion circuit is configured to convert the phase compensated envelope voltage into an ET bias current.Type: GrantFiled: May 22, 2018Date of Patent: November 12, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Byeong Hak Jo, Jong Ok Ha, Jeong Hoon Kim
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Patent number: 10432249Abstract: A universal nonlinear variable delay filter includes a first mixer configured to convert an input signal to an up-converted signal including a frequency corresponding to a selected time delay. The input signal includes an original frequency. The variable delay filter also includes a nonlinear filter that filters the up-converted signal and generates a delayed signal that is delayed by the selected time delay. The variable delay filter further includes a second mixer configured to convert the delayed signal to a down-converted signal including a frequency substantially equal to the original frequency.Type: GrantFiled: June 14, 2018Date of Patent: October 1, 2019Assignee: The Boeing CompanyInventor: Gary A. Ray
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Patent number: 10418946Abstract: An envelope tracking device includes circuitry that senses a current of an input state of the envelope tracking device. The circuitry also senses an output voltage of the envelope tracking device, and turns on at least one of a first and a second output switches to generate an output current based on at least one of the sensed current and the sensed voltage.Type: GrantFiled: January 8, 2018Date of Patent: September 17, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Xiaofeng Lin, Leon Samuel Wang, Shengyuan Li, Junjie Lu, Xicheng Jiang
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Patent number: 10404225Abstract: In one aspect the embodiments relate to amplifier circuitry comprising an outphasing region and envelope tracking region. The outphasing region includes a signal processing block capable of receiving an amplitude and phase modulated input signal that is to be amplified, and processing said signal to separate it into two signals (S1, S2) of constant amplitude and modulated phase, a first signal S1 for driving a first RF power amplifier RF PA1 and a second signal S2 for driving a second RF power amplifier RF PA2. The output signals from each of the RF PAs are then provided to a power combiner (PC) for obtaining an output amplified signal (RF output).Type: GrantFiled: June 26, 2015Date of Patent: September 3, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Gavin Watkins, Konstantinos Mimis
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Patent number: 10396721Abstract: A distributor distributes an input signal to a first transmission line and a second transmission line. A high-pass filter, a first linearizer, and a first phase shifter disposed on the first transmission line adjust the phase and amplitude of an intermodulation distortion in a low-frequency range. A low-pass filter, a second linearizer, and a second phase shifter disposed on the second transmission line adjust the phase and amplitude of an intermodulation distortion in a high-frequency range. A synthesizer synthesizes the signal from the first transmission line and the signal from the second transmission line.Type: GrantFiled: November 18, 2015Date of Patent: August 27, 2019Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yuji Komatsuzaki, Yuichi Fujimoto, Jun Nishihara, Kazuhiro Iyomasa, Koji Yamanaka
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Patent number: 10396713Abstract: An envelope-tracking current bias circuit includes a first rectifying circuit, a second rectifying circuit, and a first arithmetic circuit. The first rectifying circuit is configured to detect an envelope of an input signal, and provide an envelope detection signal comprising a first direct current (DC) offset voltage. The second rectifying circuit is configured to provide a second DC offset voltage corresponding to the first DC offset voltage. The first arithmetic circuit is configured to provide an envelope signal in which the first DC offset voltage is reduced through subtraction between the envelope detection signal and the second DC offset voltage.Type: GrantFiled: November 13, 2017Date of Patent: August 27, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Byeong Hak Jo, Jeong Hoon Kim, Jong Ok Ha
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Patent number: 10389312Abstract: A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a common emitter bias node of a differential pair of transistors to provide a dynamic variable bias current thereto as a function of an input signal amplitude of an input signal. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the frequency content of the input signal. A delay in the signal path to the differential pair can phase-align the bias current to the amplification by the differential pair. A dynamic variable supply voltage can be based on an envelope of the input signal.Type: GrantFiled: January 25, 2018Date of Patent: August 20, 2019Assignee: Analog Devices, Inc.Inventor: Christopher John Day
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Patent number: 10312871Abstract: Circuits and methods related to power amplifiers. In some implementations, a bias circuit includes a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level. The bias circuit also includes a differential amplifier connectable to receive the first electrical supply level, the differential amplifier having a first input connectable to a first node of the reference device and a second input connectable to receive a reference electrical level, the differential amplifier arranged to maintain a first electrical level on the first node of the reference device as a function of the reference electrical level.Type: GrantFiled: October 24, 2017Date of Patent: June 4, 2019Assignee: SKYWORKS SOLUTIONS, INC.Inventor: Anatoli Pukhovski
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Patent number: 10312865Abstract: A difference amplifier circuit can be used to amplify a differential input signal representative of a current flowing through a current sensing element, such as a resistor. In certain applications, a common mode voltage established at an input of the difference amplifier circuit can be greater in magnitude than a supply voltage provided to the difference amplifier circuit. A component of the differential input signal, such as one polarity of the differential signal, can be used to power the difference amplifier circuit. Such powering of the difference amplifier by the component of the differential input signal can be performed selectively, such as when a magnitude of the common mode voltage exceeds the supply voltage or another specified threshold. In this manner, a common mode input voltage capability can be greater in magnitude than a magnitude of a supply input voltage provided to an integrated circuit including the difference amplifier circuit.Type: GrantFiled: October 16, 2017Date of Patent: June 4, 2019Assignee: Analog Devices, Inc.Inventor: Quan Wan
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Patent number: 10291184Abstract: A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit comprises a predefined state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a predefined mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein the one or more operational modes comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes comprises at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is dictated by a decoding of a digital selection signal received from a digital communication interface associated therewith.Type: GrantFiled: January 10, 2018Date of Patent: May 14, 2019Assignee: Intel IP CorporationInventors: Ilan Sutskover, Eran Segev, Stephan Henzler, Alexander Belitzer
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Patent number: 10236829Abstract: Aspects of this disclosure relate to dynamic error vector magnitude (DEVM) compensation. In one embodiment, an apparatus includes an amplifier, a low pass filter, and a bias circuit. The amplifier, such as a power amplifier, can amplify an input signal. The low pass filter, such as an integrator, can generate a correction signal based at least partly on an indication of a duty cycle of the amplifier. The indication of the duty cycle of the amplifier can be an enable signal for the amplifier, for example. The bias circuit can generate a bias signal based at least partly on the correction signal and provide the bias signal to the amplifier to bias the amplifier.Type: GrantFiled: October 19, 2017Date of Patent: March 19, 2019Assignee: Skyworks Solutions, Inc.Inventors: Lui Lam, Mark M. Doherty
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Patent number: 10236833Abstract: An RF package includes a metal flange, an RF input lead, an RF output lead, and an electrically conductive die attach area. An RF transistor that is configured to amplify an RF signal is mounted in the die attach area. The RF transistor includes an input terminal that is electrically coupled to the RF input lead, an output terminal that is electrically coupled to the RF output lead, and a reference potential terminal that is electrically connected to the die attach area. A first capacitor having one or more upper metal plates, and a dielectric region is mounted in the die attach area and is electrically coupled to the RF transmission path of the RF signal. The first capacitor is configured to simultaneously match an impedance of the RF transistor at a fundamental frequency of the RF signal and to filter a higher order harmonic of the fundamental frequency.Type: GrantFiled: August 2, 2017Date of Patent: March 19, 2019Assignee: Infineon Technologies AGInventors: Bayaner Arigong, Richard Wilson, Haedong Jang, Frank Trang, Timothy Canning, Rongguo Zhou, Bjoern Herrmann
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Patent number: 10236828Abstract: A power amplifier has improved power added efficiency at high output power. The power amplifier includes: a first transistor for amplifying an input signal input to the base thereof and outputting the amplified signal from the collector thereof; a second transistor with power-supply voltage applied to the collector thereof to supply bias voltage or bias current from the emitter thereof to the base of the first transistor; a third transistor whose collector is connected to the collector of the first transistor to amplify the input signal input to the base thereof and output the amplified signal from a collector thereof; a fourth transistor whose base and collector are connected to supply bias from the emitter thereof to the base of the third transistor; and a first resistor with bias control voltage applied to one end thereof and the other end connected to the bases of the second and fourth transistors.Type: GrantFiled: August 23, 2017Date of Patent: March 19, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kazuma Sugiura, Takashi Yamada, Norio Hayashi, Satoshi Tanaka, Kenichi Shimamoto, Kazuo Watanabe
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Patent number: 10230333Abstract: A power amplifier, a radio remote unit (RRU), and a base station, where the power amplifier includes an envelope controller, a main power amplifier, and an auxiliary power amplifier. The main power amplifier and the auxiliary power amplifier both set an envelope voltage output by the envelope modulator as operating voltages, and because the operating voltages of the main power amplifier and the auxiliary power amplifier may be adjusted simultaneously, symmetry of the power amplifier is improved, and an efficiency loss occurring probability is low, thereby enhancing efficiency of the power amplifier.Type: GrantFiled: February 5, 2018Date of Patent: March 12, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Lipeng Zhang, Zhonghua Cai, Ting Li, Kaizhan Wang
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Patent number: 10175736Abstract: There is disclosed a touch panel, a mobile terminal and a wireless input apparatus applied to the touch panel and the mobile terminal and the touch panel includes a cover unit having a touchable front surface and a rear surface opposite to the front surface, a touch sensing unit provided under the back surface to sense a preset touch signal, and magnetic field generation unit provided under edges of the touch sensing unit to generate a magnetic field.Type: GrantFiled: June 18, 2014Date of Patent: January 8, 2019Assignee: LG ELECTRONICS INC.Inventor: Younghwan Kim
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Patent number: 10164575Abstract: Disclosed is a system for monitoring the peak power of a telecommunication signal to be transmitted for RF power amplification of the telecommunication signal to be transmitted, including a digital processing device, a digital to RF converter and a dc-dc converter, wherein the output of the dc-dc converter can take a discrete voltage value from N discrete voltage values, N being an integer equal to or greater than 2, the digital processing device including a processing path including an envelope tracking control logic adapted to create a continuous envelope tracking control signal. The processing path further includes logic for driving the dc-dc converter including a peak value calculating device and a power supply voltage selecting device.Type: GrantFiled: January 11, 2016Date of Patent: December 25, 2018Assignee: WUPATECInventors: Emmanuel Gatard, Pierre Lachaud
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Patent number: 10148229Abstract: There is disclosed a method of controlling an envelope tracking amplification stage comprising an envelope modulated power supply, the method comprising: determining a shaping function to be applied to an envelope signal for controlling the envelope modulated power supply in dependence on a system linearity objective in a region of operation of the amplifier in which the output power of the amplifier is dependent upon the supply voltage; and determining a pre-distortion function to be applied to an input signal to be amplified in dependence on a further linearity objective of the system, in a region of operation of the amplifier in which the output of the amplifier is dependent upon the input power to the amplifier.Type: GrantFiled: January 16, 2013Date of Patent: December 4, 2018Assignee: SNAPTRACK, Inc.Inventor: Gerard Wimpenny
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Patent number: 10141895Abstract: Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways.Type: GrantFiled: April 13, 2017Date of Patent: November 27, 2018Assignee: pSemi CorporationInventors: Dan William Nobbe, David Halchin
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Patent number: 10141905Abstract: A method is provided for producing a volume gain applied by an amplifier to at least one audio signal according to a desired volume gain selected by a user, which includes calculating a standardized total slow sound level from at least one audio signal, calculating maximum slow volume gain and minimum slow volume gain as the quotient of the product of the desired volume gain by maximum slow gain, respectively by minimum slow gain, divided by the standardized total slow sound level, determining a first minimum out of the desired volume gain and the maximum slow volume gain, determining a second minimum out of the desired volume gain multiplied by a maximum volume gain and the minimum slow volume gain, determining as a slow volume gain the maximum of the first and second previously determined minima, and calculating the volume gain according to the slow volume gain.Type: GrantFiled: January 19, 2016Date of Patent: November 27, 2018Assignee: DEVIALETInventors: Eduardo Mendes, Julien Bergére, Pierre-Emmanuel Calmel
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Patent number: 10110173Abstract: An envelope tracking current bias circuit of a power amplifier circuit including a power amplifier includes a first current source circuit configured to generate a first bias current based on a reference voltage, a second current source circuit configured to generate a second bias current based on an envelope voltage of an input signal, and a bias current generator configured to generate a first envelope tracking bias current based on the first bias current and the second bias current, and supply the first envelope tracking bias current to the power amplifier circuit to reduce amplitude modulation-phase modulation (AM-PM) distortion of the power amplifier circuit.Type: GrantFiled: April 5, 2017Date of Patent: October 23, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Byeong Hak Jo, Jong Ok Ha, Jeong Hoon Kim, Youn Suk Kim
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Patent number: 10111278Abstract: A power amplifier includes an input for receiving an RF signal to be amplified; at least one power amplification circuit module in electrical connection with the input for amplifying the RF signal; at least one biasing circuit in electrical connection with the power amplification circuit for compensating the distortion of the RF signal so as to amplify the RF signal substantially linearly, and an output arranged to output the amplified RF signal.Type: GrantFiled: April 10, 2015Date of Patent: October 23, 2018Assignee: City University of Hong KongInventors: Kim Fung Tsang, Yi Shen
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Patent number: 10008984Abstract: An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.Type: GrantFiled: January 30, 2017Date of Patent: June 26, 2018Assignee: Samsung Electronics Co., LtdInventors: Siddharth Seth, Sang Won Son, Dae Hyun Kwon, Sriramkumar Venugopalan, Thomas Cho
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Patent number: 9998200Abstract: Various embodiments provide for systems, methods, or apparatuses that provide a fronthaul architecture that facilitates high fidelity and low latency communication between a radio processing unit, such as a baseband unit (BBU), which may be located a central office (CO), and a remote transceiver, which may comprise a remote radio head (RRH) or a remote radio unit (RRU), which may be located at remote cell site.Type: GrantFiled: June 20, 2014Date of Patent: June 12, 2018Assignee: Aviat U.S., Inc.Inventor: Paul A. Kennard
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Patent number: 9973355Abstract: The present invention is directed to communication systems and methods thereof. More specifically, an embodiment of the present invention includes a buffer that is coupled to a reference terminal. A shift register stores decision levels for post-cursor positions. A plurality of switches converts the decision levels to equalization currents during an equalization process. The equalization currents are converted to equalization voltage terms by one or more load resistors. The buffer is provided between the reference terminal and the one or more load resistors. There are other embodiments as well.Type: GrantFiled: April 20, 2016Date of Patent: May 15, 2018Assignee: INPHI CORPORATIONInventor: Dragos Cartina
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Patent number: 9966920Abstract: A power amplifier circuit includes a power supply module and serially connected multi-stages of amplifier circuit. The multi-stages of amplifier circuit, coupled to the power supply module for amplifying an radio frequency (RF) input signal as an RF output signal, which include a driver stage of circuit and a gain stage of circuit. The driver stage of circuit receives and amplifies the RF input signal. The driver stage of circuit is powered by a first supply voltage received from the power supply module. The gain stage of circuit amplifies the signal received from previous stage of amplifier circuit and outputs the RF output signal. The gain stage of circuit is powered by a second supply voltage received from the power supply module. When the power amplifier circuit is operated in a back-off region, the first supply voltage is lower than the second supply voltage.Type: GrantFiled: January 24, 2017Date of Patent: May 8, 2018Assignee: AIROHA TECHNOLOGY CORP.Inventor: Chun-Hsiung Chang
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Patent number: 9876657Abstract: An integrated circuit (IC) includes a downlink unit including an input to receive a first plurality of frequency domain (FD) symbols associated with data symbols for a plurality of users, and an iteration unit to perform a plurality of iterations based on adjustment values. Each iteration includes generating a second plurality of FD symbols by performing a precoding process based on the first plurality of FD symbols, generating a third plurality of time domain (TD) symbols by performing a first modulation process based on the second plurality of FD symbols, generating a fourth plurality of TD symbols by performing a dynamic range reduction process based on absolute values of the third plurality of TD symbols, and updating the adjustment values. The downlink unit further includes a decision unit configured to generate transmit TD symbols for transmission through a channel to the plurality of users.Type: GrantFiled: March 6, 2017Date of Patent: January 23, 2018Assignee: XILINX, INC.Inventors: Charles Jeon, Christoph E. Studer, Michael Wu, Christopher H. Dick
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Patent number: 9813085Abstract: A system and method for calibrating digital pre-distortion in a wireless device. A pre-distortion circuit may output a first training signal while a power amplifier of the wireless device is on, to generate a first feedback signal. The first feedback signal may be fed back to the pre-distortion circuit via a receive path of the wireless device. The pre-distortion circuit may output a second training signal while the power amplifier is off, to generate a second feedback signal. The second feedback signal may be fed back to the pre-distortion circuit via the receive path. The pre-distortion circuit may then determine one or more pre-distortion coefficients based on the first and second feedback signals.Type: GrantFiled: September 23, 2016Date of Patent: November 7, 2017Assignee: QUALCOMM IncorporatedInventors: Paul Brandon Butler, James Gardner, Niranjan Talwalkar, Burcin Baytekin
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Patent number: 9806675Abstract: Various embodiments of the present invention relate to a power amplification device and method, wherein the power amplification device can comprise: a power amplifier; a switch mode converter for controlling a bias of the power amplifier; a comparator for providing a switching signal to the switch mode converter according to an envelope signal; and a control unit for determining whether a switching frequency of the switch mode converter is within a specific band and applying an offset to the switching frequency so as to deviate from the specific band if the switching frequency of the switch mode converter is within the specific band. Various other embodiments can be carried out.Type: GrantFiled: September 29, 2014Date of Patent: October 31, 2017Assignee: Samsung Electronics Co., Ltd.Inventor: Dong-Il Yang
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Patent number: 9800281Abstract: A signal processor for a radio frequency (RF) receiver includes a signal processing path having first and second programmable gain amplifiers and first and second offset correction circuits. The first offset correction circuit receives a first digital offset correction word and corrects a first offset of the first programmable gain amplifier by adding a first value corresponding to the first digital offset correction word to an input of the first programmable gain amplifier. The second offset correction circuit receives a second digital offset correction word and corrects a second offset of the second programmable gain amplifier by adding a first value corresponding to the second digital offset correction word to an input of the second programmable gain amplifier. A controller measures offsets of the first and second programmable gain amplifiers during a calibration, and provides the first and second offset correction words in response to the offsets.Type: GrantFiled: March 28, 2017Date of Patent: October 24, 2017Assignee: Silicon Laboratories Inc.Inventors: Abdulkerim L. Coban, Alessandro Piovaccari, Ramin K. Poorfard, James T. Kao
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Patent number: 9791902Abstract: A first operating condition and a second operating condition at a power supply unit (PSU) are determined at a first time. A power conversion efficiency of the PSU is determined at the first time. A first entry at a power conversion efficiency profile is generated, the first entry associating the first power conversion efficiency with the first operating condition and the second operating condition.Type: GrantFiled: May 19, 2015Date of Patent: October 17, 2017Assignee: DELL PRODUCTS, LPInventors: Dinesh K. Ragupathi, Ashish Munjal, Thomas F. Archer, Binay A. Kuruvila
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Patent number: 9748901Abstract: A power amplifying apparatus includes a radio frequency (RF) power amplifier, a supply modulating unit, a phase shifting unit, and an envelope shaping unit. The RF power amplifier receives an input RF signal and outputs an amplified RF signal. The supply modulating unit provides the RF power amplifier with a supply voltage which varies with an original envelope of the input RF signal. The phase shifting unit receives a control signal and shifts a phase of the input RF signal to be inputted to the RF power amplifier by a shift amount which varies with the control signal. The envelope shaping unit receives the original envelope and provides the phase shifting unit with the control signal which varies with the original envelope.Type: GrantFiled: June 16, 2015Date of Patent: August 29, 2017Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Jung-Rin Woo, Sung-Hwan Park, Jung-Hyun Kim, Young Kwon
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Patent number: 9729110Abstract: Exemplary embodiments are related to method and devices for calibration a radio-frequency (RF) transceiver. A method may include calibrating an RF device by calculating input voltage values and bias voltage values of a power amplifier for each desired output voltage value of the power amplifier to generate a desired compression point. The method may also include applying digital pre-distortion (DPD) values to the input voltage of the power amplifier, and measuring a value of the output voltage after applying the DPD values.Type: GrantFiled: March 11, 2014Date of Patent: August 8, 2017Assignee: QUALCOMM IncorporatedInventor: Jifeng Geng
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Patent number: 9729108Abstract: Provided is an apparatus for adjusting an envelope signal delay in an envelope-tracking power amplifier. The apparatus includes: an envelope signal providing unit configured to provide an envelope signal; a variable negative group delay unit configured to adjust a group delay of the envelope signal received from the envelope signal providing unit and output the adjusted envelope signal; an envelope modulator configured to modulate the envelope signal outputted from the variable negative group delay unit; a group delay difference detecting unit configured to detect a group delay difference between the envelope signal which is outputted from the envelope signal providing unit and the envelope signal which is outputted from the envelope modulator; and a control signal generating unit configured to generate a control signal to control a group delay value of the variable negative group delay unit according to the group delay difference.Type: GrantFiled: January 15, 2016Date of Patent: August 8, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Seung Hyun Jang, Bong Hyuk Park, Nam Sik Ryu, Dong Seung Kwon
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Patent number: 9712122Abstract: A distortion compensation apparatus that compensates for distortion of an amplifier is provided. The distortion compensation apparatus includes: a distortion compensation processing section that performs a predistortion process for a signal provided to the amplifier, based on an amplifier model of the amplifier, and outputs a compensated signal; an estimation section that estimates the amplifier model; and a filter. The estimation section estimates the amplifier model, based on the compensated signal and a monitor signal obtained by monitoring an output of the amplifier. The monitor band of the monitor signal provided to the estimation section is narrower than a frequency band of the compensated signal. The filter is provided so as to eliminate an influence of a signal component outside the monitor band among signal components of the compensated signal, on the estimation of the amplifier model by the estimation section.Type: GrantFiled: August 22, 2013Date of Patent: July 18, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Masahiko Onishi
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Patent number: 9667204Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.Type: GrantFiled: May 3, 2016Date of Patent: May 30, 2017Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Youngoo Yang, Jong Seok Bae, Sung Jae Oh, Soo Ho Cho
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Patent number: 9668208Abstract: Embodiments related to the setting of an operating point of an amplifier are described and depicted.Type: GrantFiled: August 5, 2014Date of Patent: May 30, 2017Assignee: Intel Deutschland GmbHInventors: Andrea Camuffo, Chi-Tao Goe, Jan-Erik Mueller, Nicholas Shute
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Patent number: 9665510Abstract: A system for storing pre-distorted output samples in a memory includes a sample counter, a programming interface module, and a comparator. The sample counter counts the pre-distorted output samples, generates a dynamic count value, receives a capture counter status signal, and generates a first count value. The programming interface module receives and outputs the first count value, an offset value, and a capture control signal, and generates a first interrupt signal. The comparator receives the first count value, the offset value, the dynamic count value, and the capture control signal, generates a final value, compares the final value with the dynamic count value, and generates a trigger signal when the final value equals the dynamic count value based on the capture control signal. The trigger signal initiates the storing of the pre-distorted output samples in the memory.Type: GrantFiled: December 22, 2014Date of Patent: May 30, 2017Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Arvind Kaushik, Peter Z. Rashev, Amrit P. Singh, Akshat Mittal