Abstract: A wireless communication device output amplifier configured to reduce or eliminate out of band oscillations from voltage standing waves generated by antenna impedance mismatch reflection. The amplifier is configured with an input, output, and biasing node. The biasing node is configured to receive a biasing signal from a biasing amplifier. The biasing amplifier draws current from the biasing node while providing the biasing voltage to the output amplifier. To reduce or eliminate out of band voltage standing waves from antenna reflections, a frequency dependant network is provided as a feedback loop to selectively provide feedback to the output amplifier to reduce or eliminate unwanted out of band oscillations, such as voltage standing waves. The frequency dependant network may comprise one or more resistors, inductors, and capacitors which are of small size and may be integrated.

Abstract: The systems and methods described herein provide for composite transistor circuit having a bipolar transistor and a compensation unit. The compensation unit can be configured to stabilize the DC biasing point of the bipolar transistor. The compensation unit can compensate for the self-heating effect in the bipolar transistor and/or improve the linear performance of the bipolar transistor. The compensation unit can include a nonlinear resistor in series with a switch and can be configured to increase the base current into the bipolar transistor as the output voltage of the circuit increases.

Abstract: A sensing circuit capable of detecting very low current pulses of the order of 10's and 100's of micro amps. The sensing circuit comprises a common gate amplification stage capable of amplifying a sensed current, a comparison stage having as an input the amplified sensed current and a feedback stage capable of returning an output of the comparison stage to the common gate amplification stage.

Abstract: The objective of the invention is to automatically and dynamically change the slew rate corresponding to the change rate and amplitude of the input signal. In this operational amplifier, when voltage (Vin) of the input signal is high, or when it changes drastically, at the time the voltage difference between the input signal and the output signal (Vout?Vin) exceeds prescribed value (VF), in constant current circuit (12), switch controller (22) turns ON switch (20). As a result, operation current amplifier (16) operates, and current (IE) of constant current source (14) is amplified with a positive feedback loop. By means of positive feedback amplification of the current (IE), slew rate (SR) rises drastically from the reference value that has been adopted, and output voltage (Vout) immediately follows input voltage (Vin).

Abstract: According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.

Abstract: A wireless communication device output amplifier configured to reduce or eliminate out of band oscillations from voltage standing waves generated by antenna impedance mismatch reflection. The amplifier is configured with an input, output, and biasing node. The biasing node is configured to receive a biasing signal from a biasing amplifier. The biasing amplifier draws current from the biasing node while providing the biasing voltage to the output amplifier. To reduce or eliminate out of band voltage standing waves from antenna reflections, a frequency dependant network is provided as a feedback loop to selectively provide feedback to the output amplifier to reduce or eliminate unwanted out of band oscillations, such as voltage standing waves. The frequency dependant network may comprise one or more resistors, inductors, and capacitors which are of small size and may be integrated.

Abstract: The invention provides an apparatus and a method for adjusting an output impedance of an output stage. The apparatus comprises a detector for outputting a direct current potential corresponding to the impedance of the output stage circuit. It also comprises a controlling unit for outputting a control signal according to the direct current potential and a reference potential, and for adjusting the output impedance of the output stage according to the control signal.

Abstract: A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS transistor. The current mirror generates the drain current according to an adding current. The current feedback circuit is used for stabilizing the drain current to a constant value substantially. The current feedback circuit includes a passive component and an operational amplifier. The passive component has a first end and a second end, which has an error voltage when a corresponding current flows through the passive component. The magnitude of the corresponding current changes with the magnitude of the drain current. The operational amplifier outputs a reference signal to adjust the adding current according to the error voltage and a reference voltage.

Abstract: A low-noise amplifier with a first amplification circuit that includes a control terminal, a first terminal, and a second terminal that communicates with a first reference voltage. An impedance load that communicates with the first terminal and a feedback circuit that comprises a current source that communicates with a second reference voltage. A comparator circuit that includes a first input, a second input and an output that communicates with the control terminal. A first impedance that communicates with the current source and the first input and that generates a predetermined reference voltage based on a reference current generated by the current source and a second impedance that communicates with the second input and the impedance load wherein the feedback circuit compares a voltage, based on an output current associated with the first terminal, with the reference voltage to generate a bias signal that is applied to the control terminal.

Abstract: A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.

Abstract: An amplifier bias system. The amplifier bias system includes a battery voltage supply coupled with an amplifier transistor to be biased; an output node coupled with a gate of the amplifier transistor; and a current source coupled with the battery voltage supply, wherein the current source provides a current to a node in response to the battery voltage supply. The amplifier bias system further includes a first transistor coupled between the battery voltage supply and the output node, the first transistor having a gate coupled with the first node; a second transistor coupled with the first node, the second transistor having a gate coupled with the output node; and a current load coupled with the output node.

Abstract: An apparatus comprising an amplifier comprising at least one amplifier transistor, a threshold detection network and a bypass capacitor. The amplifier may be configured to generate an output signal at a collector in response to an input signal received at a base. The threshold detection network may be coupled between the collector and the base of the amplifier transistor. The threshold detection network may include a bias transistor having a collector coupled to the collector of the amplifier transistor and an emitter coupled to the base of the amplifier transistor. The threshold detection circuit may be configured to (i) sense a feedback current and (ii) provide a DC signal to the base of the amplifier transistor for dynamically sourcing bias current to the amplifier. The bypass capacitor may be coupled to the base of the bias transistor.

Abstract: An emitter of a transistor (1) for high frequency amplification and a cathode of a diode (5) for generating reference voltage are grounded via an inductance (20). Anode electric potential of the diode (5) decreases with increase in output power of the transistor (1) and thus the operation of the transistor (1) is limited. Since the diode is an on linear element, it is possible to quickly limit the operation of the transistor (1) in response to an increase in output current, thereby preventing a breakdown caused by overcurrent.

Abstract: A low-noise amplifier includes a first amplification device. The first amplification device includes a control terminal, a first terminal, and a second terminal. The low-noise amplifier also includes a feedback circuit in communication with the control terminal and the first terminal. The feedback circuit compares a voltage, corresponding to an output current associated with the first terminal, with a predetermined reference voltage to generate a bias signal applied to the control terminal for biasing the low-noise amplifier.

Abstract: The invention concerns a method for maintaining an optimal operating point of an LDMOS device stable, said LDMOS device producing an output signal including an error signal component. The method comprises separating said error signal component from the output signal of said LDMOS device and using said error signal component for controlling the gate-to-source bias voltage, or Vgs, of said LDMOS device to maintain the optimal operating point of the LDMOS device stable.

Abstract: A read amplifier system for connection through interconnects to a magnetoresistive (MR) head includes two input transistors, two bias transistors connected to the two input transistors by common source connections, a bias voltage control circuit connected to base terminals of the two bias transistors, a common mode voltage control circuit connected between first and base terminals of the input transistors to provide feedback from the first terminals to the base terminals, and a compensating circuit connected between the outputs of the amplifier system and the base terminals of the input transistors for providing a feedback from the outputs to the base terminals. The two base terminals of the input transistors are respectively connected to the interconnects of the MR head. The bias voltage control circuit applies a bias voltage to base terminals of the two bias transistors, and through the common sources to the base terminals of the input transistors, and thereby across the MR head.

Abstract: A method for stabilizing the performance variation of a primary radio frequency (RF) device is provided that includes providing a secondary RF device. An output signal is generated with the secondary RF device. The output signal is provided to a feedback circuit. A feedback signal is generated based on the output signal with the feedback circuit. The feedback signal is provided to the secondary RF device. The output signal is generated based on the feedback signal. The feedback signal is provided to the primary RF device.

Abstract: An apparatus and method for amplifying a radiofrequency (RF) signal. The apparatus comprises a control circuit including a first transistor, a second transistor, and a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor, such that a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor. Additional elements may be coupled to the control circuit to improve the performance thereof, including a feedback stabilization circuit, a diode stack circuit, a bypass capacitor and an additional resistor.

Abstract: An apparatus and method for compensating for an analog quadrature modulation (AQM) error in a linearization apparatus for AQM-modulating a digital predistorted signal and outputting the AQM-modulated signal through a high-power amplifier. In the apparatus and method, a gain/phase error estimator predicts a gain/phase imbalance error caused by AQM on the predistorted signal. A Direct Current (DC) offset estimator predicts a DC offset for a feedback signal from the high-power amplifier. An error compensator compensates for the digital predistorted signal for a DC offset signal output from the DC offset estimator, and then compensates for a gain/phase error output from the gain/phase error estimator.

Abstract: An output circuit is described, which includes a gain stage, n and p drives, coupled to the gain stage, a mean current generator, coupled to the drives, a reference current generator, coupled to the mean current generator, and feedback circuitry, coupled between the gain stage and the mean current generator. In this circuitry the feedback, provided by the feedback circuitry to the mean current generator, is a current mode feedback. The mean current generator generates the harmonic mean of currents, provided through current nodes. The described output circuit can be operated by providing currents at the current nodes of the mean current generator, generating a mean of provided currents with the mean current generator, and providing a current mode feedback by the feedback circuitry to the mean current generator. The feedback circuitry computes the difference between the generated mean current and a reference current.

Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.

Abstract: An apparatus and method for amplifying a radiofrequency (RF) signal. The apparatus comprises a control circuit including a first transistor, a second transistor, and a ballast resistor coupled between an emitter terminal of the first transistor and a base terminal of the second transistor, such that a control voltage applied to a base terminal of the first transistor controls the amplification of a signal applied to the base terminal of the second transistor. Additional elements may be coupled to the control circuit to improve the performance thereof, including a feedback stabilization circuit, a diode stack circuit, a bypass capacitor and an additional resistor.

Abstract: A biasing device includes closed-loop transconductance slaving circuit, able to slave the time average of the base/emitter or gate/source voltage of the amplifier transistor (Q1) to a reference voltage corresponding to a desired quiescent current for the transistor. Moreover, viewed from the base or gate of the amplifier transistor (Q1), the impedance of the base/emitter or gate/source circuit is small at low frequency, and large with respect to the impedance of the radio frequency source within the radio frequency range of the signal. The device can be incorporated in a mobile terminal, such as a cellular mobile phone.

Abstract: An active bias compensation circuit for use with a radio frequency (“RF”) power amplifier, the RF amplifier having an input (112), an output (116), a first transistor (110), and a plurality of operating performance characteristics responsive to a quiescent operating point established by a bias current in the RF amplifier. The active bias compensation circuit includes: a second transistor (120) operatively coupled to the RF amplifier and having a first, second and third terminal and further configured to have essentially the same electrical and thermal characteristics as the first transistor; and a first circuit (130) coupled between the first and second terminal of the second transistor for causing a desired quiescent operating current to be set and maintained in said RF power amplifier, independent of factors such as temperature and process variation.

Abstract: A DC offset compensation circuit, and method thereof are capable of reducing the settling time of an output signal through fast compensation of a DC offset of the output signal although a DC voltage of an input signal varies in a closed loop operational amplifier. The DC offset compensation circuit of a closed loop operational amplifier includes a first closed loop operational amplifier and a second closed loop operational amplifier. The first closed loop operational amplifier amplifies an input signal based on a compensation voltage. The second closed loop operational amplifier amplifies a signal output from the first closed loop operational amplifier based on a reference voltage to generate a final output signal.

Abstract: An improved power supply unit includes a DC power source having a positive terminal and a negative terminal, and a voltage regulating circuit that includes a plurality of elements coupled in series between the positive and negative terminals of the DC power source to regulate the power supply signals supplied thereto to effectively cancel ripple and noise in such power supply signals. In one embodiment, the series-coupled elements include at least one resistor and a transconductive element having a characteristic transconductance value of T. The at least one resistor provides a resistance substantially equal to 1/T. The transconductive element and the one resistor cooperate to suppress spurious voltage level variations produced by the DC power source. The transconductive element may be realized by a thermionic triode, field effect transistor or other suitable device.

Abstract: A circuit arrangement comprising an input amplifier stage (31) with two inputs (36, 37) and an output (34) being connectable to an input (35) of an output amplifier stage (32). The circuit furthermore comprises a comparator (33) with a first input (41), a second input (42) and a comparator output (44), a feedback capacitor (43) connected to an offset tuning input (45) of the input amplifier stage (31), and a plurality of switches (S1, S2) that are controllable by switching signals (V1, V2) to allow the circuit to be switched from a first phase to a second phase. During the first phase (1), the output (34) and the input (35) are separated by a first one of the switches (S2) and the two inputs (36, 37) are connected via a second one of the switches (S1).

Abstract: A DC feedback control circuit for compensating for a DC voltage level shift in a transimpedance amplifier circuit having a transistor as a high speed switching device. The DC feedback control circuit includes a filter for determining a DC voltage level at an output of the amplifier circuit and a differential pair of transistors for comparing the DC voltage level with a reference voltage. A pair of current mirrors mirror a current dependent on the comparison of the DC voltage level with the reference voltage and apply the mirrored current to an emitter of the transistor so as to maintain a substantially constant bias current through the switching transistor.

Abstract: The high frequency power amplifier comprises a detector which detects a collector output power (or base input power) of an amplifying transistor, and a DC/DC converter which changes a collector voltage of the amplifying transistor in proportion to the detected power. Thus, a DC power consumed by the amplifying transistor is controlled. A resistor for a base bias of the amplifying transistor is connected to the DC/DC converter, thereby interlocking the base bias control with the control of the DC/DC converter.

Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains the mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. In a preferred embodiment, the biased transistor is concurrently in both a Darlington and the current mirror configuration. Moreover, a feedback transistor in the feedback circuit is also concurrently in the Darlington configuration, thus providing an efficient biasing arrangement for an amplifier block based on the Darlington arrangement.

Abstract: A differential amplifier with an emitter follower input stage includes an RC network which provides negative common mode feedback to stabilize the emitter follower stage. The feedback network provides negative common mode feedback from collector to base of the emitter follower transistors.

Abstract: A bias controller includes a bias detector, a reference comparator, a memory component, and a reference voltage. The bias detector is operable to detect a bias current associated with a device controlled by the bias controller and produce a proportional sensed bias voltage. The reference comparator is operable to compare the bias voltage to a reference voltage and produce a first control signal operable to adjust a bias output of the bias controller. The memory component stores a plurality of reference voltage settings, one for each mode of operation of the device, the memory component including a mode setting input and a reference voltage output signal. The reference voltage adjustment circuit adjusts the reference voltage applied to the reference comparator in accordance with the mode of the device as controlled by the reference voltage output signal.

Abstract: Disclosed are systems and methods for automatic biasing of LDMOS devices at turn-on. The invention provides bias point setting with compensation for hot carrier effects each time the LDMOS device is turned on and also provides temperature compensation during operation of the device. The systems and methods of the invention are scalable such that a plurality of LDMOS devices may simultaneously have their bias points set, and temperature compensation provided.

Abstract: An apparatus and method for biasing the gain stage of an amplifier which may result in high signal gain, stable quiescent bias, and which controls the current in the quiescent state. A bias reference signal is coupled to the base of a gain stage transistor, and a bias feedback signal is coupled to adjust the bias reference signal based on the bias current of the gain stage transistor. The bias reference signal can be coupled to an input signal that is input to the base of the gain stage transistor. A compensation element can be coupled to the base of the gain stage transistor to control the time response of the gain stage transistor.

Abstract: Embodiments of the present invention provide methods and systems for current sensing for an amplifier using an embedded cell. The embedded cell is a transistor cell from a plurality of transistor cells which is coupled to the other transistor cells so as to block DC current flow between the embedded cell and the other cells and allow AC current to flow between the embedded cell and the other cells. Power may be supplied to the embedded cell through a current sensing circuit, such as a resistor, which senses the DC current drawn by the embedded cell which reflects to the total DC current drawn by the by amplifier. Systems for bias control and for amplitude modulation utilizing embedded cells are also provided.

Abstract: A reference stage is provided in order to compensate for manufacturing tolerances, for example relating to the threshold voltage of a transistor. This reference stage has a transistor which is a physical equivalent of the transistor to be trimmed in a radio-frequency amplifier stage. In particular, this reference transistor has the same electrical direct current characteristics as the amplifier transistor. A reference voltage can be tapped off across a resistor on the reference stage and can be supplied to a control amplifier which uses this reference voltage to set the operating point of the radio-frequency amplifier transistor such that manufacturing tolerances are compensated for. Such radio-frequency power amplifiers are used, for example, as transmit amplifiers in mobile radios.

Abstract: An amplifier, for use in regulator circuits and other applications, having dynamic input stage biasing includes an input stage operatively coupled to an input of the amplifier. A controlled current source coupled to the input stage is responsive to a control signal for at least partially controlling an input bias current generated by the controlled current source. The amplifier further includes a sense circuit operatively connected in a feedback arrangement between an output of the amplifier and the controlled current source. The sense circuit measures an output load current from the amplifier and generates the control signal in response thereto, whereby the input bias current is a function of the output load current of the amplifier. In this manner, parasitic poles associated with the amplifier are pushed out in frequency so as to provide superior amplifier stability while dissipating low quiescent current, particularly at low output load current levels.

Abstract: The invention concerns a method for maintaining an optimal operating point of an LDMOS device (32) stable, said LDMOS device (32) producing an output signal including an error signal component (err). The method comprises separating said error signal component (err) from the output signal of said LDMOS device (32) and using said error signal component (err) for controlling the gate-to-source bias voltage, or Vgs, of said LDMOS device (32) to maintain the optimal operating point of said LDMOS device (32) stable.

Abstract: A DC feedback control circuit for compensating for a DC voltage level shift in a transimpedance amplifier circuit (12) having a transistor (20) as a high speed switching device. The DC feedback control circuit includes a filter (30) for determining a DC voltage level at an output of the amplifier circuit (12) and a differential pair (36) of transistors for comparing the DC voltage level with a reference voltage (41). A pair of current mirrors (44 and 50) mirror a current dependent on the comparison of the DC voltage level with the reference voltage and apply the mirrored current to an emitter of the transistor (20) so as to maintain a substantially constant bias current through the switching transistor (20).

Abstract: An output stage for a power amplifier comprises an amplifying device T1 connected in series with a variable current sink T2 between positive and negative supply rails +/−V. A loudspeaker S is connected between the zero volt rail OV and a point intermediate the amplifying device T1 and the variable current sink T2. A feedback loop A1,A2 is provided for increasing the amount of current required by the variable current sink T2 as the amount of current delivered to the loudspeaker s by the amplifying device T1 falls. Thus, in one half cycle of the input signal Vin, the loudspeaker S is provided with current through the amplifying device T1 and in the other half cycle the variable current sink T2 draws current through the loudspeaker S. When no input is applied, the variable current sink T2 draws a low current and thus the output stage has an improved efficiency compared with conventional class A amplifiers.

Abstract: A radio frequency device and mobile terminal having this device, includes a power amplifier (PA) for radio frequency signals (IRF, ORF) and a stabilizer (STB) for controlling power variations of the radio frequency output signal (ORF) as a function of variations of a reference voltage (VCON). The stabilizer is equal to a nominal resistance (RN) having a predetermined value as a function of an isopower curve (H, DH) of the power amplifier and generates for the power amplifier a supply voltage (VPA) in dependence on the reference voltage (VCON) and the nominal resistance (RN), so that the power consumption (PPA) and output power (POUT) are independent of the real internal resistance (RPA) of the power amplifier.

Abstract: An electrical circuit arrangement (19), comprising an output stage (4) having an output terminal (2) for delivering an output current, and at least one feedback circuit (15, 16) operatively connected to the output terminal (2). A current generator circuit (20), arranged for generating a current which is a fraction of the output current, connects by a resistive element (21) to the output terminal (2), thereby providing improved high frequency feedback stability.

Abstract: A slew rate controlled power amplifier (112) for use in a dc motor driver circuit is presented. The amplifier (112) has a power transistor (72) connected to control a drive current (IMOTOR) in a phase of the dc motor with which it is associated and to develop an output voltage (VOUT) on the phase in accordance with the drive current (IMOTOR). A mirror transistor (74) is connected to establish the ratioed magnitude of the current in the power transistor (72), and a feedback circuit (90) is connected to controllably feed back the output voltage (VOUT) to the mirror transistor (74) to control the drive current (IMOTOR). A commutatively operated slew-rate control circuit (57,58) is connected to the feedback circuit (90) to control the drive current (IMOTOR). By coupling the feedback from the phase voltage, VOUT, into the current loop the loop stability is greatly improved and oscillations on the output phase voltage are reduced or eliminated.

Abstract: A power transistor with an integrated linearizer is provided in a package having only standard transistor terminals. The linearizer arranged between the base and collector of the transistor uses a Schottky diode as a nonlinear device that compensates for gain and phase deviations of the transistor. A collector voltage source that supplies power to the transistor provides bias to the diode. A DC blocking capacitor isolates an RF path between the input and output of the transistor from a diode biasing circuit to allow the collector voltage source to provide bias to the linearizer and the transistor separately. A tuning inductor is coupled in series with the DC blocking capacitor to offset the undesired phase rotation introduced by the capacitor. A DC biasing resistor is coupled between the diode and the collector of the transistor to set bias current supplied to the diode and isolate the collector voltage source from the RF path and ground.

Abstract: An amplifier circuit has a first transistor and a second transistor of a first conductivity type, which are operated in a cascode circuit together with a first resistor. In addition, the amplifier circuit includes a first capacitor, which precedes the control input of the first transistor. A third transistor of a second conductivity type is provided, whose control input is connected to one end of the controlled path of the second transistor and whose controlled path is connected on one end to a second supply potential. A fourth transistor of the second conductivity type is provided, whose control input is connected to the other end of the controlled path of the third transistor and whose controlled path is connected on one end to the control input of the third transistor. A second resistor is connected between the control input of the fourth transistor and one terminal of the first capacitor.

Abstract: An RF power amplifier has an RF driver stage that also provides a temperature independent reference current to the RF output power amplifier. A diode reference serves as both a DC current reference and as the first RF amplifier stage. Less DC power is consumed since no circuitry is used exclusively for establishing a DC reference.

Abstract: A MESFET of a GaAs semiconductor device having a p-pocket LDD structure is used for a high-frequency power amplifier of a mobile communication device, in order to decrease current consumption and to increase the continuous operating time of a battery. The high-frequency power amplifier is provided with a gate-bias adjusting feedback element between the drain and gate of the MESFET. Thus, even if there is a great difference between the filled and terminated potentials of the discharge voltage of the battery for supplying electric power to the amplifier, electric power can be supplied near the terminated potential for a long time, so that the mobile communication device can be continuously used for a long time.

Abstract: An amplifier circuit (14') for canceling variations in an amplifier feedback signal includes compensation circuitry (50) defining a replica of the feedback current therethrough. The replicated feedback current is drawn from a circuit node (N1) which directs the feedback signal to a differential pair (Q1, Q2) of the amplifier circuit 14', whereby any biasing effects on the differential pair (Q1, Q2) due to changes in the feedback signal resulting from changes in a gate drive output voltage (V.sub.GD) of the amplifier circuit (14') are eliminated. Accordingly, the gate drive output voltage (V.sub.GD) may be used to control an ignition coil (L1) drive transistor (16) whereby any changes in gate drive voltage (V.sub.GD) will not cause the coil current (I.sub.L) to deviate from its target coil current limit value.

Abstract: A differential amplifier (24) includes a pair of transistors (Q2 and Q9); a differential amplifier 25 includes a pair of transistors (Q3 and Q6). A difference in output currents at the differential amplifier (24) is detected by differential amplifier (25). Then, transistors (Q3 and Q6) in differential amplifier (25) supply currents flowing therein into transistors (Q4 and Q5), whose bases are connected to each other via a capacitor (26). With this arrangement, a difference in DC components between a pair of differential currents flowing in the differential amplifier (25) is obtained at both terminals of the capacitor (26). The obtained voltages at the both terminals of the capacitor (26) are fed back to the input of the differential amplifier (24) via transistors (Q1 and Q8), so that offsets at inputs of the differential amplifier (24) are corrected.

Abstract: A method and apparatus for changing the open-loop frequency response of an amplifier in a line driver when the load to the line driver is removed. The load is detected by measuring the current to the load. When the current falls below a predetermined amount, the load is assumed to be disconnected and the open-loop frequency response of the amplifier is changed to shift a dominant pole of the line driver to a sufficiently low frequency to ensure stability of the line driver.