Including D.c. Feedback Bias Control For Stabilization Patents (Class 330/290)
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Patent number: 6091302Abstract: A biasing and monitoring system for use with a circuit. The system comprises a biasing device, which is coupled to the circuit and which biases a circuit variable; and a monitoring device, which monitors a first indicator variable, and which comprises means for communicating information about the first indicator variable; and a controlling device. The controlling device controls the biasing device, receives information about the first indicator variable, is coupled to the biasing device and to the monitoring device, and comprises means for determining a desired value for the circuit variable.The system can be implemented in an amplifier system comprising a field effect transistor ("FET"). The system biases the gate voltage of the FET so as to minimize the intermodulation products for any given value of temperature. The system uses a look-up table to determine the proper biasing voltage, and desired source current, for any given temperature.Type: GrantFiled: March 23, 1998Date of Patent: July 18, 2000Assignee: AmerAmp, LLCInventor: Augusto Arevalo
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Patent number: 6052029Abstract: A capacitor is connected between the gate of an FET and an input node, and a resistor is connected between the input node and a ground terminal, thereby preventing the FET from oscillating in a low-frequency domain. A capacitor is connected between the drain of the FET and a ground terminal, or a line and a capacitor are connected in series between the drain of the FET and a ground terminal, thereby preventing the FET from oscillating in a high-frequency domain or at a specific frequency in the high-frequency domain.Type: GrantFiled: June 23, 1998Date of Patent: April 18, 2000Assignee: Sanyo Electric Co., Ltd.Inventors: Hisanori Uda, Masao Nishida
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Patent number: 6046642Abstract: An active bias compensation circuit (110) senses a quiescent current flowing in an amplifier (130) and adjusts the quiescent current to maintain an optimal DC biasing of the amplifier (130) over a wide range of factors, e.g., temperature variation, process variation, history of the amplifier (130), etc. The compensation circuit (110) includes two transistors (101, 102) forming a difference amplifier. A sensing voltage proportional to the quiescent current and a reference voltage are applied to the base electrodes of the two transistors (101, 102), which generates a bias signal in response to a difference between the sensing voltage and the reference voltage. The bias signal adjusts the quiescent current in the amplifier (130).Type: GrantFiled: September 8, 1998Date of Patent: April 4, 2000Assignee: Motorola, Inc.Inventors: Daniel C. Brayton, Jeffrey K. Jones, Robert S. Kaltenecker, Bill Tabano Agar, Jr.
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Patent number: 6034569Abstract: The DC level of the output of an amplifier may be dynamically adjusted depending on the operating conditions of the amplifier by comparing the output of the amplifier to a set reference value using a comparator. The output of the comparator is then fed to a state machine which adjusts the DC level of the amplifier output in an autocalibration process until the DC level of the output of the amplifier is substantially equal to the reference value. An undervoltage lockout circuit detects a power supply to the amplifier and causes the calibration to be initiated only when the power supply meets certain requirements. A change in the gain setting in the amplifier is also detected for automatically initiating the calibration process.Type: GrantFiled: June 11, 1998Date of Patent: March 7, 2000Assignee: Capella Microsystems, Inc.Inventors: Ing-Jye Lan, Brian N. Kuo
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Patent number: 6023196Abstract: In low-voltage circuits, there is often insufficient voltage to use a current source to bias a transconductance amplifier stage. This is particularly true in mixers where a switching circuit must be stacked on top of the transconductance input stage. One way around this problem is to get "double-duty" out of the input differential pair, using it both for gain stage and for DC bias. This is done by AC coupling in a high-frequency input signal, while using a low-frequency, DC-coupled circuit to establish the proper bias level. One common technique is to use a simple current mirror scheme to establish the DC level. Proper biasing using this technique requires good matching of resistance. In some implementations of transconductance amplifiers, particularly those that use inductors as degeneration elements, series resistance of the inductor and interconnect resistance can cause significant errors in the bias current.Type: GrantFiled: August 3, 1998Date of Patent: February 8, 2000Assignee: Lucent Technologies Inc.Inventors: Kirk B. Ashby, Paul C. Davis, Michael D. Womac
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Patent number: 6011439Abstract: A radio frequency amplifier includes a first amplifier stage having a first transistor, and a second amplifier stage having a second transistor. The first transistor has a base input for receiving an input voltage, a collector output, and an emitter coupled to a common. The second transistor has a base input coupled to the first transistor collector output, a collector output, and an emitter coupled to the common by a resistance element. The second transistor emitter is DC coupled to the first transistor base. The DC coupling of the first transistor base to the second transistor emitter provides stable DC biasing of the first and second transistors based on base-emitter voltages of the first and second transistors. The radio frequency amplifier may be employed in a variety of receiver/amplifier applications, such as vehicular driver integrity check systems.Type: GrantFiled: September 2, 1997Date of Patent: January 4, 2000Assignee: Ford Global Technologies, Inc.Inventors: Vincent Colarossi, John F. Kennedy, Matt David Gerard
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Patent number: 5986840Abstract: A MR head amplifier of the present invention prevents a base potential of a transistor which supplies a current to a MR element from changing in a moment when the MR element changes from a write-state to a read-state. The MR head amplifier includes a loop amplifier that has a non-inverted input terminal connected to one end of a first transistor which supplies a current to a MR element and an inverted input terminal connected to one end of a second transistor which is supplied with a constant current through a constant current source. An output terminal of the loop amplifier is feedback to a base terminal of the first transistor via a first switch and one end of a capacitor whose other end is connected to a ground is connected to an output terminal of the first switch. The loop amplifier includes a second switch connected between the output terminal of the first switch and the base terminal of the first transistor, the second switch being closed during read-state and opened during write-state.Type: GrantFiled: October 17, 1996Date of Patent: November 16, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masashige Tada, Takehiko Umeyama
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Patent number: 5986508Abstract: An amplifier for systems affected by changes in operating temperature, in which the amplifier gain is stabilized over temperature. A temperature compensating control element is added to the previously known active bias control amplifiers, forming a second control loop. This control acts to modify the device bias current, in a way which holds the device gain constant as temperature varies. In so doing it implements, in the circuit, the mathematically derived current variation which, based on the physics of the device, maintains constant gain. The additional circuitry is very inexpensive, preserving the cost-effectiveness of the integrated circuit bias scheme for those applications requiring the additional bias control.Type: GrantFiled: August 26, 1996Date of Patent: November 16, 1999Inventor: Larry J. Nevin
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Patent number: 5986509Abstract: A transistor amplifier stage, in particular an RF amplifier stage with an npn amplifier transistor, which is coupled with its base to an alternating voltage input terminal, with its emitter to a fixed potential, and with its collector to an alternating voltage output terminal. An active operating point stabilization unit with a first and a second pnp transistor is provided between a direct voltage input terminal and the base of the npn amplifier transistor.Type: GrantFiled: July 28, 1998Date of Patent: November 16, 1999Assignee: Siemens AktiengesellschaftInventor: Gerhard Lohninger
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Patent number: 5973565Abstract: A DC bias feedback circuit stabilizes the I.sub.ds of an active MESFET with respect to process-dependent I.sub.dss variations to improve yield and reduce the effect of process variations.Type: GrantFiled: September 30, 1997Date of Patent: October 26, 1999Assignee: Samsung Electronics Co., Lt.Inventor: Ratan Bhatia
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Patent number: 5969574Abstract: An accurate, low voltage, low parts-count current sense amplifier can be employed to sense either high side or low side currents. A pair of transistors are connected in a common-base configuration and biased with equal currents, with a sense resistor connected between their respective emitter circuits. A sensed current develops a voltage across the sense resistor which unbalances the transistor currents. A third transistor is connected to provide a feedback current to detect and correct the current imbalance; the feedback current is directly proportional to the sensed current, and serves as the current sense amplifier's output. The current sense amplifier requires only three transistors, can be realized with bipolar or FET devices of either polarity, and can operate at supply voltages as low as about 1.1 volts.Type: GrantFiled: June 4, 1998Date of Patent: October 19, 1999Assignee: Analog Devices, Inc.Inventor: Bryan A. Legates
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Patent number: 5963096Abstract: An amplifier circuit can operate stably without increasing a consumed current even when a direct current amplification of a transistor is fluctuated due to tolerance in manufacturing process. The amplifier circuit has a first transistor having an emitter grounded. A second transistor has an emitter connected to a collector of said first transistor and a collector connected to a power source via a load and a first bias resistor circuit network. A third transistor constructs a current mirror circuit together with said first transistor and receives a bias current via a second bias resistor circuit network. The second bias resistor circuit network has a power source side terminal connected to a junction point between said load and said first bias resistor circuit network.Type: GrantFiled: August 27, 1997Date of Patent: October 5, 1999Assignee: NEC CorporationInventor: Koichi Hoshino
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Patent number: 5912584Abstract: In an analog signal processing device, an output signal and a reference level are compared by a comparator, and a result of comparison is filtered by a low-pass filter. By doing so, an adaptive control signal is generated so as to correspond to a background signal component having a low frequency, included in an input signal, and is negatively fed back to a signal processing unit. With this arrangement, the background signal component is compensated by the adaptive control signal having a frequency band sufficiently separate from a frequency band of a target signal component to be processed, the component being included in the input signal. As a result, a DC level of the output signal is stabilized at the reference level.Type: GrantFiled: June 6, 1997Date of Patent: June 15, 1999Assignee: Sharp Kabushiki KaishaInventor: Kunihiko Iizuka
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Patent number: 5883542Abstract: In order to stabilize the idle current and the bandwidth of a Darlington-coupled output stage, the output stage is adapted, within an interval of currents, to continuously increase its current amplification with increasing input current from a first amplification value to a second amplification value.Type: GrantFiled: October 30, 1997Date of Patent: March 16, 1999Assignee: Telefonaktiebolaget LM EricssonInventor: Hans Eriksson
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Patent number: 5854718Abstract: A DC feed-back circuit for causing a DC voltage of an external transistor in which an output bias current of a record amplifier flows to be equal to a DC voltage of an output terminal is provided so as to decrease power consumption. Thus, a plurality of record amplifying circuits can be incorporated into one IC chip. In particular, in home-use Hi-Fi VCRs, a Hi-Fi record amplifying circuit and video record amplifying circuits can be incorporated into one chip.Type: GrantFiled: April 23, 1997Date of Patent: December 29, 1998Assignee: Kabushiki Kaisha ToshibaInventor: Toshikazu Fujii
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Patent number: 5854578Abstract: An active circuit includes an amplifying transistor (102), a voltage reference (208), and an active bias circuit. The active bias circuit controls the operating point of the amplifying transistor, and includes a bias transistor (224) which is controlled by the voltage reference and the collector current of the amplifying transistor. As the temperature of the amplifying transistor changes, the tendency of the collector current to change is counter-acted by the bias transistor and the voltage reference.Type: GrantFiled: September 15, 1997Date of Patent: December 29, 1998Assignee: Motorola, Inc.Inventors: David H. Minasi, Peter J. Yeh, Roger A. Davenport, Gustavo V. Leizerovich
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Patent number: 5793255Abstract: A tuned radio frequency (RF) amplifier includes serially connected input and output common emitter amplifiers with closed ac and dc loops for maintaining high input impedance and low output impedance. The closed ac loop includes a parallel resonant circuit which is connected to the input and capacitively coupled to the output and across which a small signal appears as the difference between the input and output signals. The collector of the input amplifier transistor is maintained at a constant voltage, thereby minimizing any Miller Effect feedback capacitance, and, therefore, any RF degeneration, at the input.Type: GrantFiled: July 12, 1996Date of Patent: August 11, 1998Assignee: ACS Wireless, Inc.Inventor: Edward A. Jesser
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Patent number: 5760651Abstract: An inductorless voltage biasing circuit is provided for an AC-coupled amplifier of the type having a signal input terminal and a coupling capacitor for coupling the input terminal to a control terminal of the AC-coupled amplifier. The voltage biasing circuit includes a voltage source coupled to the control terminal, with the voltage biasing circuit including a differential-input amplifier having a noninverting input coupled to the voltage source, an inverting input, an output terminal and a differential voltage gain characteristic that decreases as a function of frequency. A resistor is coupled between the inverting input and the output terminal, and the control terminal of the AC-coupled amplifier is coupled to the inverting input of the differential-input amplifier. In this manner, a low-impedance DC-voltage biasing source is provided for an AC-coupled amplifier without using an inductor.Type: GrantFiled: July 30, 1996Date of Patent: June 2, 1998Assignee: Philips Electronics North America CorporationInventor: Stephen L. Wong
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Patent number: 5717361Abstract: In a common emitter type amplifier circuit including an input bipolar transistor having an emitter connected to a ground terminal and a collector connected to a load connected to a power supply terminal, a voltage at the collector of the bipolar transistor is fixed by a DC feedback loop, and a current control circuit is provided between the collector of the bipolar transistor and the ground terminal. Thus, a current in proportion to a voltage at the power supply terminal flows from the load to the ground terminal.Type: GrantFiled: April 26, 1996Date of Patent: February 10, 1998Assignee: NEC CorporationInventor: Akihiro Saito
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Patent number: 5705953Abstract: An amplifier having a current determiner to provide an operating current depending on a reference current, the operating current being used to operate an input amplifying device. The output of the input amplifying device is further amplified by one or more devices in the current determiner. The current determiner has a pair of matched devices used to set the output current in response to the supplied reference current.Type: GrantFiled: June 4, 1996Date of Patent: January 6, 1998Assignee: Itron, Inc.Inventor: Edward A. Jesser
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Patent number: 5701103Abstract: A DC feed-back circuit for causing a DC voltage of an external transistor in which an output bias current of a record amplifier flows to be equal to a DC voltage of an output terminal is provided so as to decrease power consumption. Thus, a plurality of record amplifying circuits can be incorporated into one IC chip. In particular, in home-use Hi-Fi VCRs, a Hi-Fi record amplifying circuit and video record amplifying circuits can be incorporated into one chip.Type: GrantFiled: July 10, 1996Date of Patent: December 23, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Toshikazu Fujii
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Patent number: 5691663Abstract: A single-ended input amplifier circuit for use within a magnetic media storage system includes circuits for concurrently biasing and amplifying signals generated by a magnetoresistive element. The amplifier receives power from a single-ended power supply. A first resistor is included for setting the gain of the amplifier and providing an output signal corresponding to the signals generated by the magnetoresistive element. A first feedback circuit generates a first biasing current provided to the magnetoresistive element. The first feedback circuit includes a first transconductance amplifier which amplifies the difference between the output signal and a reference voltage. A second feedback circuit generates a second biasing current provided to the magnetoresistive element. The second feedback circuit includes a second transconductance amplifier which amplifies the difference between the reference voltage and a voltage signal taken from a node between two resistors.Type: GrantFiled: March 25, 1996Date of Patent: November 25, 1997Assignees: Sony Corporation, Sony Electronics, Inc.Inventors: Mehrdad Nayebi, Mahmud Musbah, Norio Shoji
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Patent number: 5635874Abstract: The invention relates to an amplifier for audio signals comprising a first (A.sub.1) and a second (A.sub.2) stage having a global feedback loop (B) between the output of the second stage and the input of the first stage, the second stage having a local feedback loop (B.sub.2) between its output and its input. Each feedback loop has a comparator element (C.sub.1). The amplifier comprises a means preventing the offset voltage present at the output of the first stage (A.sub.1) from being reinjected as input by feedback (in particular via the amplifier output). The local feedback loop (B.sub.2) is such that the second stage (A.sub.2) receives feedback at least continuously. The low frequency interference signals produced in the second stage (A.sub.2) are reduced by the feedback of the second stage (A.sub.2).Type: GrantFiled: July 31, 1995Date of Patent: June 3, 1997Inventor: Gerard Perrot
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Patent number: 5625295Abstract: In a semiconductor device, a first resistor is connected between the base and collector of a dummy bipolar transisitor, a second resistor is connected between the base and emitter of the dummy bipolar transistor, and a third resistor is connected to the collector of the dummy bipolar transistor. A first pad and a second pad are connected to the base and emitter, respectively, of the dummy bipolar transistor. A third pad is connected to the third resistor. A fourth pad is connected to the collector of the dummy bipolar transistor.Type: GrantFiled: November 29, 1994Date of Patent: April 29, 1997Assignee: NEC CorporationInventor: Masakazu Kurisu
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Patent number: 5612649Abstract: An inverter is connected between the control nodes of two transistors in a current mirror system which forms a closed current feedback loop. Any difference between the bias voltages at the input and output of the inverter is reduced to zero. The self-biasing inverter amplifier may comprise the active part of an oscillator but may also be used as a level shifter or a reference circuit.Type: GrantFiled: May 6, 1996Date of Patent: March 18, 1997Assignee: VLSI Technology, Inc.Inventor: Clive R. Taylor
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Patent number: 5557239Abstract: The present invention relates to a direct current offset compensating circuit for compensating a DC offset value of an output audio signal in an audio processing system, so that the offset becomes perfectly zero balanced. This perfect zero balance is accomplished by dually detecting the offset of the output audio signal at an output terminal of the audio system. In the direct current offset compensating circuit, the DC offset of the output audio signal is detected and compensated for by using a feedback signal. The DC offset is detected and controlled with the feedback signal so that the DC balance is maintained at DC level of zero. Accordingly, tone quality of the high-grade amplifier is improved by eliminating distortion caused by the DC offset of the audio signal, where the DC offset arises from asymmetry between the positive and negative power values of the output signal.Type: GrantFiled: May 1, 1995Date of Patent: September 17, 1996Assignee: Samsung Electronics Co., Ltd.Inventor: Gibo Masao
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Patent number: 5548248Abstract: A radio frequency (RF) amplifier circuit having an input terminal, an output terminal, a power supply terminal, and a control node, includes first, second, and third transistors interconnected in a modified current source or current mirror configuration with first, second, and third resistors and a matching circuit to produce a desired bias current according to the magnitude of a control voltage coupled to the control node while producing an amplified output radio frequency signal at the output terminal from an input radio frequency signal coupled to the input terminal. Implemented with bipolar transistors, enhancement mode field effect transistors, or depletion mode field effect transistors, the circuit achieves two-stage amplification with simplified interstage coupling and therefore fewer components and less size and cost.Type: GrantFiled: July 30, 1995Date of Patent: August 20, 1996Inventor: Nan L. L. Wang
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Patent number: 5532648Abstract: A radio-frequency amplifier incorporating at least one amplifing device comprises means for applying to the device a signal related to changes in the radio frequency power handled by the device, thereby to compensate for changes in the conduction point of the device due to temperature changes within the structure of the device resulting from changes in the radio frequency power handled by the device.Type: GrantFiled: June 22, 1994Date of Patent: July 2, 1996Assignee: Harris CorporationInventor: Dennis A. Culling
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Patent number: 5508656Abstract: A signal processing circuit that includes a differential amplifier and an integrator. The differential amplifier receives at a first input a signal to process and at a second input an offset compensation signal provided by the integrator. The integrator includes a differential transconductance amplifier receiving an output voltage of the signal processing circuit at a first input and a reference voltage at a second input; a capacitor having a first terminal connected to the output of the transconductance amplifier and a second terminal connected to a fixed voltage; and a voltage follower receiving the voltage at the first terminal of the capacitor and providing the offset compensation signal.Type: GrantFiled: December 20, 1994Date of Patent: April 16, 1996Assignee: SGS-Thomson Microelectronics S.A.Inventors: Jean-Luc Jaffard, Randolph Fox
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Patent number: 5497125Abstract: A power control system for controlling the power output of a power amplifier. The power control system draws power from a variable voltage supply, such as a battery, and receives a signal input which indicates the desired power output. The power control system includes a power amplifier for amplifying an electrical signal which draws a current from the variable voltage supply. The power amplifier is of the type wherein the operating current drawn by the power amplifier is indicative of the power output. The power control system additionally includes a current sense circuit, which is operably connected between the variable voltage supply and the power amplifier and which senses the current drawn by the power amplifier and simultaneously produces an output current, which is directly correlated to the sensed current. The output current and the signal input are compared in a controller which produces a control signal for controlling the power output by the power amplifier.Type: GrantFiled: June 1, 1994Date of Patent: March 5, 1996Assignee: Vtech Communications, Ltd.Inventor: Ian D. Royds
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Patent number: 5495214Abstract: At high frequencies, a video amplifier draws a higher current and normally is biased to provide such current. However, since high frequencies are rarely encountered, the present circuit controls the operating point as a function of the frequency. More specifically, a controlled variable which controls the operating point of the amplifier stage is obtained in dependence on the frequency to which the amplifier stage is driven.Type: GrantFiled: June 16, 1994Date of Patent: February 27, 1996Assignee: Deutsche Thomson-Brandt GmbHInventor: Bernhard Malota
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Patent number: 5426395Abstract: Power amplifiers, which include a feedback element, may be protected from excessive operating power levels by adjusting the feedback element to reduce the drive signals to the power elements. This is accomplished by sensing the output power of the power amplifier to produce a sensing signal. When the sensing signal exceeds a predetermined threshold, a feedback element is adjusted to produce an increased feedback signal. The increased feedback signal is subtracted from an input signal, thus decreasing the drive signal. With the drive signal reduced, the output power is reduced proportional to the adjustment of the feedback element.Type: GrantFiled: May 3, 1993Date of Patent: June 20, 1995Assignee: Motorola, Inc.Inventor: Lawrence F. Cygan
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Patent number: 5363056Abstract: An electronic circuit provides a linear output from an amplifying device, such as a hybrid push-pull amplifier, which has inherent distortion. In a preferred embodiment, the distortion of the hybrid amplifier is compensated by nesting a pair of hybrid push-pull amplifiers within a push-pull circuit configuration. In another embodiment, the distortion of the hybrid amplifier is compensated by providing a predistorted signal equal in magnitude, but opposite in sign, to the distortion introduced by the nonlinear device. The input signal is split into two electrical paths with the primary part of the signal applied directly to the hybrid amplifier, with a time delay to compensate for delay in the secondary path. Elements within the secondary path generate both even and odd order distortion products. These are recombined with the primary signal in proper phase and amplitude, and the resulting signal is applied to the hybrid amplifier for canceling distortion in the hybrid amplifier.Type: GrantFiled: April 27, 1993Date of Patent: November 8, 1994Assignee: Ortel CorporationInventor: Henry A. Blauvelt
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Patent number: 5361042Abstract: An I/O bus interface cell includes a driver circuit having an input terminal fed by a logic signal and an output terminal to produce in response thereto a drive signal having selectable rise and fall time characteristics in accordance with a reference voltage provided to the driver. The I/O cell also includes a receiver circuit having an input terminal coupled to said output terminal of said driver with the receiver disposed to latch an unresolved, unamplified received signal prior to resolving the state of the signal. The I/O cell further includes a termination circuit having a terminal connected to the output of said driver, and having a selectable impedance characteristic at said terminal, with said selectable impedance being in accordance with a reference voltage provided to an input of said termination circuit. Preferably, the I/O cell the driver, receiver and termination circuits are fabricated on a common semiconductor substrate.Type: GrantFiled: June 18, 1993Date of Patent: November 1, 1994Assignee: Digital Equipment CorporationInventor: William B. Gist
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Patent number: 5347231Abstract: The invention is a novel charge sensitive preamplifier (CSP) which has no resistor in parallel with the feedback capacitor. No resetting circuit is required to discharge the feedback capacitor. The DC stabilization of the preamplifier is obtained by means of a second feedback loop between the preamplifier output and the common base transistor of the input cascode. The input transistor of the preamplifier is a Junction Field Transistor (JFET) with the gate-source junction forward biased. The detector leakage current flows into this junction. This invention is concerned with a new circuit configuration for a charge sensitive preamplifier and a novel use of the input Field Effect Transistor of the CSP itself. In particular this invention, in addition to eliminating the feedback resistor, eliminates the need for external devices between the detector and the preamplifier, and it eliminates the need for external circuitry to sense the output voltage and reset the CSP.Type: GrantFiled: February 23, 1993Date of Patent: September 13, 1994Assignee: Associated Universities, Inc.Inventors: Giuseppe Bertuccio, Pavel Rehak, Deming Xi
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Patent number: 5345191Abstract: Voltage control means output to a variable resistance part 2 a control voltage proportionate to an error between an input detection signal of an input terminal T.sub.i of a source follower field-effect transistor 1 and an output detection signal of an output-side transistor 5. Although said variable resistance part 2 changes its resistance value in accordance with a control voltage, a drain current flowing from the field-effect transistor to said variable resistance part is maintained constant by a constant-current source 3. Thus, an output voltage of the output side transistor changes in accordance with said error, thereby controlling the input detection voltage and the output detection voltage to be constantly the same.Type: GrantFiled: July 30, 1993Date of Patent: September 6, 1994Assignee: Leader Electronics Corp.Inventor: Naojiro Tanaka
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Patent number: 5341108Abstract: This amplifier biasing circuit is used in a telecommunication ring trip circuit to control the bias of a sense amplifier (SA) having input terminals (I1, I2) coupled to output terminals (A, B) of a Herter bridge (R0/R5) which is also coupled to a telecommunication line (L) and to a ringing signal source (RC). The bias circuit is a negative feedback loop coupled between terminals I1 and I1, I2 of SA and regulates the voltage at the latter terminals to a reference value when the input voltage on terminal I1 exceeds a predetermined value in one direction, by connecting a variable bias impedance (R6, PNP1, R7, PNP2) between the amplifier input terminals and VBAT.Type: GrantFiled: December 15, 1992Date of Patent: August 23, 1994Assignee: Alcatel N.V.Inventors: Eddie L. M. Willocx, Johan G. A. Verkinderen
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Patent number: 5325073Abstract: An amplifying apparatus provided by the present invention comprises a direct-coupled inverting amplifier and an alternating-current feedback circuit as well as a direct-current feedback circuit connected between input and output terminals of the direct-coupled inverting amplifier, wherein the direct-current feedback circuit comprises an operating-point extracting circuit for extracting a direct-current component and a bias-voltage generator having a direct-current signal gain larger than an alternating-current signal gain thereof and a direct-current operating bias voltage of the direct-coupled inverting amplifier is set by using a signal output by the bias-voltage generator. Such a configuration enables the amplifying apparatus to offer high-speed operations, a large dynamic range and a highly stable direct-current operating point regardless of the type of a signal input therein and allows an alternating-current signal gain to be set independently of the stability of the direct-current operating point.Type: GrantFiled: April 1, 1993Date of Patent: June 28, 1994Assignee: Alps Electric Co., Ltd.Inventor: Kazuo Hasegawa
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Patent number: 5317282Abstract: in a semiconductor array having a tetrode integrated in a semiconductor element, the tetrode comprises two field-effect transistors having a common semiconductor area forming the drain electrode of the first field-effect transistor and the source electrode of the second field-effect transistor. The semiconductor array has a three-pole array integrated in the semiconductor element and functioning as a feedback element, the input of the array is connected to the common semiconductor area of the tetrode. The output of the three-pole array is connected to the semiconductor area forming the gate electrode of the first field-effect transistor of the tetrode.Type: GrantFiled: September 30, 1992Date of Patent: May 31, 1994Assignee: Temic Telefunken microelectronic GmbHInventor: Wilfried Quast
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Patent number: 5311147Abstract: A high impedance output driver stage (16) for reducing loading on a gain stage (18) which drives an output stage (19). The output stage (19) is responsive to an input current. A current sense circuit (21) senses current of output stage (19). The current sense circuit (21) outputs a current proportional to the current sensed in the output stage (19). A current source circuit (22) is responsive to the current output by the current sense circuit (21) and outputs a current substantially equal to the input current of the output stage (19) thereby reducing loading on the gain stage (18).Type: GrantFiled: October 26, 1992Date of Patent: May 10, 1994Assignee: Motorola Inc.Inventors: Thomas D. Petty, Robert L. Vyne
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Patent number: 5304941Abstract: A sensor detection signal extracting circuit comprises a sensor, a control voltage generator, an adder, an amplifier, and a low-pass filter. The control voltage generator comprises two input terminals to one of which a voltage is applied based on the voltage source of the sensor. The output of the control voltage generator is added to the output of the sensor by the adder. The output of the adder is amplified by the amplifier, and its output is outputted to the output terminal and applied to the other input terminal of the control voltage generator through the low-pass filter. As a result, two loop systems are formed, that is, one loop for offsetting the change in the voltage of a voltage source applied to the sensor, and the other loop for offsetting a low frequency change such as that due to change in the environmental temperature. Therefore, the true output of the sensor can be obtained at the output terminal with little effect by the voltage change of the voltage source or by change in temperature.Type: GrantFiled: January 8, 1993Date of Patent: April 19, 1994Assignee: Kabushiki Kaisha Toyoda Jidoshokki SeisakushoInventor: Tetuo Tateishi
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Patent number: 5298869Abstract: A circuit for maintaining a constant voltage across and constant current through an RF cavity includes a RF cavity comprising a common-gate or common-base transistor associated with a current control circuit maintains a constant current flowing through the RF cavity. The current control circuit has a current control BJT associated with the RF cavity and a resistor between the emitter of the current control BJT and the negative source voltage of the RF cavity. The current control BJT and resistor operate as a current source or sink as necessary to maintain a constant current flow through said RF cavity. A constant voltage regulation portion of the circuit maintains a constant voltage across the RF cavity and includes a zener reference diode and a voltage regulation BJT.Type: GrantFiled: October 22, 1992Date of Patent: March 29, 1994Assignee: Alcatel Network Systems, Inc.Inventors: Leon Jinich, Truong V. Nguyen, R. Daniel Balusek
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Patent number: 5283477Abstract: A common driver circuit for driving a load heavy in a capacitive property such as a common electrode or the like of a liquid crystal panel is composed of the simple circuit construction provided with each circuit of the voltage follower, the low-pass filter, the feedback, the control so that the variation in the direction current component which gives bad influences in the processing of the signals of this type of circuit is restrained to improve the reliability, and the direct current is not required to be cut to eliminate the direct current cutting capacitor of the large capacity.Type: GrantFiled: March 13, 1992Date of Patent: February 1, 1994Assignee: Sharp Kabushiki KaishaInventor: Takeshi Shibata
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Patent number: 5237332Abstract: A distortion correction circuit having a mechanism for intercepting a distorted output signal from a receiver and for generating an Nth order signal. A circuit is provided to subtract the Nth order signal from the distorted output signal for providing a circuit output signal. Finally, a feedback loop is provided to feed back the circuit output signal for controlling the Nth order signal and for providing a distortion corrected circuit output signal. In a preferred embodiment, the distortion correction circuit includes a calibration circuit which provides a calibration signal employed to linearize a receiver channel. The receiver channel includes a plurality of receiver stages which receive the calibration signal and provide the distorted output signal which is intercepted and directed to a cubing circuit. The cubing circuit generates an error correction signal controlled by the feedback loop to cancel the distortion component of the distorted output signal.Type: GrantFiled: February 25, 1992Date of Patent: August 17, 1993Assignee: Hughes Aircraft CompanyInventors: Vaughn H. Estrick, Ronald T. Siddoway
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Patent number: 5237261Abstract: A voltage step-up regulator produces a frequency control voltage for a frequency synthesizer in a radio transmitter using a low operating voltage. To minimize the disturbances conveyed elsewhere in the radio device, the step-up regulator comprises an amplifying transistor controlled by an oscillator signal which operates as a class A amplifier, the output of amplifying transistor (Q1) including a diode and two selectively coupled capacitors for rectifying and filtering the amplified signal. The step-up regulator further comprising a feedback circuit for stabilizing the output voltage by adjusting the amplitude of the amplified signal.Type: GrantFiled: November 8, 1991Date of Patent: August 17, 1993Assignee: Telenokia OyInventor: Arto Haapakoski
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Patent number: 5233312Abstract: Sample and hold circuits are used to detect a DC component of an AC signal on an amplifier's output to generate a feedback signal that is applied to the amplifier's input to cancel out a DC component of an AC input signal. The sample and hold circuits detect the peak excursions of the AC output signal and apply the stored peaks to averaging circuitry which determines the magnitude of the DC component of the output signal.Type: GrantFiled: April 23, 1992Date of Patent: August 3, 1993Assignee: Micro Motion, IncorporatedInventors: Donald M. Duft, Gerald R. Ellis, Paul Z. Kalotay
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Patent number: 5218323Abstract: A transistor direct-coupled amplifier includes a positive-phase direct-coupled amplifier circuit, a second transistor, and a low-pass filter. The positive-phase direct-coupled amplifier circuit uses a base of a first transistor as an input terminal. The second transistor has a collector connected to the input terminal of the positive-phase direct-coupled amplifier circuit and an emitter connected to a reference voltage source, and the second transistor is complementary with the first transistor. A low-pass filter receives an output from the positive-phase direct-coupled amplifier circuit as an input, and the low-pass filter is connected to feed back an output to a base of the second transistor.Type: GrantFiled: April 9, 1992Date of Patent: June 8, 1993Assignee: NEC CorporationInventor: Masahiko Ohno
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Patent number: 5175749Abstract: An apparatus automatically corrects for DC offset in a multi-level packet-switched receiver. A reference carrier frequency is used during the receiver's idle mode to establish a DC offset exiting a discriminator (302). The DC offset is amplified by a video amplifier (315) and fed into an error amplifier (320) which generates the negative of the DC offset. The DC offset and the negative of the DC offset are input into a summing network (330) resulting in a zero DC offset exiting the video amplifier (315).Type: GrantFiled: January 25, 1991Date of Patent: December 29, 1992Assignee: Motorola, Inc.Inventors: David A. Ficht, Gary D. Schulz
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Patent number: 5138277Abstract: A switched capacitor integrator is used within the feedback loop of an automatic gain control (AGC) circuit to provide a very long time constant (5 minutes or more) when the amplitude of the gain-controlled signal is within predetermined limits. The time constant is automatically and quickly changed to a much shorter value when the gain-controlled signal is outside the predetermined limits, thereby allowing the AGC circuit to rapidly bring the gain-controlled signal amplitude within the desired range between the predetermined limits. Time constants of orders of magnitude longer than those readily realized with prior art methods of long time-constant filtering are achieved.Type: GrantFiled: September 28, 1990Date of Patent: August 11, 1992Assignee: Hazeltine Corp.Inventors: Kermit H. Robinson, Daniel M. Seslar
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Patent number: 5124667Abstract: A wideband amplifier having a direct output (C) to which is connected a level shifting stage providing at least one level shifted output. A first transistor emitter follower (Q.sub.3) is arranged in series with at least one level shifting element (Q.sub.4). The first transistor (Q.sub.3) has first resistor (R.sub.2) disposed between its base and a supply voltage source (V.sub.cc). A negative feedback circuit (R.sub.F1) is coupled to at least one level shifted output. The level shifting stage also includes at least second and third transistors (Q.sub.20, Q.sub.30) whose bases are connected to one said level shifted output (S) and which are arranged so that their collectors form separate first and second outputs (S.sub.1, S.sub.2) respectively. A fourth emitter follower (Q'.sub.3) is cascaded between the first emitter follower (Q.sub.3) and the level shifting element (Q.sub.4). A fifth transistor (Q.sub.Type: GrantFiled: July 12, 1991Date of Patent: June 23, 1992Assignee: U.S. Philips CorporationInventor: Gilles Chevallier