Including D.c. Feedback Bias Control For Stabilization Patents (Class 330/290)
  • Patent number: 5034702
    Abstract: Disclosed is an amplifying circuit comprising an amplifying transistor for amplifying an input signal, and a bias circuit for determining a current passing through the amplifying transistor and for determining an output voltage at the output of the amplifying transistor. The bias circuit comprising a current determining transistor for determining a current conducting through the amplifying transistor and a voltage determining transistor for determining an output voltage at the output of the amplifying transistor. The output voltage is determined independently from the determination of the current.
    Type: Grant
    Filed: February 14, 1990
    Date of Patent: July 23, 1991
    Assignee: Fujitsu Limited
    Inventor: Tomio Ueda
  • Patent number: 5017887
    Abstract: An integrated semiconductor arrangement comprising a high-frequency power amplifier stage, which comprises two field-effect transistor having first connection means to influence the output power by means fo the unit gate width of the amplifier stage, and second connection means to influence the value of the input capacitance of the amplifier stage. This stage also comprises means to ensure the feedback of direct current to ground and also includes D.C. biasing means.
    Type: Grant
    Filed: December 7, 1989
    Date of Patent: May 21, 1991
    Assignee: U.S. Philips Corporation
    Inventor: Patrice Gamand
  • Patent number: 4912431
    Abstract: A control amplifier enabling large bandwidths (.apprxeq.2 GHz) and a large dynamic control range (.apprxeq.25 dB). The amplifying element is a MESFET. This MESFET is automatically biased. Thus, FET's whose pinch-off voltage is subject to a large variation can be used without further adjustments.
    Type: Grant
    Filed: April 7, 1989
    Date of Patent: March 27, 1990
    Assignee: AT&T Bell Laboratories
    Inventor: Pieter W. G. Duijves
  • Patent number: 4912430
    Abstract: A circuit for biasing a field effect transistor using a current source to provide a constant current which can be shared between amplifier stages by connecting it to the drain of a first stage and the source of a second stage.
    Type: Grant
    Filed: May 24, 1989
    Date of Patent: March 27, 1990
    Assignee: Avantek, Inc.
    Inventor: Michael L. Frank
  • Patent number: 4897616
    Abstract: A wideband integrated circuit amplifier includes a pair of current mirror circuits sensing emitter currents of NPN and PNP transistors in the amplifier output stage. A pair of current mirror circuits divide the emitter currents, respectively, by a factor of 20. The current mirror output currents are summed, current splitter directs approximately 1/20 of the summed mirror currents through a transistor, the collector of which is coupled to the gate electrode of a field effect input transistor of a bias control circuit, to produce a scaled down feedback current. A high impedance current source is connected to the collector of the transistor. The bias circuit adjusts the DC bias voltage applied between the base electrodes of the transistors to cause the scaled down feedback current to equal the constant current. A very small compensation capacitor produces a low frequency pole that prevents the bias circuit from interfering with high frequency performance characteristics of a wide band amplifier.
    Type: Grant
    Filed: July 25, 1988
    Date of Patent: January 30, 1990
    Assignee: Burr-Brown Corporation
    Inventors: Anthony D. Wang, R. Mark Stitt, II
  • Patent number: 4894862
    Abstract: The Invention relates to a signal compression circuit, more particularly for a telephone set of the handsfree-type, comprising a preamplifier (10), the input of which is connected with an input signal to be processed, and a preamplifier gain control device (11) for servo-controlling, to a predetermined value, the output signal amplitude of the preamplifier, in which the gain control device (11) is associated with a circuit (C, 15, 16) determining two time constants, which respectively control the increase or decrease speed of the preamplifier gain (10) in relation with the input signal amplitude (Vin).
    Type: Grant
    Filed: July 19, 1988
    Date of Patent: January 16, 1990
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Bruno Defretin, Thierry Arnaud
  • Patent number: 4891604
    Abstract: A voltage follower input stage having a correction or bootstrap circuit to effectively remove the parasitic capacitance by bootstrapping the capacitance so that both sides of the parasitic capacitance follows voltage level changes.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: January 2, 1990
    Assignee: Harris Corporation
    Inventor: Gerald M. Cotreau
  • Patent number: 4888561
    Abstract: Herein disclosed are an amplifier and a display which uses the former. The amplifier includes a current amplifying circuit for sending out an amplified output current varying according to an input signal, and a current-voltage converting circuit for converting the output current of the current amplifying circuit into a voltage thereby to generate a high output voltage in response to the input signal. The supply voltage V.sub.cc1 of the current amplifying means and the supply voltage V.sub.cc2 of the current-voltage converting means are set separately of each other to have a relationship of V.sub.cc1 <V.sub.cc2. Thus, a high output voltage can be obtained from the current-voltage converting circuit without the need for the current amplifying means to have high breakdown voltage elements.
    Type: Grant
    Filed: May 4, 1988
    Date of Patent: December 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Ryushi Shimokawa, Seiichi Ueda, Yasuji Kamata, Kenkichi Yamashita, Kazuo Kato, Hideo Sato
  • Patent number: 4849712
    Abstract: A gain control circuit arrangement comprises a transistor amplifier (A) for providing an output signal (OP) in response to a received input signal (IP). The gain of the transistor amplifier (A) is controlled by means of a field effect transistor (TF) connected in the emitter circuit of the amplifier and included in a feedback control loop to which a gain control signal (Ref A) is applied in operation of the gain control arrangement. A collector load of the amplifier comprises a potential divider (R1 and R2) one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.
    Type: Grant
    Filed: June 11, 1987
    Date of Patent: July 18, 1989
    Assignee: Plessey Overseas Limited
    Inventor: Adrian Jarrett
  • Patent number: 4755768
    Abstract: Herein disclosed are an amplifier and a display which uses the former. The amplifier includes a current amplifying circuit for sending out an amplified output current varying according to an input signal, and a current-voltage converting circuit for converting the output current of the current amplifying circuit into a voltage thereby to generate a high output voltage in response to the input signal. The supply voltage V.sub.cc1 of the current amplifying means and the supply voltage V.sub.cc2 of the current-voltage converting means are set separately of each other to have a relationship of V.sub.cc1 <V.sub.cc2. Thus, a high output voltage can be obtained from the current-voltage converting circuit without the need for the current amplifying means to have high breakdown voltage elements.
    Type: Grant
    Filed: April 3, 1986
    Date of Patent: July 5, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Ryushi Shimokawa, Seiichi Ueda, Yasuji Kamata, Kenkichi Yamashita, Kazuo Kato, Hideo Sato
  • Patent number: 4731529
    Abstract: A light measuring circuit, consisting of an amplifying circuit amplifying the output of a photoelectric conversion element, is arranged to detect the occurrence of a low frequency component in the output of the photoelectric conversion element that comes to exceed a given level and, upon detection of that, to bypass the output of the photoelectric conversion element to prevent the output of the amplifying circuit from being saturated by a DC light (external or ambient light).
    Type: Grant
    Filed: April 2, 1986
    Date of Patent: March 15, 1988
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshifumi Ohsawa
  • Patent number: 4633189
    Abstract: An NF (Negative Feedback) tone control circuit in which a circuit gain of unity is maintained for a flat frequency response without the addition of active components. A voltage divider circuit which divides only an a.c. component of the output of an operational circuit is connected between the output of the operational amplifier circuit and a variable impedance circuit, the latter including the variable resistors of the tone control circuit.
    Type: Grant
    Filed: October 15, 1985
    Date of Patent: December 30, 1986
    Assignee: Pioneer Electronic Corporation
    Inventors: Yasuo Kawakami, Katsushi Kitamura
  • Patent number: 4612514
    Abstract: A feedback amplifier circuit includes an inversion circuit, a level shift circuit, and a feedback resistive element. The inversion circuit includes an input active element and a load element connected in cascade with respect to a voltage source. The level shift circuit includes a field effect transistor having a gate connected to the output of the inversion circuit, a diode or diodes, a constant current active load connected in cascade with respect to the voltage source, and the feedback resistive element is connected between the output of the level shift circuit and the input of the inversion circuit.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: September 16, 1986
    Assignee: Fujitsu Limited
    Inventors: Masafumi Shigaki, Yukio Takeda
  • Patent number: 4599577
    Abstract: In a transistorized amplification polarization device the polarization current of the collector of each amplification transistor of the stage is maintained at a constant value by means of a comparing circuit adapted to compare a collector polarization current image signal to a reference signal. The error signal result from such comparision is used as a control signal for controling a current chopping regulator supplying the polarization power for the base of the amplification transistor.
    Type: Grant
    Filed: February 26, 1985
    Date of Patent: July 8, 1986
    Assignee: Thomson CSF
    Inventor: Michel Nollet
  • Patent number: 4586003
    Abstract: To provide for essentially instantaneous stable operation of an electrical circuit, including an internal R/C feedback circuit, upon connection to an interruptible power supply source (+U.sub.S, G), the circuit includes an additional or auxiliary input terminal (14) which is connected to a series-capacitor network, including a series capacitor (C1, 19) serially connected between the additional terminal (14) and a power terminal of the power supply, and a shunt capacitor (C2, 18) connected between the additional terminal (14) and ground or chassis of the power supply; and wherein the capacity value relationships of the series and shunt capacitors are so selected with respect to the voltage of the power supply that the additional terminal will have a voltage corresponding to at least approximately the operating point (U.sub.V) impressed thereon upon connection of the power supply means.
    Type: Grant
    Filed: February 4, 1985
    Date of Patent: April 29, 1986
    Assignee: Robert Bosch GmbH
    Inventors: Heribert Gorzel, Wolfgang Liess
  • Patent number: 4564818
    Abstract: A transimpedance amplifier having improved gain/bandwidth product utilizes a direct current feedback circuit to provide improved stability of bandwidth and frequency response flatness as well as a much higher gain times bandwidth product than prior art circuits.
    Type: Grant
    Filed: August 24, 1984
    Date of Patent: January 14, 1986
    Assignee: Motorola Inc.
    Inventor: Timothy R. Jones
  • Patent number: 4532477
    Abstract: Amplifier-produced distortion known as amplitude modulation to phase modulation (AM/PM) conversion is reduced through the use of GaAs FETs which are biased to generate AM/PM having an algebraic sign opposite to that generated by the amplifier. This algebraic sign reversal is accomplished by biasing the GaAs FETs so that a DC drain current .ltoreq.75% and .gtoreq.10% of the short-circuit drain current is established. In the disclosed embodiment, several GaAs FETs are cascaded in alternation with attenuators to increase the magnitude of the compensating AM/PM conversion without generating substantial amplitude modulation to amplitude modulation (AM/PM) conversion.
    Type: Grant
    Filed: December 23, 1983
    Date of Patent: July 30, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: Donald R. Green, Jr., James P. Moffatt
  • Patent number: 4531100
    Abstract: An amplifier which is particularly suitable for low supply voltage operation and which is relatively insensitive to power supply voltage variations includes a signal amplifying stage (11) and a control stage (10). The signal amplifying stage (11) includes the output load (13), such as a loudspeaker, in series with a transistor (12) which is controlled by a current mirror circuit (14, 15, 16) in the control stage. The circuit acts by continuously comparing part of the voltage across the output load (13) with a very low reference voltage arising from the difference in the base-emitter voltages of two transistors (14, 15) operating at unequal collector current values. This causes voltage excursion peaks appearing at the junction of the output load (13) and the amplifying transistor (12) to be clamped to a voltage equal to or otherwise related to that at the opposite side of the output load (13).
    Type: Grant
    Filed: July 11, 1983
    Date of Patent: July 23, 1985
    Inventor: Francis W. Adkin
  • Patent number: 4521737
    Abstract: An integrated current amplifier circuit combining bipolar and MOS technologies provides accurate current gain over a wide voltage supply range. The amplifier circuit includes a current source for providing first and second currents and first and second resistive circuits coupled to the current source for sinking the respective currents supplied therefrom. A feedback transistor connected between the current source and an output of the amplifier circuit provides current feedback to the first resistive circuit to establish the current gain action of the amplifier circuit which becomes a ratio of two resistors times an input current supplied to the second resistive circuit. The ratio of the two resistors can be accurately controlled thereby controlling the current gain of the amplifier circuit. Additionally, an active turn-off circuit requiring no standby bias current is provided to ensure that the feedback transistor is non-conducting when the amplifier is in an off state.
    Type: Grant
    Filed: February 22, 1984
    Date of Patent: June 4, 1985
    Assignee: Motorola, Inc.
    Inventor: Byron G. Bynum
  • Patent number: 4495471
    Abstract: A buffer amplifier input circuit includes both field-effect and bipolar transistors arranged in conjunction with an operational amplifier to provide very stable operation over a wide frequency range.
    Type: Grant
    Filed: September 19, 1983
    Date of Patent: January 22, 1985
    Assignee: Tektronix, Inc.
    Inventor: Ronald A. Barrett
  • Patent number: 4486718
    Abstract: The present invention provides an amplifier having cascade-connected first and second transistors, a constant current source for supplying an operating current to the first transistor, and a load resistor connected to the collector of the first transistor at one end and to a substantially constant voltage terminal at the other end. The amplifier arrangement of the invention removes the necessity of a large capacitance capacitor for noise suppression.
    Type: Grant
    Filed: March 19, 1982
    Date of Patent: December 4, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Mitsutoshi Sugawara
  • Patent number: 4467290
    Abstract: A bipolar main transistor Q.sub.1 designed to amplify a high-frequency signal applied to its base, for driving a load connected to its collector lead, has its emitter connected through a low-ohmic feedback resistor R.sub.E to a point of stabilized potential constituted by the emitter of a biasing transistor Q.sub.2 of the same conductivity type (e.g. NPN) as the main transistor, the latter emitter being connected to a terminal of a d-c supply through a much larger resistor R.sub.3 ; the two series-connected resistors R.sub.E, R.sub.3 are capacitively shunted for high frequencies. The biasing transistor Q.sub.2 is driven at a much larger direct current than the main transistor by a control transistor Q.sub.3 traversed by a direct current substantially equaling that of the main transistor Q.sub.1, this control transistor being biased by a voltage divider including a fourth transistor Q.sub.4 connected as a diode and traversed by a current substantially equaling that of the biasing transistor Q.sub.2.
    Type: Grant
    Filed: May 28, 1982
    Date of Patent: August 21, 1984
    Assignee: Selenia, Industrie Elettroniche Associate, S.p.A.
    Inventor: Gianfranco Cozzi
  • Patent number: 4459553
    Abstract: A D.C. stabilization circuit is provided for a follower-type amplifier in which a correction current is generated to maintain a constant operating point of the follower device. A blocking capacitor between a signal source and the follower device permits the bias voltage to self adjust. In a preferred embodiment, the correction current is generated by a transconductance amplifier which compares the output voltage with a signal input voltage, and the correction current is connected directly to the junction of the blocking capacitor and the input of the follower device. The follower device may suitably be a field-effect transistor, a bipolar transistor, or a multi-stage follower composed of both types of devices.
    Type: Grant
    Filed: February 11, 1982
    Date of Patent: July 10, 1984
    Assignee: Tektronix, Inc.
    Inventor: Calvin D. Diller
  • Patent number: 4439745
    Abstract: In an amplifier circuit having a first bipolar transistor receiving an input signal and coupled to the base of a second bipolar transistor of opposite conductivity, DC offset at the amplifier output is prevented by connecting a constant current source in parallel with the emitter resistor of the second transistor. DC feedback can be coupled from the amplifier output to the emitter of the second transistor and/or to a circuit component affecting the value of the input voltage at the base of the first transistor.
    Type: Grant
    Filed: September 14, 1981
    Date of Patent: March 27, 1984
    Assignee: Pioneer Electronic Corporation
    Inventor: Kazuaki Nakayama
  • Patent number: 4420724
    Abstract: A simple method for increasing the dynamic range of a GaAs FET amplifier is described. The drain resistance of the FET is adjusted to induce leakage current across the gate-source junction when excessive power levels are imposed on the gate. This current shunt is provided without added circuit components and therefore does not affect the sensitivity or bandwidth performance of the amplifier.
    Type: Grant
    Filed: May 17, 1982
    Date of Patent: December 13, 1983
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Brian Owen
  • Patent number: 4356450
    Abstract: Disclosed is an offset compensating circuit for an operational amplifier having its noninverting input terminal supplied with a compensating voltage corresponding to its output voltage obtained when its inverting input terminal is grounded. This offset compensating circuit includes a comparator connected to the output terminal of the operational amplifier and comparing the output voltage of the operational amplifier with a set voltage to deliver a binary signal corresponding to the result of such comparison, a pulse generator, an up-down counter for counting output pulses from the pulse generator in a count direction in accordance with the level of the output signal of the comparator, and a D/A converter for supplying the noninverting input terminal of the operational amplifier with a voltage corresponding to the count output of the up-down counter.
    Type: Grant
    Filed: November 17, 1980
    Date of Patent: October 26, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Eiji Masuda
  • Patent number: 4342006
    Abstract: An amplifier circuit comprises a differential or operational amplifier having a first input connected to receive an input signal, and a transistor having its base connected to the output of the differential amplifier, its collector connected to a first power supply terminal through a constant current source and connected to a second input of the differential amplifier through a DC negative feedback circuit, and its emitter connected to a second power supply terminal through a resistor and connected to the first input of the differential amplifier through an AC negative feedback circuit. A load such as a recording head is connected between the collector of the transistor and circuit ground. With this circuit, an output signal current including no DC component and proportional to an input signal voltage flows through the load.
    Type: Grant
    Filed: February 12, 1980
    Date of Patent: July 27, 1982
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Yuzo Ishigaki
  • Patent number: 4335361
    Abstract: A communications channel monitoring system is disclosed for digitally based communication channels carrying signals corrupted by noise. The monitor system provides a signal indicative of the expected value of the communication channel signal if uncorrupted by noise and provides a signal indicating the extent of any such corruption.
    Type: Grant
    Filed: December 12, 1979
    Date of Patent: June 15, 1982
    Assignee: Honeywell Inc.
    Inventor: William F. Acker
  • Patent number: 4322687
    Abstract: Improved input offset voltage compensation of an amplifier (12) is achieved through the use of a servo loop which is added to electronic switch and capacitor offset compensation circuitry disposed in the input (14) and feedback (20) paths of the amplifier. A voltage approximately equal to the offset voltage is stored on a feedback capacitor (24) by operation of input reset (34), feedback shunt (22) and feedback reset (26) switches. An error correction voltage is then generated within the servo loop (40) to adjust for the residual offset produced by the operation of the input reset and feedback shunt switches as well as the finite gain of the amplifier.
    Type: Grant
    Filed: May 19, 1980
    Date of Patent: March 30, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Mirmira R. Dwarakanath, Douglas G. Marsh
  • Patent number: 4311967
    Abstract: Compensation for the current flowing in the collector resistance of a transistor is achieved by generating a compensating current of appropriate magnitude and polarity sense, and applying that compensating current to the base of the transistor. To this end, a voltage equivalent to that across the transistor emitter-collector path is applied across a current conductive device representative of the collector resistance. The current therethrough is then proportioned by a current amplifier and applied to the base of the transistor to be compensated.
    Type: Grant
    Filed: December 17, 1979
    Date of Patent: January 19, 1982
    Assignee: RCA Corporation
    Inventor: Otto H. Schade, Jr.
  • Patent number: 4292599
    Abstract: A low pass active filter comprises multiple stages including multiple active devices, circuitry including resistance and capacitance AC coupling the stages in series sequence, and high impedance biasing resistance coupled between the first and last stage inputs, whereby the DC operating point is determined by one active device.
    Type: Grant
    Filed: January 19, 1979
    Date of Patent: September 29, 1981
    Assignee: The Anaconda Company
    Inventor: Stephen M. Bench
  • Patent number: 4280103
    Abstract: A multistage transistor amplifier for amplifying alternating voltages which comprises at least two successive cascade-connected amplifier stages having d.c. feedback. A following amplifier stage is a.c. coupled to the output of the cascade-connected amplifier stages and a resistor is connected between the output of the cascade-connected amplifier stages and the input of the following amplifier stage. The cascade-connected amplifier stages supply the following amplifier stage with direct current, the d.c. operating resistance for the following amplifier stage including the cascade-connected amplifier stages and the resistor.
    Type: Grant
    Filed: July 31, 1979
    Date of Patent: July 21, 1981
    Assignee: Robert Bosch GmbH
    Inventor: Bonno Poppinga
  • Patent number: 4275453
    Abstract: An electronic filter comprised of three active filter sections (A, B, C) is provided to smooth the stepped signal from a digital-to-analog converter. The first section has a noninverting low-pass filter transfer function, and the second has an inverting transfer function designed to pass a narrow frequency band centered at the step frequency of the stepped output signal with sharp cutoff on either side of that narrow band. The third section adds the noninverted output of the first section to the inverted output of the second section. This third section has a lead-lag transfer function designed to reduce the phase angle between the signal at its output terminal and the stepped signal at the input of the first section.
    Type: Grant
    Filed: January 25, 1980
    Date of Patent: June 23, 1981
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Charles A. Wagner
  • Patent number: 4268798
    Abstract: A bipolar transistor is utilized as the feedback element of an inverting amplifier. The base of the transistor is connected to the amplifier's output, with the emitter connected to the input thereby providing 100% voltage feedback. The output is taken across the collector load of the transistor. Signal inputs to the amplifier are coupled through conventional summing resistors. The resulting configuration is capable of high frequency operation and provides excellent isolation between input signals.
    Type: Grant
    Filed: February 26, 1979
    Date of Patent: May 19, 1981
    Assignee: Motorola, Inc.
    Inventor: Elwood C. Reichart
  • Patent number: 4264981
    Abstract: In an insulated gate field effect transistors having two gate electrodes, the drain-source current can be controlled by voltages applied at the two gate electrodes. Changes in the input voltage at one gate electrode are accompanied by a change in the input capacitance at the other gate electrode causing a change in load impedance for the source controlling this gate electrode which can give rise to undesirable reactions on the source. A source resistance in the form of a voltage divider has a tap which is connected to the second gate electrode. By proper dimensioning of the voltage divider, the gate-source voltage at the first gate electrode can be made to change, in the event of a change in the input voltage applied to the second gate electrode, by an amount sufficient to counteract any undesirable change in the input capacitance at the first gate electrode.
    Type: Grant
    Filed: April 4, 1978
    Date of Patent: April 28, 1981
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Vaclav Vilimek
  • Patent number: 4259642
    Abstract: A bilateral transmission line repeater is disclosed in which opposite directions of transmission are separated into different frequency bands. The amplifiers for each direction of transmission include an automatic gain control circuit for controlling the gain of the amplifier. Gain control for the inward bound amplifier (toward a central location such as a telephone central office) is under the control of an automatic gain control signal derived from the outward bound signal as well as from the inward bound signal. Feedback around the gain control amplifier is accomplished using a current mirror circuit to avoid loading the amplifier output.
    Type: Grant
    Filed: December 29, 1978
    Date of Patent: March 31, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Jeffrey H. Derby
  • Patent number: 4218659
    Abstract: A Hall-effect element is connected at one Hall current terminal to ground and at the other Hall current terminal to a DC voltage application circuit. Two Hall voltage terminals of the Hall-effect element are coupled with the base and the emitter of a first transistor, respectively. A second transistor is connected in series to the first transistor in such a way that the collector of the second transistor is fed back in current mode to the emitter of the first transistor.
    Type: Grant
    Filed: January 26, 1979
    Date of Patent: August 19, 1980
    Assignee: Hitachi, Ltd.
    Inventor: Takao Arai
  • Patent number: 4216434
    Abstract: A variable gain alternating voltage amplifier having a d.c. negative feedback loop for setting the operating point of the amplifier wherein a change in gain of the amplifier is effected by a variable resistance feedback loop which is connected in parallel with the d.c. negative feedback loop and includes the series connection of a controllable resistor and a capacitor.
    Type: Grant
    Filed: May 18, 1978
    Date of Patent: August 5, 1980
    Assignee: Licentia Patent-Verwaltungs-G.m.b.H.
    Inventor: Jurgen Wermuth
  • Patent number: 4147992
    Abstract: The disclosed unity gain amplifier circuit includes current supplies, current sinks, input, output and feedback transistors and an inverting gain stage. The negative feedback transistor stabilizes the quiescent signals and enables the magnitude of the amplifier output signal to follow the magnitude of the amplifier input signal. The gain stage, which is connected between the current supplies, the current sinks, and the input and feedback transistors, utilizes undesired signals occurring therein to cancel each other so that the undesired signals do not adversely effect the magnitude of the amplifier output signal.
    Type: Grant
    Filed: December 27, 1977
    Date of Patent: April 3, 1979
    Assignee: Motorola, Inc.
    Inventor: William F. Davis
  • Patent number: 4105943
    Abstract: The dynamic input impedance of a feedback current amplifier is varied such that a matching to the characteristic impedance of a line feeding the amplifier is achieved. An integrated negative feedback current amplifier has at least two amplifier stages and one inverse coupling branch from the amplifier input to the amplifier output. The active element of the last amplifier stage has a divided output circuit such that the output current is divided between the inverse coupling branch and the amplifier output. The input DC current is selected such that the dynamic amplifier input impedance is adjusted to the characteristic impedance of a line feeding the amplifier.
    Type: Grant
    Filed: August 10, 1977
    Date of Patent: August 8, 1978
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gerhard Krause
  • Patent number: 4105944
    Abstract: Current feedback is used to adjust the quiescent emitter current of an r-f amplifier transistor to prescribed idling or stand-by value, to avoid undesirable quiescent base-input-impedance conditions, but is disabled upon application of r-f drive to the base electrode of the r-f transistor so that operation which is other than Class A is not interfered with.
    Type: Grant
    Filed: November 21, 1977
    Date of Patent: August 8, 1978
    Assignee: RCA Corporation
    Inventor: Wendell G. Anderson
  • Patent number: 4095189
    Abstract: The amplifier comprises at least two amplifier units or transistors T.sub.1 and T.sub.2 of complementary types. The base of the first transistor T.sub.1 is connected to a control current supply line. The emitter of the transistor T.sub.1 is connected on the one hand to one end of the load impedance and on the other hand to the base of the second transistor T.sub.2. The collector of the transistor T.sub.1 is connected to a voltage supply of suitable polarity. The emitter of the transistor T.sub.2 is connected to the current supply line and the collector of said transistor is connected to another end of the load impedance.
    Type: Grant
    Filed: February 7, 1977
    Date of Patent: June 13, 1978
    Inventor: Paul Nguyen-Tan Tai
  • Patent number: 4080577
    Abstract: The disclosed linear amplifier comprises a grounded N.sup.+ semiconductor substrate on which an N layer is epitaxially grown. The N epitaxial layer includes three separate P diffusion regions. One of the outermost regions is connected to an input terminal and includes an N diffusion region to form an input, common emitter NPN transistor with the epitaxial layer while forming a feedback, common base PNP transistor with the intermediate P diffusion region and epitaxial layer. The remaining P region forms a load, common base PNP transistor with the intermediate P region and epitaxial layer and is connected to an injector terminal. The intermediate P region and N region are connected to an output terminal.
    Type: Grant
    Filed: September 15, 1975
    Date of Patent: March 21, 1978
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuhiko Asada, Takao Nakano, Kenji Murakami
  • Patent number: 4071830
    Abstract: A linear voltage amplifier includes an input stage which has a P channel MOSFET load device and an N channel input device. The complementary amplifier also includes a feedback circuit which includes a low pass filter coupled between the output stage and the gate electrode of the P channel load device. The P type tub region in which the N channel input MOSFET is located is biased by an adjustable bias circuit to control threshold voltage of the input MOSFET and thereby control the DC level of the output of the complementary amplifier. In one embodiment the biasing circuit includes a P channel MOSFET coupled in series with a diode connected N channel MOSFET between two voltage supply conductors, the gate of the P channel MOSFET being connected to the gate of the P channel MOSFET load device of the input stage.
    Type: Grant
    Filed: July 3, 1975
    Date of Patent: January 31, 1978
    Assignee: Motorola, Inc.
    Inventor: Robert Charles Huntington
  • Patent number: RE29844
    Abstract: An amplifier having a combination of local series and shunt feedback to provide matched input and output impedances permitting cascading of a number of amplifiers or amplifiers and other devices without signal degradation. .Iadd.
    Type: Grant
    Filed: March 23, 1977
    Date of Patent: November 21, 1978
    Assignee: Avantek, Inc.
    Inventors: Leonard D. Seader, James E. Sterrett