Abstract: A Darlington amplifier comprising an auxiliary transistor (16) for overload protection. The base of the auxiliary transistor is connected to a tapping (17) provided on a resistor (12) included between the emitter and base of the output transistor (11) of the amplifier, which resistor assists in biassing said auxiliary transistor.

Abstract: A method and apparatus for altering the apparent electrical characteristic of a distributed electrical component in an integrated circuit is disclosed. In one form a distributed load resistor is sunk into a parallel distributed guard resistor. The mutual distributed capacitance between the distributed load resistor and the parallel distributed guard resistor is substantially greater than the distributed capacitance between the distributed load resistor and any other electrical component. A follower circuit for driving the voltage across the parallel distributed guard resistor by the voltage across the distributed load resistor is provided.

Abstract: An oscillation circuit including an amplifier portion wherein the collector of a first switching transistor has a load connected thereto, means is provided for transmitting an output of the collector of the first switching transistor to the base thereof, means is provided for transmitting the output of the collector of the first switching transistor to the base of a second switching transistor, and the collector of the second switching transistor has a load connected thereto. A capacitive element is connected between the collector of the second switching transistor and the base of the first switching transistor of the amplifier portion so as to feedback an output of the second switching transistor to the first switching transistor to operate the circuit as an oscillator.

Abstract: A gain-controlled amplifier is provided which employs a controllable alternating-current resistance device. The device is constructed in a similar manner as a vertical PNP transistor, having an emitter region of high conductivity P+ material, a P type collector region, and an intervening region of high resistivity (intrinsic) N type base material. An N+ base contact region is separated from the P+ emitter region by an expanse of the intrinsic material which establishes a separation which is greater than the diffusion length of carriers injected into the intrinsic region. The base-emitter junction of the device which is formed by the N+ base contact region, the intrinsic region, and the P+ emitter region thus has the characteristics of a PIN diode, with a high injected carrier lifetime. At higher signal frequencies, such as the frequencies of television I.F. signals, the base-emitter PIN junction ceases to act as a normal transistor rectifying junction, and becomes an A.C.

Abstract: The present invention provides a dielectric material adapted for microwave integrated circuits (MIC) and an electric circuit making use of said dielectric material. More particularly, an oxide dielectric material principally consisting of (1-x)BaO.xTiO.sub.2 (0.7.ltoreq.x.ltoreq.0.95) and containing both 0.007 to 0.7 weight % of manganese and 0.037 to 3.7 weight % of zirconium, has a large dielectric constant, a small dielectric loss and a small temperature coefficient of dielectric constant and is uniform over a broad range, and especially it is possible to easily manufacture a substrate having a uniform dielectric constant and a uniform dielectric loss. Transistors and MIC's employing such substrates can attain uniform and excellent high-frequency characteristics.

Abstract: An integrated circuit including a charge-coupled device for accumulating charge in a potential well and pair of metal-oxide semiconductor (MOS) transistors connected to form a differential amplifier. The gate of one transistor is coupled to the CCD potential well. The integrated circuit is provided with means for coupling the differential outputs, the drain of each transistor of the differential amplifier, to the differential inputs of an external op amp. Means are provided for coupling electrical feedback from the output of the op amp to the gate of the second transistor of the differential amplifier.

Abstract: In an integrated circuit structure including IF amplifier stages coupled in cascade by d-c blocking capacitors to restrict the noise bandwidth of an FM receiver in which it is employed and receiving power from a common power supply line, separate operating voltage generating circuits are provided for each amplifier stage to inhibit undesired oscillations. Each voltage generating circuit is decoupled from the power supply line by a respective lateral transistor configuration cooperative with a current mirror amplifier arrangement to supply a reference current to the voltage generating circuit.

Abstract: An acoustic monolithic IC, which is enabled by a simple modification of the external circuit thereof to realize either the amplification of the left and right channels of stereophonic signals or the application to a balanced transformer-less (BTL) amplifier circuit, is composed of first and second differential amplifier circuits each having non-inverting and inverting inputs and of first and second amplifier output circuits each having non-inverting and inverting inputs.The first differential amplifier circuit has its non-inverting and inverting inputs led as the first and second input terminals of the acoustic monolithic IC to the outside thereof whereas the second differential amplifier circuit has its non-inverting and inverting inputs led as the third and fourth input terminals of the acoustic monolithic IC to the outside thereof.

Abstract: A hybrid integrated circuit for high output power having a conductive pattern on a ceramic substrate, a lead frame connected to said pattern, and electronic components mounted on said pattern wired with one another, has been found. When said conductive pattern has an inductor in a spiral shape, the same spiral pattern is conformed on the lead frame, and those two spiral patterns are overlapped. Thus, the resistance of the inductor is reduced since the conductive pattern and the lead frame pattern are connected parallel to each other. Then, a large current can be loaded to said inductance with only a small loss. As the material of the lead frame is cheap, the resultant hybrid integrated circuit can be manufactured at a lower cost.

Abstract: The cut-off frequency of a transistor drops remarkably when the collector-emitter voltage of the transistor is driven into the quasi-saturation region of about 1 V. To prevent this problem, the collector-emitter voltage of the transistor is detected and compared with a predetermined reference voltage by comparison-limiting means. The comparison-limiting means limits the base current of the transistor and thus restricts the drop in the collector-emitter voltage. Limiting the voltage drop in this manner prevents the transistor from being driven into the quasi-saturation region. The reference voltage is set to the p-n junction voltage in the forward direction. Hence, the drop in the collector-emitter voltage is limited to a value near this reference voltage.

Abstract: In an integrated circuit class B audio output device the transistors are fabricated as plural parallel connected sections. The two output transistors have their sections interdigitated so that adjacent sections are not turned on simultaneously. This leads to substantial improvements in thermal peaks within the transistors and to reduced thermal gradients across the transistors.

Abstract: A CMOS inverter is coupled to drive a bipolar transistor emitter follower which has a field effect transistor load. The load transistor is provided with a d-c bias that causes the circuit to function as a class A amplifier. The amplifier has a gain-band-width product that is much higher than can be achieved with CMOS inverters alone and such amplifiers can be cascaded to achieve extremely high gain values. It is preferred to obtain the required class A bias from a similar circuit wherein the load transistor is replaced by a resistor and the emitter follower has its output directly coupled to the CMOS inverter input. This means that the voltage across the resistor is that value that will operate the bias circuit at its trip point independent of the manufacturing variables that affect transistor threshold values. This amplifier configuration is useful in constructing high-speed, high-sensitivity clocked comparators and clocked latches.

Abstract: A semiconductor integrated amplifier having a p-channel type MISFET and an n-channel type MISFET which are integrated in a single semiconductor substrate, a load resistance connected between the drain regions of the MISFETs, a power source to which the MISFETs are connected in series, and a DC current blocking capacitor through which the gates of the MISFETs are connected to each other. The amplifier has a gate capacitance one terminal of which is constituted by a well formed in the substrate and connected to high voltage side of power supply, while the other electrode thereof is constituted by a gate electrode formed on the well and connected to the low voltage side of the power supply. Parasitic capacitance of the capacitor is considerably reduced to allow a wider range of frequency adjustment of the amplifier.

Abstract: A surface acoustic wave filter arrangement is provided in which both filter and associated driving amplifier are arranged in the same integrated circuit package.

Abstract: An amplifier stage is disclosed having junction capacitors for by-passing high frequency signals without introducing substantial signal nonlinearities. A pair of similar serially connected diodes are reverse biased between the amplifier supply potentials. The mid-point connection of the diodes is connected to the amplifier node to be by-passed paralleling the junction capacitances of the diodes with respect to a-c potential excursions. Typical diode capacitance variations resulting from changes in the reverse bias potential across a pn junction is minimized by this arrangement.

Abstract: The disclosed amplifier includes first and second gain stages and first and second frequency compensating capacitors. The second gain stage has a first high impedance node coupled to the first gain stage, a second high impedance node, a first circuit coupled between the first and second high impedance nodes, a third high impedance node, and a second circuit coupled between the second and third high impedance nodes. The impedances at the first, second and third high impedance nodes are a function of frequency and the impedance at the second high impedance node is lower at any given frequency than the impedances at the first and third high impedance nodes. The first frequency compensating capacitor is coupled between the first and third nodes and the second frequency compensating capacitor is coupled between the third and second nodes.

Abstract: A buffer amplifier is described for use in an integrated circuit in which a siganl from a processing circuit is coupled by the buffer amplifier to an output pin on the integrated circuit. The buffer amplifier includes a pair of transistors, the first of which receives the output of the processing circuit and is preferably arranged in an emitter-follower configuration. A resistor internal to the integrated circuit is coupled between ground and the emitter of the first transistor. The second transistor, preferably a vertical PNP type transistor, is arranged in a circuit configuration to couple the output of the first transistor to the output pin and to sink any current flowing to the output pin from a circuit driven by the buffer amplifier.

Abstract: A high frequency oscillating circuit comprises an integrated circuitry composed of first and second lateral type transistors and a longitudinal type junction field effect transistor formed in a semiconductor layer of low impurity concentration epitaxially grown on a semiconductor substrate of high impurity concentration. An AT cut quartz crystal vibrator operable at a high oscillating frequency of more than several MHz is connected to the integrated circuitry, and a pair of capacitors are provided to adjust the vibrator oscillating frequency.

Abstract: An operational amplifier including two parallel transistors in each of the two current paths with one of the transistors being connected to the current path by a fusible element and the other transistor being connected to the path by an impedance which does not affect the overall operation of the current path during normal operation with the current in the first direction and steers the current in the opposite direction towards the fusible element to blow the fusible element by forward biasing a normally reversed biased junction. Using bipolar transistors, the base-collector junction is forward biased to blow the fusible element. A single junction field effect transistor can be used having a plurality of parallel drain segments and the gate-drain junction is forward biased.

Abstract: A ceramic capacitor with at least one semiconductor device mount hole, comprising a metal substrate and a dielectric ceramic layer provided with electrode layer on its surfaces and mounted on the substrate. At least the lateral surface of the mount hole in the electrode layer bound to the substrate is covered with an insulating material. The ceramic capacitors have good thermal conductivity and adapted to be used with semiconductor devices designed for power applications.

Abstract: An improved current amplifier, of the type having input, output and common terminals and which is subject to having widely dissimilar voltages at its input and output terminals has field-effect master and slave transistors formed in a region of semiconductor substrate having an impurity concentration gradient such that the material resistivity increases in a direction into the substrate and provided with relatively deep drain extensions.

Abstract: An amplifier-oscillator frequency multiplier apparatus utilizing a pair of servo-connected amplifiers which are electronically switchable to provide either a coherent amplifier or a non-coherent oscillator.

Abstract: A field effect transistor (FET) is comprised of a plurality of unit transistors having a common gallium arsenide substrate with an N-type active region. Each unit transistor is comprised of a unit gate, a unit drain and a unit source. The FET is mounted in a flip-chip carrier that connects all of the unit sources together to form a first electrode of the FET. Additionally, the first electrode is connected to ground by the carrier. All of the unit drains are connected together on the substrate to form a second electrode of the FET. The FET is reverse biased to cause a current to flow from the first electrode to the second electrode, whereby the first and second electrodes are a drain and a source, respectively, of the FET.

Abstract: An operational amplifier wherein each of the active elements is comprised of complimentary coupled pairs of insulated gate type field effect transistors is provided. A first active stage and a second active stage are coupled together to perform a predetermined transfer function. Each active element in the first and second stages are insulated gate type field effect transistors that are coupled in complementary pairs with the first stage and second stage being coupled to define mirror pairs.

Abstract: A power transistor in the final stage of an IC amplifier feeding a reactive load, such as a loudspeaker, has an emitter resistor connected across the input of a monitoring transistor by way of a diode, the monitoring transistor being part of a protective circuit which reduces the input signal to the power amplifier in the event of an overload. To retard the response of the protective circuit, for the purpose of preventing signal distortions in the event of brief power surges, the diode and the monitoring transistor are so disposed on the silicon chip of the amplifier that a thermal wave from the overheating power transistor will first strike the diode, thereby reducing its resistance to compensate for an increased voltage drop across the emitter resistor, and will reach the monitoring transistor with a certain delay; if the overload persists, the resulting increase in the conductivity of the monitoring transistor re-establishes the full sensitivity of the protective circuit.

Abstract: In a preamplifier having integrated circuitry, the improvement where the active elements of the first stage amplification of the preamplifier and the resistor which establishes the current flowing through these active elements are mounted on the outside of the integrated circuitry and the connecting terminals for the active elements and resistor are disposed with the remaining preamplifier components inside the integrated circuitry.

Abstract: A low inductance resistor comprising a metalized, planar silicon wafer, positioned beneath the emitter tabs of an RF power transistor to provide dc balancing and stabilization and thus eliminate the need for more costly collector feedback circuits.

Abstract: A broad-band radio-frequency amplifier is characterized by a gain which may be adjusted over a relatively large range, and which remains stable over the range of gain adjustments. The amplifier includes first and second transistor pairs each arranged in a cascode connection; a feedback capacitor connected across the output and input of each cascode pair; and inductance serially included at selected circuit points. Also disclosed is a hybrid circuit for efficiently implementing the amplifier.

Abstract: A horizontal junction-type field effect transistor having a saturated drain current to drain voltage characteristic and constituting an input transistor and a vertical junction-type field effect transistor having an unsaturated drain current to drain voltage characteristic and constituting an output transistor are connected in cascode fashion to compose a compound field effect transistor.This compound field effect transistor has a saturated characteristic, a high transconductance gm and a high breakdown voltage resembling those of a pentode vacuum tube.This compound field effect transistor is constructed in the form of monolithic integrated circuitry by the combined use of the dielectric isolation technique utilizing mesa groove and the pn-junction isolation technique.

Abstract: An interface circuit for interconnecting an integrated injection logic (I.sup.2 L) portion of an integrated circuit to a linear portion of an integrated circuit. The circuit transfers both logic information and I.sup.2 L current level references from the I.sup.2 L circuitry to the linear circuitry at the relatively large voltage levels present in linear circuitry. One embodiment employs a cascode arrangement involving one transistor, two diodes and a resistor. Another embodiment utilizes the matching characteristics of a pair of transistors operating in the forward and reverse modes respectively to perform the function with only one transistor.

Abstract: The push-pull stage contains a special double emitter transistor which prevents current spikes during switch-over transition. One of two emitters is connected to the base of the double emitter transistor. The junction area of this emitter is many times greater than that of the other emitter.

Abstract: An integrated circuit degenerative feedback current amplifier has at least two amplifier stages and a degenerative feedback branch connected from the amplifier input to the amplifier output. An active element of the last amplifier stage has its output circuit subdivided in such a way that a subdivision of the output current results whereby a first partial current is guided via the degenerative branch and a second partial current is guided into the amplifier output.

Abstract: A low level, low power, direct coupled integrated class B amplifier having a dual channel three stage preamplifier and a pair of output transistors, one for each channel. In each channel, a DC negative feedback loop connects the collector of the last stage preamplifier transistor to the base of the first stage preamplifier transistor to regulate the DC levels, and a resistive AC negative feedback loop connects the output transistor collector to the first preamplifier transistor collector to reduce the gain dependence of the channel on the current through the output transistor, thus enabling very low idle currents for the output transistors and also providing low distortion output. The resistor in each AC feedback loop is a floating tub resistor to enable it to be taken more than 0.6 volts above the battery voltage. Common mode rejection is provided for at least two of the three preamplifier transistors of each channel.

Abstract: The disclosed linear amplifier comprises a grounded N.sup.+ semiconductor substrate on which an N layer is epitaxially grown. The N epitaxial layer includes three separate P diffusion regions. One of the outermost regions is connected to an input terminal and includes an N diffusion region to form an input, common emitter NPN transistor with the epitaxial layer while forming a feedback, common base PNP transistor with the intermediate P diffusion region and epitaxial layer. The remaining P region forms a load, common base PNP transistor with the intermediate P region and epitaxial layer and is connected to an injector terminal. The intermediate P region and N region are connected to an output terminal.

Abstract: A wide bandwidth characteristic is provided for use as in a negative feedback amplifier by a deposited resistor arrangement. The arrangement includes a basic feedback resistor having a high resistance value and a narrow elongated shape. Closely positioned on the same substrate and physically parallel are one or more low value resistors having the same length and with adjacent points on the respective resistors being at the same electrical potential. The feedback capacitance is greatly reduced by the extra length. The capacity to ground, and thus the displacement current, is essentially eliminated since most of the stray capacitance is between points of equal potential.

Abstract: A new integrated circuit in which bias currents are supplied by means of a current injector, a multi-layer structure in which current is supplied, by means of injection and collection of charge carriers via rectifying junctions, to zones to be biased of circuit elements of the circuit, preferably in the form of charge carriers which are collected by the zones to be biased themselves from one of the layers of the current injector. By means of said current injector circuit arrangements can be realized without load resistors being necessary, while the wiring pattern may be very simple and the packing density of the circuit elements may be very high. In addition a simple method of manufacturing with comparatively few operations can in many cases be used in particular upon application of transistors having a structure which is inverted relative to the conventional structure.

Abstract: Source-coupled first and second FET's arranged to receive input signal potential between their gate electrodes have their respective drain electrodes coupled to the base electrodes of first and second bipolar transistors. The collector electrode of the first and second bipolar transistors are connected to the source electrodes of the first and second FET's, respectively. The emitter electrodes of the first and second bipolar transistors supply balanced output signal currents.

Abstract: Circuitry for providing temperature-compensated regulation of the voltage between first and second terminals includes a first, shunt regulator transistor with emitter and collector connected to the first and second terminals, respectively, and a direct coupled degenerative feedback connection between the second terminal and the base of the first transistor. This feedback connection includes a second transistor of the same conductivity type as the first transistor connected in common base-amplifier configuration, with a positive-temperature-coefficient offset potential being maintained between the second terminal and the emitter of the second transistor, with a negative-temperature-coefficient being applied between the first terminal and the base of the second transistor, and with a predetermined flow of current being maintained between the second terminal and the collector of the second transistor, which collector is direct-coupled to the base of said first transistor.

Abstract: An integrated power amplifier, composed of a multiplicity of elemental transistors epitaxially grown on a semiconductor chip, has base, emitter and collector terminals each connected in parallel to corresponding electrodes of the several elemental transistors. Each elemental transistor comprises two active emitter zones on opposite sides of a central contact zone conductively linked therewith by restricted connecting zones within the substrate, the contact zones of these transistors carrying emitter electrodes which are connected by a metallic strip to the emitter terminal.

Abstract: An improved hearing aid utilizing integrated field-effect transistors to reduce the size and power consumption thereof is provided. The hearing aid includes a microphone input device for producing signals representative of sound, an amplifier circuit for amplifying the signals produced by microphone input device, and a loudspeaker output device for producing sound representative of the sound sensed by the microphone input device at an amplified level. The invention is particularly characterized by a portion of at least the microphone input device, amplifier circuit and/or microphone output device being formed of MOS field-effect transistors.

Abstract: An integrated circuit including an FET and an analog for cancelling input current that would otherwise be required to supply the FET gate leakage current. The analog establishes a leakage current the magnitude of which is a substantially fixed proportion of the FET leakage current over a given operating range, and employs proportional current mirror means referenced to the analog leakage current to supply the FET leakage current and thereby substantially cancel the input bias current. In a preferred embodiment the analog comprises a lateral PNP multi-collector transistor with one collector connected to its base to establish a reference current, another collector providing the cancellation current, and its base voltage tracking the FET gate voltage so that the two leakage currents remain substantially equal. An analog FET may also be employed to cancel gate-to-drain and gate-to-source leakages. A description of the invention as applied to an operational amplifier is given.

Abstract: Current mirror amplifiers, which exhibit greater current attenuation (or gain) than prior art current mirror amplifiers taking up the same area on a monolithic integrated circuit die, are described in which the base-emitter junctions of the mirroring transistors are dissimilar in profile.

Abstract: A differential circuit including in a monolithic semiconductor chip a pair of differential amplifying elements having each one electrode connected in common and to a common diode means and respective input and output electrodes, another diode means connected to the output electrode of one of said amplifying elements, one transistor having an input signal electrode connected to one end of said common diode means to allow the passage of a current of half the magnitude of that through said common diode, another transistor having an input signal electrode connected to one end of said another diode means to allow the passage of a current of equal magnitude as that through said another diode means, and an output terminal connected to said one and another transistors.

Abstract: A three-terminal current amplifier has a current gain substantially independent of the forward current gains of its component transistors. It employs a first transistor with collector-to-base feedback regulating its collector current flow to equal applied input current and a second transistor having a base emitter circuit in parallel with that of the first transistor. Output current from the collector electrode of the second transistor consequently is proportional to the input current. Means are provided for maintaining the collector potentials of the first and second transistors substantially equal to help maintain a fixed relationship between the output and input current amplitudes.