Abstract: A small aspect ratio, high power MMIC amplifier is disclosed. The small aspect ratio MMIC amplifier is capable of achieving the same power levels as conventional power amplifier designs, but with an aspect ratio of near 1:1, versus 4:1 of conventional power amplifiers. The small aspect ratio MMIC amplifier layout uses two different types of FETs, with all gate fingers of both types of FETs running in the same direction. One type of FET is a conventional FET, in which the gate stripes run parallel to the direction of the output. In the conventional FET, the gate manifold and the drain manifold both generally extend in the x-direction (parallel to each other). The other type of FET has gate fingers that run perpendicular to the direction of the output. In this other type of FET, the gate manifold generally extends in the x-direction, while the drain manifold generally extends in the y-direction (perpendicular to each other).

Abstract: A low noise amplifier (82) for use in a wireless telecommunications system. The amplifier (82) includes an amplifying device (90), such as an FET, and a plurality of oscillation stabilization components monolithically integrated on a common substrate (132). The stabilization components reduce the gain of the amplifying device (90) at high frequencies to prevent high frequency oscillations. The substrate (132) is on the order of 4 mils thick, so that the operation of the stabilization components are predictable at high frequencies.

Abstract: A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The capacitors are configured so as to substantially equalize like sense and unlike sense coupling between adjacent channels, leading to cancellation of crosstalk signals.

Abstract: An integrated circuit including a resistor that at least partially overlies a first tub of semiconductor material of a first polarity, where the first tub is formed in a second tub of semiconductor material having the opposite polarity, and the second tub is formed in a semiconductor substrate having the first polarity. The second tub forms the base of a vertical bipolar transistor, the first tub forms the emitter of the transistor, and the substrate forms the collector of such transistor. Where the vertical transistor is a PNP transistor, the first tub is the emitter and consists of P-type semiconductor material, the second tub is the base, and the substrate is the collector. Preferably, the resistor is a strip of polysilicon or a set of multiple, series-connected polysilicon segments. Typically, the integrated circuit is an amplifier and the resistor is a gain-setting resistor.

Abstract: The present invention provides a signal amplification circuit used in a portable communications device. The signal amplification circuit has an input circuit for supplying input signals, an output circuit for outputting amplified signals, and a capacitor with a top surface and a plurality of bottom surfaces. The signal amplification circuit further includes a plurality of amplification units electrically connected between the top surface and the output circuit, and a bias voltage circuit electrically connected to the top surface for supplying a direct current bias voltage to the amplification units. When an input signal passes into the bottom surfaces of the capacitor, the input signal is coupled with the top surface of the capacitor and passes to the output circuit through the plurality of amplification units to generate an amplified output signal.

Abstract: A parasitically compensated resistor (50) for integrated circuits includes a substrate (52). A polysilicon resistor (54) is formed in the substrate (52). The polysilicon resistor (54) has a first end connected to a first lead (56) and a second end connected to a second lead (58). A conductive layer (62) is capacitively connected to the polysilicon resistor (54).

Abstract: Gain and bandwidth enhancement of a RF power amplifier package is effected by electrically coupling a power transistor to a RF signal source with an inductance, and further electrically coupling the input and common element terminals of the power transistor with a shunt inductance. The shunt inductance is chosen such that its reactance is the conjugate of the reactance of the power transistor's common-input capacitance. A similar conjugate matching output circuit is provided to electrically couple the transistor's output and common element terminals to a load. The shunt inductors are implemented on the package substrate by connecting the respective input and output transistor terminals to grounded shunt caps via bond wires.

Abstract: In a high-frequency circuit having bias lines that cross a microstrip line in a plan view, portions of the bias lines are formed on a reverse side of a substrate without forming, in the microstrip line, capacitors required for separating the bias lines from each other as an independent DC line, thus contributing to miniaturizing the high-frequency circuit.

Abstract: A radio-frequency amplifier comprises slot lines formed in a top electrode which are bent to define matching segments that are perpendicular to transmitting segments. The matching segments have a length corresponding to one-quarter of the wavelength of a signal to be amplified and are at least partially perpendicular to the transmitting segments. A DC-cut circuit comprising slot lines is connected to the matching segments, an FET is connected to the transmitting segments and the matching segments, and respective matching circuits serve as an input unit and an output unit of the FET. Source terminals of the FET are connected to parts of a top electrode that do not lie between the segments. A drain terminal and a gate terminal are connected, to be electrically separated from each other, to parts of the top electrode, which are electrically separated from the source terminals by the DC-cut circuit, the transmitting segments, and the matching segments.

Abstract: A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The capacitors are configured so as to substantially equalize like sense and unlike sense coupling between adjacent channels, leading to cancellation of crosstalk signals.

Abstract: Gain and bandwidth enhancement of a RF power amplifier package is effected by electrically coupling a power transistor to a RF signal source with an inductance, and further electrically coupling the input and common element terminals of the power transistor with a shunt inductance. The shunt inductance is chosen such that its reactance is the conjugate of the reactance of the power transistor's common-input capacitance. A similar conjugate matching output circuit is provided to electrically couple the transistor's output and common element terminals to a load. The shunt inductors are implemented on the package substrate by connecting the respective input and output transistor terminals to grounded shunt caps via bond wires.

Abstract: In conventional cases, when connecting a capacitor having a low equivalent series resistance (ESR) to an output terminal of a semiconductor device as a phase compensation capacitor, an external resistor connected in series therewith is required. A semiconductor device of the present invention comprises a resistor that is formed within the semiconductor device and of which one end is connected to the output terminal for compensating for a low ESR component, and a capacitor connection terminal to which another end of the resistor is connected. The resistor thus arranged compensates for the low ESR component of a low-ESR capacitor that is connected externally to the capacitor connection terminal.

Abstract: An integrated RF power amplifier 20 includes an on-chip input transformer (24) and an on-chip output transformer (28). Each of the transformers (24, 28) is formed from four spirals. Each primary winding (34, 42) and each secondary winding (38, 44) includes positive and negative spirals arranged so that positive current rotates in opposing rotational directions in the positive and negative spirals. The secondary winding (38) of the input transformer (24) and the primary winding (42) of the output transformer (28) each has a center tap (48, 50) located at the electrical and physical center of the winding. Positive and negative amplifiers (26) couple between the secondary winding of the input transformer (24) and the primary winding of the output transformer (28). DC biasing for the amplifiers (26) is provided through the positive and negative spirals of the center-tapped windings (38, 42) from the respective center taps (48, 50).

Abstract: With emergence of Bluetooth™ and other wireless standards, it has become increasingly desirable and practical to use low-cost wireless links, instead of cables, between devices, such as computers, printers, and personal digital assistants. Vital to these wireless links are the amplifiers that receive transmitted signals. One amplifier form, known as a common-gate amplifier, generally includes bias circuitry that requires large areas of an integrated-circuit chip or increases power usage and adds noise. Accordingly, the inventor devised an exemplary common-gate amplifier that includes an inductor coupled between the gate and drain of an amplifying transistor. The inductor acts as a short circuit at low frequencies, forcing the transistor to function at these frequencies as a diode and thus reduces the need for further bias circuitry. Other inventive embodiments include wireless receivers, transceivers, programmable integrated circuits, and electronic devices that incorporate the exemplary amplifier.

Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

Abstract: A MMIC power amplifier having a smaller die size and higher power output are realized with the improved amplifier and transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” In a shared input configuration, a compensation network may be coupled to the input. The improved FET configuration reduces the number of splitting and combining networks by up to 50% over the prior art and the die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art. The improved amplifier configuration provides a multi-sectional configuration wherein one section may be the mirrored image of another. In a two section amplifier, the amplifier appears to be “folded.

Abstract: A MMIC (microwave monolithic integrated circuit) power amplifier and method for the same is provided. A smaller die size and higher power output are realized with the improved amplifier and transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” The improved FET configuration reduces the number of splitting and combining networks by up to 50% over the prior art and the die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art. The improved amplifier configuration provides a multi-sectional configuration wherein one section may be the mirrored image of another. In a two section amplifier, the amplifier appears to be “folded.

Abstract: A MMIC (microwave monolithic integrated circuit) power amplifier and method for the same is provided. A smaller die size and higher power output are realized with the improved transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” The improved configuration reduces the number of splitting and combining networks by up to 50% over the prior art. The die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art.

Abstract: A MMIC (microwave monolithic integrated circuit) power amplifier and method for the same is provided. A smaller die size and higher power output are realized with the improved amplifier and transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” The improved FET configuration reduces the number of splitting and combining networks by up to 50% over the prior art and the die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art. The improved amplifier configuration provides a multi-sectional configuration wherein one section may be the mirrored image of another. In a two section amplifier, the amplifier appears to be “folded.

Abstract: There is provided a high-frequency semiconductor device having an amplifier circuit, which amplifier minimizes deterioration of a high-frequency characteristic and attains high thermal stability. A driver stage of a power amplifier is formed so as to assume a multi-stage configuration by means of connecting multi-finger HBTs in shunt with each other, each multi-finger HBT comprising a single emitter. An output stage is formed so as to assume a single stage configuration by means of connecting multi-finger HBTs in shunt with each other, each HBT comprising two emitters. As a result, while an increase in capacity of p-n junction between an emitter layer and a base layer of the driver stage is prevented, thermal nonuniformity arising in the output stage is minimized. Thus, a power amplifier as a whole is configured with high thermal stability without deterioration of a high-frequency characteristic of the power amplifier.

Abstract: A semiconductor device is provided having a high-frequency amplifying bipolar transistor (10) with its emitter electrode grounded. A current mirror circuit including a bipolar transistor (20) supplies the transistor (10) with a base potential as bias voltages for operating as a Class B or Class AB amplifier. A thermal linkage is established between the transistor (10) and the transistor (20) to reduce a difference between their junction temperatures. A metallic layer (4) is provided as a means for establishing the thermal linkage. The transistor (20) is provided between fingers (1A) and (1B) of the transistor (10) as another means for establishing the thermal linkage. A distance between the transistor (20) and one of the fingers (1A) and (1B) of the transistor (10) is made smaller than the thickness of a semiconductor substrate (7) on which the transistors are formed as other means for establishing the thermal linkage.

Abstract: A semiconductor integrated circuit device comprises a multiple-stage amplifier including a plurality of transistors. The multiple-stage amplifier has a first stage comprising a plurality of bipolar transistors each having a single emitter structure. The bipolar transistors are connected parallel to each other. The semiconductor integrated circuit device can easily be designed, is of a self-aligned structure, and has a single transistor size. The semiconductor integrated circuit device may be used as a low-noise, high-power-gain high-frequency amplifier.

Abstract: The power delivered by an RF power transistor having cascaded cells or unit elements is improved by reducing the phase imbalance between elements and thereby reducing transverse effects between cells. Phase imbalance is reduced by varying the number of transistor elements connected to interconnect areas, connecting wire bonds to an input transmission line concentrated near an outer edge in the transmission line to take advantage of surface skin effects on current, and varying the surface area of the interconnect areas to adjust input impedance and output impedance of each cell.

Abstract: An input terminal of an amplifier circuit is connected to a base terminal of an amplifying transistor, and is also connected to one of the terminals of capacitor via a first wiring. An output terminal of the amplifier circuit is connected to a collector terminal of the amplifying transistor, to the other terminal of the capacitor via a second wiring and also to a source voltage via a load resistor. An emitter terminal of the amplifying transistor is connected to ground via a feedback resistor. The second wiring connecting the other terminal of the capacitor and the collector terminal of the amplifying transistor is formed to intersect a cutting line, or a so-called grid line, of the wafer which is used as reference for dicing the wafer into chips.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: An integrated circuit preamplifier amplifies an input signal comprising first and second differential input signals to provide an amplified output signal comprising first and second differential output signals. A biasing circuit of the preamplifier provides a bias current. An open-loop differential amplifier of the preamplifier is coupled to the biasing circuit. The differential amplifier includes a differential amplifier pair having first and second differential amplifying transistors, which are coupled at respective gate terminals to the first and second differential input signals. Each of the amplifying transistors are coupled in open-loop configuration at a drain terminal to a respective load resistor coupled to ground, and the source terminals of the amplifying transistors are coupled together to receive the bias current. The first and second differential output signals are formed across the respective first and second load resistors.

Abstract: RF voltage amplifier circuits which have high voltage amplifier gain and input signal frequency range, and a method for boosting the voltage amplifier gain and input signal frequency range in such circuits is provided. A method includes the steps of providing a voltage amplifier having a transistor with the grounded source and the drain connected to a power supply via a resistive load, and providing an integrated inductor for biasing the transistor, having an inductor connecting an input signal terminal to the gate of the transistor and a capacitor connecting the gate and the source of the transistor. The next step includes selecting a resonant frequency of the integrated inductor at a frequency where the voltage amplifier gain is starting to roll-off, for boosting the voltage amplifier gain and the input signal frequency range. The integrated inductor preferably operates at a resonant frequency approximately matching the roll-off frequency of the voltage amplifier.

Abstract: The present invention discloses a single-ended signals to differential signals converter. In this invention, a first circuit comprising a transistor outputting single-ended signals and a first spiral inductor connected as an inductor for load use that contributes in determining frequency characteristics of a first circuit to either one of output terminals of higher voltage side and lower voltage side of the transistor, and a second circuit comprising a pair of differential input terminals for inputting differential signals and a second spiral inductor that is magnetically coupled with the first spiral inductor, and both ends thereof are connected to the differential input terminals, respectively, are formed within a monolithic integrated circuit.

Abstract: An amplifier circuit containing at least one output stage transistor, a circuit for compensating for quiescent current drifts and optionally components for driving the output stage transistor. The circuit for compensating for quiescent current drifts has at least one reference current field-effect transistor with a gate electrode where the gate electrode is disposed in a region of the electrodes of the output stage transistor. Additionally, the reference current field-effect transistor is situated on a common chip area with the output stage transistor. Furthermore, the use of the above amplifier circuit in mobile radio systems is described.

Abstract: A semiconductor device for high-frequency power amplification includes a pair of first and second composite transistors each comprised of parallel-connected transistor cells each having parallel-connected transistor elements. The number of the transistor cells is selected to satisfy a requirement on the power capacity of the device. The two composite transistors form a power amplifier circuit for balanced-inputting and performing power amplification of a high-frequency signal. The transistor cells of the composite transistors are alternately formed on a semiconductor substrate on which electrode wiring patterns extending in the transistor-cell arraying direction are formed. Respective electrodes of transistor elements are collectively connected, composite-transistor by composite-transistor, to these patterns.

Abstract: A transistor device having a plurality of transistor cells. Each one of the cells has a control electrode for controlling a flow of carriers through a semiconductor. The device has an input node. A plurality of filters is provided. Each one of the filters is coupled between the input node and a corresponding one of the control electrodes of the plurality of transistor cells. In one embodiment of the invention, pairs of the control electrodes are connected to a common region and wherein each one of the filters is coupled between the input node and a corresponding one of the common regions. The semiconductor provides a common active region for the plurality of transistor cells.

Abstract: Solid-state image pickup devices having source follower buffer circuits therein include load impedance control circuits that boost gain. The source follower buffer circuit comprises a drive transistor and a load transistor that are electrically connected in series (i.e., source-to-drain) between a first reference potential (e.g., Vdd) and a second reference potential (e.g., Vss). The input of the drive transistor is electrically connected to an input terminal. The source follower circuit provides a high impedance path to an input signal Vin and a less than unity voltage gain at an output terminal (i.e., Vout<Vin). The load impedance control circuit improves the voltage gain characteristics of the source follower circuit by automatically increasing the impedance of the load transistor when the output voltage increases in response to an increasing input voltage. As the output voltage increases, the on-state resistance of a pull-down transistor in the load impedance control circuit decreases.

Abstract: A power output circuit is constructed as a distributed amplifier (21) with sufficient stages to make it practical for use as part of a transmitter, while also being integratable as part of a single-chip RF transceiver (72).

Abstract: A current mirror bias circuit for an RF amplifier transistor is modified whereby the reference transistor of the current mirror tracks hot carrier degradation in the RF transistor. Gate bias to the current mirror transistor is modified whereby the drain-to-gate voltage can be positive, and the lightly doped drain region in the lateral n-channel reference transistor is shortened and dopant concentration increased to increase the electric field of the reference transistor to provide the hot carrier injection degradation characteristics similar to the main transistor. Additionally, the gate length of the reference transistor can be shortened to effect the hot carrier injection degradation.

Abstract: The low noise amplifier (LNA) of the present invention comprises an input stage including an input inductor and an input circuit portion. The input circuit portion is operably connected to the input inductor and includes an input gain portion. The LNA further comprises an output stage that is operably connected to the input stage. The output stage includes an output inductor and an output circuit portion. The output circuit portion is operably connected to the output inductor and includes an output gain portion. The input and output inductors are distinct, off-chip components. However, the input circuit portion and output circuit portion are fabricated on a single, integrated circuit chip with CMOS technology. The input stage includes an input impedance that is matched to a system impedance while the output stage includes an output impedance that is matched to a system impedance.

Abstract: The present invention relates to an amplifier having high amplification efficiency. Amplification efficiency at low output is improved by reducing current at a latter stage depending on output power at the time when output power is reduced by gain control. In order to accomplish this improvement, gain control voltage applied to a gain control circuit for controlling the gain of a signal-amplifying field-effect transistor in a former stage is also applied simultaneously to a bias voltage control circuit for controlling the voltage between the gate and source of a signal-amplifying field-effect transistor in the latter stage, the voltage between the gate and source of the signal-amplifying field-effect transistor in the latter stage is controlled depending on the gain of the signal-amplifying field-effect transistor in the former stage to control the current between the drain and source of the signal-amplifying field-effect transistor in the latter stage.

Abstract: A power amplifier for microwave signals, the amplifier comprising a plurality of identical transistors, wherein: the grid buses of two adjacent transistors are interconnected by a grid matching circuit; the drain arrays of two adjacent transistors are interconnected by a drain matching circuit; the grid matching circuits are selected in such a manner as to ensure input levels to each transistor that are identical in amplitude and in phase; and the drain matching circuits are selected in such a manner as to present each transistor with optimum power impedance. The amplifier input is on the grid bus of a transistor at one end of the series connection of transistors and the amplifier output is on the drain array of a transistor at the other end of the series connection of transistors. It is thus possible to assemble an arbitrary number of transistors in a power amplifier, while providing an amplifier that occupies a smaller area.

Abstract: An radio frequency (RF)/microwave power amplification circuit is disclosed herein having improved power and frequency characteristics. The RF power circuit is characterized by having the output capacitance of the device resonate with a shunt inductance that is physically closer to the device than provided in conventional RF power circuits. This is realized by mounting a direct current (DC) bypass capacitor directly on the same metalized pad that the device terminal is mounted on. By doing this, the inductance associated with a wire bond connection from the device to the capacitor is eliminated or at least reduced. Also disclosed is a dual cell power circuit that consists of matching the impedance characteristics of the active cells to each other by adjusting the circuit parameters in which the active devices interact with.

Abstract: A power amplifier uses a plurality of solid-state amplifiers (FIGS. 2 and 3, 140) arranged in a parallel manner to form a power amplifier module (10). Each solid-state amplifier is adhered to a low thermal expansion insert (130). The insert is then coupled to a low cost aluminum substrate in order to carry the excess heat from each solid-state amplifier (140) to the aluminum housing. The power outputs from the solid-state amplifiers from each module are combined with the power outputs from other modules using electroformed waveguide combiners (FIG. 1, 30, 40).

Abstract: A shunt feedback circuit path for use in high frequency amplifiers fabricated as a transmission line coupled to ground at one end and coupled to the shunt feedback transmission line of the amplifier at the other end. The shunt feedback transmission line has a first and second resistive element and a first and second capacitive element. A quarter-wavelength transmission line is used to transform the impedance coupled to one end with respect to the other end. The impedance as seen from one end of the line is a function of the characteristic impedance of the line. Therefore, by selecting the characteristic impedance the transmission line can be used to affect the impedance of the feedback path so the transmission line appears as an inductor of reactance equal to the characteristic impedance of the quarter-wavelength transmission line and reduces the overall effective length of the feedback path.

Abstract: An object is to obtain an amplification circuit which provides a high gain even with a low-voltage power supply. The amplification circuit comprises an MOS transistor (M1) having a gate receiving an amplified signal (RFin), a source electrically connected to ground, and a drain electrically connected to a supply voltage (VDD), wherein the back gate-source voltage (Vbs) of the MOS transistor (M1) is made larger as the gate-source voltage (Vgs) of the MOS transistor (M1) becomes larger, thereby making the threshold voltage (VT) of the MOS transistor (M1) smaller.

Abstract: A cascode amplifier formed as an integrated circuit on a III-V substrate. The substrate has a pair of elongated active regions formed along a pair of laterally spaced active regions of a surface of the substrate. Each one of the active regions has formed therein a plurality of electrically interconnected transistor cells. The transistor cells in a first one of the active regions are interconnected in a common emitter configuration and the plurality of transistor cells in a second one of the active regions are interconnected in a common base configuration. A plurality of first resistors is disposed over the surface of the substrate, each one of the resistors having a first electrode adapted for coupling to ground potential and a second electrode connected to emitter regions of a corresponding pair of adjacent transistor cells formed in the first one of the regions.

Abstract: An amplifier (1) of improved linearity has a predistortion, bipolar junction device (4), and a transistor (2) on an input side of the amplifier (1), the bipolar junction device (4) being smaller in size than the transistor (2), and having its bipolar junction of opposite polarity with that of the transistor (2), to cancel distortion in an output of the first stage transistor (2).

Abstract: An amplifier is constructed having a FET formed in a substrate with its gate coupled to a first voltage terminal. A second FET formed in the substrate is coupled both to the first FET and to a second voltage terminal. The second FET has its gate directly coupled to its body. The second FET electrically isolated from the substrate. An input node at the coupled gate-body receives an input signal. An output node between the first and second FETs outputs a signal in response to the input signal.

Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite the first main surface; a semiconductor chip amplifying a high frequency signal and including semiconductor cells on the first main surface, each semiconductor cell including semiconductor components and being connected to a gate pad and a drain pad, each semiconductor component having an electrode; internal matching circuits; a harmonic matching circuit for each semiconductor cell and connected between the semiconductor chip and one of the internal matching circuits, the harmonic matching circuit including a capacitor and an inductor; and a package enclosing the semiconductor substrate, the semiconductor chip, the internal matching circuits, and the harmonic matching circuit. In this structure, since harmonics are processed in each semiconductor cell, the phases of the harmonics processed in the semiconductor cells are uniform.

Abstract: A high power grounded-drain source follower RF amplifier circuit employs a high voltage MOSFET. The RF signal at the input is applied with respect to ground via an isolation transformer whose secondary feeds the signal between gate and source. The output is taken from the source with respect to drain, which is grounded. A 13.56 MHz 3 KW power amplifier topology with isolated RF input drive for each MOSFET die uses a pair of kilowatt power transistors or KPTs, in which there are multiple large area MOSFET dies, with the drain regions of the dies being formed over a major portion of the die lower surface. The drain regions are in direct electrical and thermal contact with the conductive copper flange. The source and gate regions are formed on the dies away from the flat lower surface. One or more pairs of multi-chip KPTs can be configured to design stable 2.5 KW, 5 KW and 10 KW RF plasma generators at 13.56 MHz.

Abstract: A differential amplifier comprises an n-channel MOS transistor to the gate of which an input voltage VIN1 is fed, and an n-channel MOS transistor to the gate of which an input voltage VIN2 is fed. A p-channel MOS transistor arranged in such a manner that, to the source thereof, a power source voltage Vcc is fed, and the gate and drain thereof are connected to the drain of the MOS transistor, and a p-channel MOS transistor arranged in such a manner that the gate thereof is connected to the drain of the MOS transistor, the drain thereof is connected to the drain of the MOS transistor, and the voltage at this drain is outputted as an output voltage VOUT, and the output current I of a constant-current source is set so that the transistors constituting a differential amplifier may operate in a weak inversion zone.

Abstract: In an on-chip source follower amplifier having at least one amplification circuit formed on a semiconductor substrate of a first conductivity type, the amplification circuit includes a driver transistor, a peripheral device, a first capacitance, and a high resistance. The driver transistor is formed in a first conductive region of a second conductivity type on the semiconductor substrate. The peripheral device is formed in a second conductive region of the second conductivity type on the semiconductor substrate. The second conductive region is isolated from the first conductive region. The first capacitance couples the first conductive region to a source of the driver transistor. The high resistance is connected between the first conductive region and a DC power supply.

Abstract: A linearized resistor for integrated circuits combines an N-type diffused resistor and a P-type diffused resistor. In one embodiment, the N-type and P-type diffused resistors are connected in series. In another embodiment, the N-type and P-type diffused resistors are connected in parallel. Two or more linearized resistors of the present invention may be used in IC circuits, such as voltage dividers, inverting amplifiers, single-ended operational amplifiers, and single-ended differential operational amplifiers. Linearized resistors of the present invention can be designed to have voltage coefficients smaller than conventional IC resistors having a single diffused resistor. As such, linearized resistors of the present invention can be designed to provide more uniform resistance over their operating voltage range than conventional IC resistors.

Abstract: An amplifying circuit has a feedback reactance element connected across a biasing feedback resistor and an input terminal for suppressing feedback of thermal noise generated by the biasing feedback resistor.