Abstract: A frequency multiplier circuit generates an supplemental high-frequency timing signal from a single, low-frequency current-controlled oscillator (CCO). The current-controlled oscillator (CCO) generates a controlled discharge current and a controlled bias current which are controlled in parallel to substantially eliminate inaccuracies in a characteristic frequency-current curve of the current-controlled oscillator. The frequency multiplier circuit generates a high-frequency timing signal using the digitally-controlled CCO and avoids the usage of a phase-locked loop (PLL) technique. Specifically, a frequency multiplier includes a current-controlled oscillator having a plurality of input lines connected to receive a digital current select signal and having an output terminal connected to carry a timing signal at a current-controlled oscillator frequency f.sub.CCO set in accordance with the current select signal.

Abstract: A component detector circuit operates to detect the presence or absence of a circuit component, such as an external component. A resistor detecting circuit includes a biasing circuit connected to the resistor. The biasing circuit generating a bias current. The resistor detecting circuit also includes a bias current threshold detector connected to the biasing circuit and a circuit connected to the bias current threshold detector which generates a signal indicative that the bias current is lower than threshold. A capacitor detecting circuit includes a circuit connected to a resistor and configured to be connected to a capacitor which establishes a time constant proportional to an RC product of the resistor and capacitor.

Abstract: A low power RC oscillator includes a low power bias circuit and an RC network. The RC network is used to form a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

Abstract: An RC oscillator operates at very low current levels and manifests very brief internal component delays. The RC oscillator does not employ a conventional comparator and a conventional hysteresis circuit for changing reference voltages on the comparator. Instead, the RC oscillator includes a plurality of amplifiers. Hysteresis is achieved by changing the threshold voltage of one of the amplifiers. The threshold voltage is changed by switching different current values through the transistor so that the current for activating the amplifier is different from the current for deactivating the amplifier.

Abstract: An accurate RC oscillator circuit (10) for generating a signal of a predetermined frequency that accurately oscillates between two precise voltage levels, i.e., a low threshold voltage (V.sub.L) and a high threshold voltage (V.sub.H). The oscillator circuit uses first and second comparators (16, 18) having their outputs respectively coupled to set and reset inputs of a flip flop (20). The output of the flip flop is coupled to a series RC network for controlling the charging and discharging of the voltage across a capacitor (14) of the RC network. The interconnection (12) of the series RC network is coupled to an input of both the first and second comparators. The other input of the first comparator is coupled to a circuit (24) for applying a modified version (V'.sub.H) of the high threshold voltage such that the signal generated by the oscillator circuit does not exceed the precise high threshold voltage (V.sub.H).

Abstract: A digitally-tuned oscillator (DTO) includes a digital-to-analog converter (DAC) and an RC oscillator. The RC oscillator includes an RC circuit for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

Abstract: An oscillation circuit is disclosed, which comprises an input stage, intermediate stage and output stage circuits which are coupled to one another. The input stage circuit is composed of a hysteresis inverter having a first threshold value and a second threshold value that is set between the first threshold value and the potential of a first power supply. The intermediate stage circuit includes an inversion circuit and a delay circuit that is provided between the hysteresis inverter and the inversion circuit. The output stage circuit includes an output terminal connected to the hysteresis inverter, a capacitor provided between the output terminal and the first power supply and an inverter circuit connected to the inversion circuit. The inverter circuit controls the charging and discharging of the capacitor to generate an oscillation output signal at the output terminal.

Abstract: A current source including a current mirror circuit and an active load circuit which form a reference branch, for setting a reference current value, and a mirroring branch, defining an output current value, connected between supply and ground. A voltage stabilizing transistor is interposed between the current mirror circuit and the load circuit in the reference branch only, and is so biased as to maintain its gate terminal at a predetermined voltage. As such, the potential with respect to ground of the drain terminal of the reference branch load transistor is fixed, so that its drain-source voltage drop (and the current through it) is substantially independent of supply voltage. The current source may be used to advantage in an oscillator for generating the: clock signal of a nonvolatile memory.

Abstract: A charge pump oscillator for regulating an oscillator frequency over a wide range of supply voltages is disclosed. Such a charge pump oscillator provides a charge pump system that provides a consistent current output over a range of supply voltages. The charge pump oscillator includes a reference circuit, a timing circuit, a latch circuit and a driver circuit.

Abstract: An oscillator comprises a comparator and first and second switches for alternately connecting first and second respective reference voltages to a first input of the comparator. A capacitor is connected to a second input of the comparator, and a current source and a current sink are alternately connected to the capacitor via third and fourth switches. The first and third switches are closed simultaneously based on one output level of the comparator, and the second and fourth switches are closed simultaneously based on the other output level of the comparator. This causes the output of the compartor to alternate and thereby generate an oscillation signal. To provide precision in the duty cycles, either the second reference voltage, the current source or the current sink is adjusted to maintain desired duty cycles of the high and low levels output from the comparator.

Abstract: A frequency modulating system for frequency-modulating an input signal with a predetermined carrier frequency comprising a controller circuit and a frequency modulator is provided. The controller circuit includes an automatic frequency detecting circuit, a voltage controlled oscillator, an error current generator, a feedback clamping circuit, a deviation current generator, and an adder circuit generating a frequency deviation/carrier frequency correction signal provided to the frequency modulator. The frequency modulator modulates the frequency in response to an output of the controller circuit and includes an oscillator having the same structure as that of the voltage controlled oscillator.

Abstract: A triangular wave generator circuit having a triangular wave generator unit for generating a triangular wave signal, and a comparator for comparing the generated triangular wave signal with a predetermined level. The triangular wave generator unit controls the generated triangular wave signal in accordance with the comparison result by the comparator.

Abstract: A voltage controlled oscillator (VCO) which may be adjusted to provide oscillatory signals for a wide range of frequencies includes a relaxation oscillator in which a ramp signal is compared to a reference threshold which exhibits hysteresis. The frequency of the oscillator is changed by varying the hysteresis range of the threshold level and by changing the rate at which the ramp is generated. At higher frequencies, the signal processing delay through the comparator is a factor in determining the frequency of the signal produced by the oscillator. Current sources internal to the oscillator are controlled by a reference potential that is generated from an externally supplied band-gap reference potential. The VCO is used in a phase-locked loop which includes a charge pump circuit that accumulates charge on a capacitor responsive to limited-width pulses applied to a current source which is controlled by the reference potential generated in the VCO.

Abstract: An oscillator is provided for use in integrated circuits of the type that are employed in various, relatively low power, power management systems such as can be found in mobile communications systems and the like. The oscillator provides an output frequency that is highly stable over a range of conventional operational parameters. The oscillator provides a current generator that is comprised of a pair of NMOS transistors and a pair of PMOS transistors that are arranged such that the respective gates of each pair are connected to one another to establish current mirroring. The current generator is connected to a hysteresis circuit, which is operable to develop a potential difference in the circuit. The hysteresis circuit includes an NMOS transistor and a PMOS transistor that are respectively and correspondingly coupled to the current-mirroring NMOS and PMOS transistor pairs of the current generator.

Abstract: This invention relates to oscillators employing a primary feedback network and a high pass filter feedback network. The feedback networks are connected between the input and output of a of a high signal gain amplifier system. The primary feedback network provides positive feedback to cause oscillation to occur and also determines the nominal frequency of oscillation. The high pass filter feedback network provides a negative feedback signal that controls the rise and fall time of the amplifier system's output signal. By varying the output signal's rise and fall time the frequency of oscillation is also changed. The high signal gain amplifier system operates with one or more amplifier stages in the non-linear region to produce a significantly distorted sine wave or pulse output signal.

Abstract: A hysteresis circuit comprises a first logic section, a second logic section cascaded with the first logic section, and circuitry for controlling hysteresis threshold voltages of the hysteresis circuit. The hysteresis controlling circuitry conducts current from a source of a first supply voltage to the output lead of the first logic section during a low-to-high transition of an input voltage on an input terminal of the hysteresis circuit. The hysteresis controlling circuitry conducts current from the output lead of the first logic section to a source of a second supply voltage during a high-to-low transition of the input voltage on the input terminal of the hysteresis circuit. A clock generator integrated circuit chip employing the hysteresis circuit in a voltage controlled oscillator can generate squarewave signals of 150 MHz onto a plurality of output terminals when powered from approximately 3.3 volts throughout a 0 to 70 degree Celsius temperature range, a clock skew of less than 0.

Abstract: A current controlled oscillator includes an optocoupler driven by a control current; a diode bridge comprising four high speed diodes where the polarized input receives signals from an output transistor of the optocoupler; a resistor connected between the transistor output of the optocoupler and the polarized input of the diode bridge; an inverting Schmitt trigger having well defined low and high thresholds where the inverting input and an output are connected to a non-polarized input of the diode bridge; a timing resistor connected between the input and output of the Schmitt trigger; a timing capacitor connected between the negative input and ground of the Schmitt trigger; a pair of voltage references establishing the low and high thresholds of the inverting Schmitt trigger.

Abstract: An oscillator circuit includes a multiple output transconductance amplifier having a positive voltage input, a negative voltage input, and three current outputs. A first current output is coupled to the positive input, a second current output is coupled to the negative input, and a third current output provides the full logic voltage oscillator output signal. A resistor network is coupled to the positive voltage input of the transconductance amplifier. The first current output is used to generate a square wave signal at the positive voltage input. A capacitor is coupled to the negative voltage input of the transconductance amplifier. The second current output is used to generate a triangle wave signal at the negative voltage input. Both the square wave and triangle wave have a mean DC level centered halfway between the power supply rails of the transconductance amplifier.

Abstract: A fully differential voltage controlled oscillator having a large common mode rejection ratio is disclosed with a first and a second phase detector disposed between the output of a differential comparator and the input of a differential triangle wave generator to insure 180 degree out of phase operation.

Abstract: An electric circuit including a local oscillator circuit and which is adapted to prevent voltage transients. The oscillator circuit comprises two voltage sources which are alternately connected to respective electrodes of a capacitor. The capacitor electrodes are also connected, via respective load circuits, to a common reference node of the voltage sources. Thus, the respective voltage sources alternately generate mutually opposed currents in the capacitor, which currents charge and discharge the capacitor 20 to threshold levels, after which a switching control circuit interchanges the coupling of the voltage sources. In order to prevent a transient in the voltage level at the first capacitor electrode upon switching, a voltage control circuit provides a voltage difference between the voltages supplied by the voltage sources, which voltage difference corresponds to the charge voltage built up across the capacitor.

Abstract: A voltage controlled oscillator (VCO) (23) includes a periodic signal generator (30) such as a comparator (42)followed by a latch (43), and a logic gate such as a NAND gate (31) connected to the output of the latch (43) to adjust for asymmetries in the output signals from the latch (43). In one embodiment, the NAND gate (31) includes two pullup transistors (80, 81) receiving first and second output signals from the latch and connected between a first power supply voltage terminal and an output node (86). Two switching branches (82, 83 and 84, 85) each including two transistors are connected between the output node (86) and a second power supply voltage terminal. The order of the input signals received by the two transistors is reversed between the two switching branches (82, 83 and 84, 85) to compensate for any duty cycle asymmetries. A frequency divider (32) divides the output of the NAND gate (31) to complete the duty cycle adjustment.

Abstract: Common mode errors may be sensed and corrected by receiving an output signal 105-106 and comparing the output signal 105-106 with a predetermined signal level. When the output signal 105-106 is in a first relationship with respect to the predetermined signal level a source current is provided to a integrating element 110. If, however, the output 105-106 is in a second relationship with respect to the predetermined signal level, a sink current is provided to the integrating circuit element 110. Regardless of whether a sink or source current is provided to the integrating circuit element 110, the integrating circuit element 110 generates a common mode information signal 123 which is used to correct for common mode errors.

Abstract: A sawtooth oscillator includes a current source having an output coupled to a first capacitor for supplying it with a charge current (I). A discharge circuit discharges the first capacitor during a discharge period (TDS) in response to a voltage on the first capacitor. A second capacitor is coupled to the output of the current source. A switch interrupts the supply of charge current to the first capacitor during an interrupt period (TIS). Part of the charge current occurs during the discharge period (TDS). Subsequent to the interrupt period, the first capacitor receives a charge surplus built up by the charge current in the second capacitor. The current supply to the first capacitor is temporarily interrupted at least during a part of the discharge period. The second capacitor operates as an auxiliary capacitor in which a charge is stored which would otherwise have been supplied to the first capacitor.

Abstract: An R-C relaxation oscillator having two comparators and a silicon controlled rectifier dissipates very low average power without resulting in frequency instabilities due to circuit propagation delays. A timing capacitor C.sub.T is charged through a timing resistor R.sub.T. The first comparator compares the voltage across the timing capacitor with an upper threshold voltage V.sub.TH. When the voltage across the timing capacitor crosses the upper threshold voltage, the comparator turns on the silicon controlled rectifier, which causes the capacitor to discharge the voltage that it has stored. The second comparator turns off the silicon controlled rectifier when the voltage across the timing capacitor falls below a lower threshold voltage V.sub.TL.

Abstract: A low-frequency oscillator whose duty ratio can be simply controlled includes a charging and discharging circuit for charging a capacitor via a constant current source and then discharging the capacitor according to a discharge control signal. A voltage comparator compares the voltage across the capacitor with a reference voltage. A monostable multivibrator, triggered by the output of the voltage comparator, generates the discharge control signal. The duration of the discharge is determined according to the RC time constant of the monostable multivibrator, to thereby generate a rectangular waveform having an accurately controlled duty ratio.

Abstract: A switching boosting circuit including a clock oscillating circuit having a Schmitt trigger inverter, a boosted-voltage inducing circuit which is actuated in a switching-operation mode in response to the output clock of the clock oscillating circuit to induce a boosted voltage, a capacitor which is charged by the boosted voltage from the boosted-voltage inducing circuit to store energy to be supplied to a load, and a feedback path for feeding back current whose intensity corresponds to the load from the capacitor to the clock oscillating circuit. The feedback current acts such that the duty ratio of the switching operation is set to be smaller than a predetermined reference duty ratio, and the feedback path includes a Zener diode for reducing the boosted voltage below a predetermined value.

Abstract: A programmable VCO circuit (300, 700) and method of use are provided whereby a current proportional to the strength of the NMOS process used to fabricate the circuit may be subtracted from the control current derived at the circuit's input, to compensate for process variations. Also, a programmable VCO circuit (300) and method of use are provided whereby a current developed from one-half the supply voltage for the VCO circuit may be subtracted from the control current derived at the circuit's input, in order to cause programmed gain changes to occur about the center of the control voltage range, and minimize output "jitter" when the VCO is used in a phase-locked loop. A gain compensation circuit (800) is also provided to linearize the gain of the programmable VCO circuit (300) for higher control voltage levels and thereby extend the VCO's effective operating range.

Abstract: Charge pump including: a capacitor (4) which includes a first capacitor terminal (2) and a second capacitor terminal (8), a discharge switch (20) for discharging the capacitor (4) by the closing and opening of the discharge switch (20) in response to a first or second value respectively, of a clock signal (CS), a first current source (6) for supplying a first current (I1) to the first capacitor terminal (2), a comparator (12) whose first input (10) is connected to the first capacitor terminal (2) and whose second input (14) is connected to a reference voltage source (16) and which comparator generates a comparison signal (Vcomp) of which a first or second value denotes that the voltage (Vc) on the first input (10) is smaller or larger than the voltage on the second input (14), a current switch (24) passing a second current (I2) coming from the second current source (34) to an output terminal (28) once the clock signal (CS) has changed from the first to the second value, and prevents the second current (I2) fl

Abstract: A voltage control oscillation circuit comprises an oscillation loop and a control current generating circuit. The oscillation loop comprises: a first charge-discharge circuit including a first transistor circuit for converting a reverse voltage signal as a first input voltage into a first charge-discharge current according to a first conversion ratio, and a first capacitor which is charged and discharged by the first charge-discharge current for generating a first charge-discharge voltage signal; a second charge-discharge circuit including a second transistor circuit for converting the first charge-discharge voltage signal as a second input voltage into a second charge-discharge current according to a second conversion ratio, and a second capacitor which is charged and discharged by the second charge-discharge current for generating a second charge-discharge voltage signal; and a reverse circuit for reversing the second charge-discharge voltage signal into the reverse voltage signal.

Abstract: A constant current source is used to provide a constant current to set a delay which defines the period of the output of the oscillator. The delay is preferably set by charging a capacitor with the constant current. Because the current is independent of variations in V.sub.CC and temperature, the capacitor will charge for a given period. Therefore, the frequency or period of oscillation will also be fixed and independent of variation in V.sub.CC or temperature. A current limiting circuit and latch are provided to generate an output which will be transmitted through one or a series of inverters. In an alternate embodiment, a differential amplifier is provided between the delay circuit and the current limiting circuit. This differential amplifier is typically needed in a case where VCC is not well-controlled to provide an output signal which has an appropriate voltage. A method of generating an oscillating output for refreshing a DRAM and a method :for refreshing a DRAM are also disclosed.

Abstract: A variable frequency oscillator (19) and method of producing an oscillating signal are provided in which a current mirror (12) receives a control current and generates a mirrored current. A capacitor (20) is coupled to the current mirror (12) and charges and discharges through the current mirror (12) based on the direction of the mirrored current. A trigger (22) is coupled to the capacitor (20) and outputs a first voltage level when the capacitor (20) charges to a first voltage threshold and outputs a second voltage level when the capacitor (20) discharges to a second voltage threshold. A switch (14) is coupled to the current mirror (12) and the trigger (22) for changing the direction of the mirrored current based on the output voltage of the trigger (22).

Abstract: An MOS oscillator circuit which is relatively immune to power variations in the supply is presented. A capacitor is charged and discharged in responsive to the feedback signal from a Schmitt trigger circuit. The current to charge and discharge the capacitor is generated by a current mirror which is regulated by a constant voltage generator for immunity from power supply variations.

Abstract: An integrated oscillator includes an amplifier having first and second voltage inputs, and first and second current outputs, and a current mirror having an input coupled to the second current output of the amplifier and an output coupled to the first current output of the amplifier. The output of the current mirror and the first current output of the amplifier are coupled through a bonding pad to an external capacitor. A first comparator has a first input coupled to the first current output of the amplifier and a second input for receiving a first threshold voltage, and a second comparator has a first input coupled to the first current output of the amplifier and a second input for receiving a second threshold voltage. A flip-flop has a first input coupled to the output of the first comparator, a second input, and an output coupled to the second voltage input of the amplifier.

Abstract: Oscillator circuit of the regenerative type, comprising a first oscillator at least including a first feedback amplifier (Qa1, Qb1) and a first integrator (C1) in which the first oscillator has an output signal having two stable levels alternating in one oscillation cycle and an unstable or regenerative switching state between each of them, in which the loop gain is greater than unity, and has an input signal which originates from the integrator and which varies time-dependently in a positive or negative sense. A second oscillator identical to the first oscillator is provided which at least includes a second feedback amplifier (Qa2, Qb2) and a second integrator (C2) having an oscillation cycle which is equal to the said oscillation cycle or a multiple thereof and which is shifted with respect thereto.

Abstract: The present invention provides a linearized and delay compensated all CMOS voltage controlled oscillator. A transconductance converter receives a control voltage input and provides a control current to a current controlled ramping circuit that is responsible for providing two ramping voltage outputs to the positive inputs of two comparators. These comparators compare the ramping voltages to a threshold voltage and provide pulses to a latch when the ramping voltages cross the threshold voltage. The latch provides the oscillating output of the circuit which is fed back to the current controlled ramping circuit for switching purposes. A compensation loop receives both the oscillating output of the latch and the control current as inputs and provides the threshold voltage to the comparators. The compensation loop contains a similar current controlled ramping circuit which provides ramping outputs identical to those of the first current controlled ramping circuit.

Abstract: A fully-differential relaxation-type voltage controlled oscillator (VCO) (30) includes an operational transconductance amplifier (OTA) (31) for receiving a differential input voltage. The OTA (31) provides a charging current to a capacitor (33) proportional to the differential input voltage during a first phase of an output signal, and provides a discharging current to the capacitor (33) proportional to the differential input voltage during a secon d phase of the output signal. A comparator having hysteresis (34) detects the charge on the capacitor. A latching portion (35) latches the output of the comparator (34) to provide non-overlapping clock signals.

Abstract: An RC oscillator for varying an oscillation frequency which has a counter for counting a clock pulse of the oscillation frequency and for outputting a counted value in a form of a plurality of bits to an output terminal. It also includes a standard capacitor, a plurality of capacitors having a capacitance value in proportion to a weight of bits outputted from the counter, and a plurality of switches connected to one end of each capacitor for selectively connecting the capacitors in parallel. A plurality of first gate circuits control the switches connected thereto in response to an output of the counter, each first gate circuit has an input terminal connected to an output terminal of the counter and an output terminal connected to a control terminal of the switches.

Abstract: The present invention provides a linearized and delay compensated all CMOS voltage controlled oscillator. A transconductance converter receives a control voltage input and provides a control current to a current controlled ramping circuit that is responsible for providing two ramping voltage outputs to the positive inputs of two comparators. These comparators compare the ramping voltages to a threshold voltage and provide pulses to a latch when the ramping voltages cross the threshold voltage. The latch provides the oscillating output of the circuit which is fed back to the current controlled ramping circuit for switching purposes. A compensation loop receives both the oscillating output of the latch and the control current as inputs and provides the threshold voltage to the comparators. The compensation loop contains a similar current controlled ramping circuit which provides ramping outputs identical to those of the first current controlled ramping circuit.

Abstract: Disclosed is a power system for use with a computer, the power system having incorporated in its circuitry for automatically varying the supply voltage output to the computer system based upon the magnitude of the current being supplied to the computer by the power system. Also included in the computer system is a variable frequency clock circuit, the frequency of which changes based upon the supply voltage produced by the power system. This permits, during computer system operation where low voltage and low clock speeds will be sufficient to provide the performance needed, achievement of a power saving since both the voltage and frequency at which the system operates is reduced, thereby markedly reducing the power consumption.

Abstract: A high-frequency voltage controlled oscillator includes a start-up circuit for preventing the oscillator from enering a stable state and that does not increase the fixed delays in the oscillator feedback paths. A sleep mode feature shuts down the oscillator to conserve power and capacitors are used to isolate the oscillator from high-frequency noise coupled through the power supply inputs.

Abstract: An oscillator circuit providing an output signal having a predetermined frequency of oscillation includes a comparator circuit having first and second inputs and an output, the first input being coupled to a node, and the second input being coupled to a terminal at which a reference voltage is applied. A capacitor is coupled between the first input of the comparator circuit and the output of the comparator circuit wherein the capacitor has parasitic capacitances associated therewith. A switchable current circuit responsive to the output of the comparator circuit for pushing current into the node when the output of the comparator circuits is in a first logic state thereby charging the capacitor, and for pulling current out of the node when the output of the comparator circuit is in a second logic state thereby discharging the capacitor wherein the predetermined frequency of oscillation of the oscillator circuit is independent of the parasitic capacitor.

Abstract: A monolithically integrated microcomputer clocked at a processor clock rate includes a clock generator in the form of an RC oscillator being synchronizable by external signals for controlling at least one functional unit operating asynchronously with the processor clock rate. The RC oscillator has a frequency-determining resistor and a frequency-determining capacitor being monolithically integrated. The frequency-determining capacitor is formed of a plurality of switchable capacitors to be interconnected to make a total capacitor with a variable size. Registers are each connected to a respective one of the capacitors for defining a switching state of the switchable capacitors. A central processing unit is connected to the registers for adjusting the frequency of the clock generator by setting the registers.

Abstract: An adjustable frequency oscillator has an adjustable element, such as a potentiometer, for setting the frequency of oscillation. The circuitry in the oscillator is such that the frequency of oscillation is relatively immune to the characteristics of the adjustable element. The oscillator may be used in a time delay circuit, notably, in a time delay circuit used to control a time delay relay.

Abstract: The disclosure concerns the fabrication of integrated circuits. To enable the making, in an integrated circuit, of an internal clock, the frequency of which is adjustable and does not depend on the general supply voltage Vcc of the circuit, a relaxation oscillator is used. This relaxation oscillator is built in the following way: weighted individual current sources may be selectively connected in parallel under the control of a register containing frequency adjusting data. These sources charge and discharge a capacitor. A threshold comparator determines a high threshold Vh and a low threshold Vb to trigger respectively the discharging and the charging of the capacitor. The difference Vh-Vb is made proportional to the currents of the elementary sources. Thus, even if the value of the currents varies as a function of the supply voltage, the thresholds vary at the same time and the period of the oscillator does not vary.

Abstract: An inexpensive yet effective circuit for producing an irregular pulse train of variable frequency and duty cycle, particularly for generating simulated sounds, such as engine sounds for toy vehicles, is disclosed. The circuit comprises an integrated circuit including a plurality of Schmitt trigger inverters (U1A, U1B) configured for oscillation at different frequencies, and a resistance element (R3, R7) in series with one, and preferably both, of the power supply connections to the inverters, with the circuit output comprising the output of one of the Schmitt trigger inverters (U1B). In a preferred embodiment, a capacitance element (C4) is connected between the output of a Schmitt trigger inverter and its system voltage input for further modulating the circuit output.

Abstract: The disclosure concerns the manufacture of integrated circuits and, more precisely, that of integrated circuits containing a signal processor. To be able to make a purely internal clock in an integrated circuit, wherein this clock does not require any external adjusting elements connected to terminals of the circuit, the clock is designed to include an internal oscillator, the frequency of which is adjustable by a register, it being possible for the register to be loaded by the processor. The frequency of the oscillator may be adjusted to compensate for the uncertainty over the natural frequency of the oscillator (which is subject to technological fluctuations). It may also be used to adjust the frequency as a function of an application or of the environment of the circuit. The contents of the register may come from a non-volatile memory containing individual data on the circuit.

Abstract: A method for powering up an integrated circuit and circuit for implementing the method. A first charging current is used to slowly charge a capacitor used in the integrated circuit upon connecting the power. A power-up signal is provided to initialize digital circuitry until the first charging current raises the voltage of the capacitor above a threshold value. Once a capacitor is charged to another predetermined threshold, a second charging current is activated. The two charging currents are thereafter used as the total charging current on the capacitor. If the capacitor is grounded, the initial power-up scheme is re-initiated.

Abstract: A high-speed, temperature- and parameter-stable, controllable CMOS oscillator is suitable for low to very high frequencies, e.g., clearly above 100 MHz. The oscillator includes a two-stage differential amplifier (D) and two controlled current sources (I1, I2) which are interconnected via a frequency-determining capacitor (C). The two current sources (I1, I2) are connected to the inputs (IN1, IN2) of the differential amplifer (D) through a first resistor (R1) and a second resistor (R2), respectively. By means of a first switching unit (S1) connected to the inputs of the differential amplifier (D), a first current path is completed in response to the voltage drop across the first resistor (R1) to charge the capacitor to a first state, and by means of a second switching unit (S2), a second current path is completed in response to the voltage drop across the second resistor (R2) to discharge the capacitor (C) to a second state.

Abstract: A universal voltage-controlled multivibrator comprises a signal state conversion circuit and a feedback circuit. The signal state conversion circuit has the output states as a function of the input states. The feedback circuit, containing multiple controlling input terminals, has a propagation delay time as a function of the electrical signal applied to the controlling input terminals. One output of the signal state conversion circuit is connected to one input of the feedback circuit and the output of the feedback circuit is connected to one input of the signal state conversion circuit such that the output of the signal state conversion circuit is fed back to its input to have the period of its output signal be controllable by the signals applied to the controlling input terminals of the feedback circuit.

Abstract: An AC power source apparatus to be used in an AC corona generator necessary for a de-electrification/separation process, which is one of electrographic image forming processes, or in a case where a low frequency AC power source is required, has a construction such that a high-frequency pulse, whose time ratio is modulated trapezoidally with time, is applied to switching elements connected in inverse-series across a primary winding of a transformer, an inductance element having a regenerative diode and a reset winding is inserted between an intermediate tap of the primary winding of the transformer and a DC power supply input terminal, and an LC filter is formed by stray capacitance of a secondary winding of the transformer, whereby a desired output waveform can be produced with a simple circuit construction.