With Particular Source Of Power Or Bias Voltage Patents (Class 331/185)
  • Patent number: 8170523
    Abstract: A low power super regenerative receiver and a method of reducing the power consumption of the low power super regenerative receiver are provided. The super regenerative receiver includes: an oscillator having a start-up time period starting oscillation that varies according to an existence of an input signal; and a power controller supplying power within the start-up time period of the oscillator.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: May 1, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hoyong Kang, Xiaohua Yu, Ji Eun Kim, Trung Kien Nguyen, Dae Young Yoon, Nae Soo Kim, Cheol Sig Pyo, Seok Kyun Han, Sang Gug Lee
  • Patent number: 8169271
    Abstract: With some embodiments, a VCO (voltage controlled oscillator) operates at an integer multiple (N) above a desired transmission frequency. In accordance with one embodiment, a chip is provided with a VCO to generate a signal and a frequency dividing circuit to provide a reduced frequency version of the signal to a transmit mixer. The transmit mixer is followed by a power amplifier that is on the same die as the VCO. The power amplifier is to generate an OFDM output transmission.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 1, 2012
    Assignee: Intel Corporation
    Inventors: Pankaj Goyal, Christopher Hull
  • Patent number: 8159308
    Abstract: An apparatus includes a tank circuit of a voltage controlled oscillator (VCO). A pair of alternating current (AC) coupling capacitors couple the gates of the pair of transistors to the drains of the pair of transistors. A bias circuit is coupled to the gates of the pair of transistors to bias the pair of transistors such that the pair of transistors alternatingly turn on during a plurality of peaks of an oscillating signal of the tank circuit and the pair of transistors turn off during a plurality of crossing points of the oscillating signal. A feedback loop may be configured to detect a peak oscillating amplitude of the oscillating signal and adjust a bias voltage of the bias circuit. Also, a supply capacitor may be coupled to the tank circuit and to the pair of transistors to provide an instantaneous current to the VCO.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: April 17, 2012
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8154352
    Abstract: An oscillating circuit includes N nodes outputting oscillating signals, a main loop circuit including N inverting circuits, and a plurality of auxiliary loop circuits. Each inverting circuit in the auxiliary loop circuits is connected in parallel with even numbers of inverting circuits cascaded in the main loop circuit. The circuits for feeding back signals from outputs to inputs of the respective inverters of the main loop circuit have circuit configurations equivalent to each other. Each inverting circuit in the main loop circuit and the auxiliary loop circuits drives an output line such that a phase of an output signal is inverted with respect to a phase of an input signal and has driving power that becomes lower when the phases of the output signal and the input signal are inverted with respect to each other than when the output signal and the input signal are in phase with each other.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: April 10, 2012
    Assignee: Sony Corporation
    Inventor: Yosuke Ueno
  • Patent number: 8134414
    Abstract: Exemplary embodiments provide a reference signal generator having a reference or center frequency within a predetermined variance over variations in temperature within a specified range. An exemplary apparatus comprises a reference resonator to generate a first reference signal having a resonant frequency, with the reference resonator having a first temperature dependence; and a plurality of switchable circuits, with at least one switchable circuit providing a second temperature dependence opposing the first temperature dependence to maintain the resonant frequency within a predetermined variance over a temperature variation.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: March 13, 2012
    Assignee: Integrated Device Technology, Inc.
    Inventors: Michael Shannon McCorquodale, Scott Michael Pernia, Vidyabhusan Gupta, Nathaniel Charles Gaskin, Nader Fayyaz
  • Patent number: 8115559
    Abstract: An oscillator including a current bias circuit and a ring oscillator. The current bias circuit tracks a temperature change of the oscillator by using a control voltage and generates a plurality of bias voltages to supply a bias current according to the temperature change. The ring oscillator compares differential output signals generated according to the bias voltages and generates an oscillation signal as a result of the comparison.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: February 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyoung Rae Kim, Nam Jin Song
  • Patent number: 8098107
    Abstract: A system for providing voltage and current regulator sources based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator oscillate. The oscillator's ability to oscillate is controlled by the one or more variable impedance or gain devices. Negative feedback of the voltage or current output level is used to control the loop gain of the oscillator circuit.
    Type: Grant
    Filed: September 5, 2009
    Date of Patent: January 17, 2012
    Inventor: Fred Mirow
  • Patent number: 8098109
    Abstract: According to one exemplary embodiment, a differential varactor circuit for a voltage controlled oscillator having two differential outputs includes a first varactor having first and second terminals and a second varactor having first and second terminals. In the differential varactor circuit, each of the first and second terminals of the first varactor and each of the first and second terminals of the second varactor are coupled to one of the two differential outputs of the voltage controlled oscillator, thereby allowing a size of each of the first and second varactors to be reduced so as to increase varactor quality factor. Each of the first and second terminals of the first varactor can be coupled to one of the two differential outputs by a capacitor, and each of the first and second terminals of the second varactor can be coupled to one of the two differential outputs by a capacitor.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: January 17, 2012
    Assignee: Broadcom Corporation
    Inventors: Qiang Li, Shr-Lung Chen, Richard Chen
  • Patent number: 8098111
    Abstract: Embodiments of a multi-band voltage controlled oscillator (VCO) are provided herein. The multi-band VCO is configured to adjust a frequency of an output signal based on an input signal. The multi-band VCO includes a tank module, an active module, and a control module. The tank module includes a parallel combination of a capacitor and an inductor. The active module includes a pair of cross-coupled transistors that are configured to provide a negative conductance that cancels out a positive conductance associated with the tank module. To improve the phase noise associated with the multi-band VCO, the control module is configured to adjust the body voltage of the cross-coupled transistors.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: January 17, 2012
    Assignee: Broadcom Corporation
    Inventors: Calvin (Shr-Lung) Chen, Morteza Vadipour, Xinyu Chen
  • Patent number: 8093956
    Abstract: A temperature-compensated-resistance (TCR) circuit, which may be part of an integrated circuit, is provided. The TCR circuit consists of two resistors and a diode. The two resistors are connected in parallel and the diode is connected in series with one of the resistors. The two parallel legs of the TCR circuit may be connected to a reference voltage source, such as a ground. No specialized devices, such as bipolar transistors, Zener or Schottky diodes, or specially-processed resistors, are required by the TCR circuit. The resistors and the diode of the TCR circuit may be chosen to adjust for temperature variations in the resistance values of the resistor, leading to a negative, zero, or positive temperature coefficient of resistance for the circuit. A phase-locked loop (PLL) circuit is described as an application of the TCR circuit.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 10, 2012
    Assignee: Honeywell International Inc.
    Inventors: Xiaoxin Feng, Jeffrey Loukusa
  • Patent number: 8089326
    Abstract: The invention discloses a PVT-independent current-controlled oscillator, including a PV-controller, a current-controlled oscillator and a T-controller. The current-controlled oscillator is coupled to the PV-controller and outputs an oscillation frequency.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: January 3, 2012
    Assignee: Himax Technologies Limited
    Inventor: Meng-Chih Weng
  • Patent number: 8089319
    Abstract: Systems and methods for increasing the frequency range of an output signal generated by a VCO, where one or more variable delay units are incorporated into an interpolative VCO to decrease the minimum frequency at which the VCO oscillates. In one embodiment, the VCO includes a ring of serially connected inverters, a set of bypass circuits and a set of variable delay units. The bypass circuits are coupled to the ring of serially connected inverters to bypass one or more of the serially connected inverters when enabled. Each variable delay unit delays signal transitions at the input of a corresponding one of the serially connected inverters by a variable amount. The variable delay units may be positioned in series with the ring of inverters, in parallel with the bypass paths, or in parallel with corresponding inverters in the ring of inverters.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: January 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masaaki Kaneko
  • Patent number: 8085103
    Abstract: Some embodiments of the present invention provide a system that implements a resonant oscillator circuit. This resonant oscillator circuit includes: a first inductor, a second inductor, a first capacitance, and a second capacitance, wherein the first and second inductors are configured to operate with the first and second capacitances to produce resonant oscillations which appear at a first phase output and a second phase output. The system also includes a startup circuit which is configured to start the resonant oscillator circuit in a state where: the first phase output is at a peak voltage; the second phase output is at a base voltage; and currents through the first and second inductors are substantially zero. By starting the resonant oscillator circuit in this state, the oscillations commence without a significant startup transient.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: December 27, 2011
    Assignee: Apple Inc.
    Inventor: William C. Athas
  • Patent number: 8085098
    Abstract: A PLL circuit comprising an oscillation unit, a frequency division unit, a phase comparison unit, and a generation unit comprises a switching unit that switches between a first state in which a control voltage output from the generation unit is input into the oscillation unit and a second state in which a reference voltage is input into the oscillation unit; and a correction unit that, in the second state, compares the control voltage output from the generation unit with the reference voltage, and corrects a frequency at which the oscillation unit oscillates with respect to a voltage input into the oscillation unit, such that the control voltage output from the generation unit is equivalent to the reference voltage.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: December 27, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoshikazu Yamazaki
  • Patent number: 8081039
    Abstract: In one embodiment, a voltage controlled oscillator (VCO) is provided. The VCO includes a tank circuit. Also, the VCO includes a first pair of transistors. The drains of the first pair of transistors are coupled to the tank circuit and the gates of the first pair of transistors are cross-coupled with the drains of the first pair of transistors. The first pair of transistors each have a first threshold voltage. The VCO further includes a second pair of transistors. The drains of the second pair of transistors are respectively coupled to the sources of the first pair of transistors and the gates of the second pair of transistors are respectively coupled to the gates of the first pair of transistors, The second pair of transistors each have a second threshold voltage higher than the first threshold voltage.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: December 20, 2011
    Assignee: Marvell International Ltd.
    Inventors: Alessandro Venca, Enrico Sacchi, Sehat Sutardja
  • Patent number: 8076981
    Abstract: An oscillator that increases the accuracy of an output frequency, without using a charge pump, has an oscillation circuit, first and second voltage supply circuits, and a calibration value generation circuit. The first voltage supply circuit includes a resistor and a capacitor, the resistance and capacitance of which are determined so that a first voltage reaches a reference voltage within a reference time. The second voltage supply circuit includes first and second switching means, which perform switching when receiving pulse signals corresponding to the frequency of the oscillation circuit to raise the second voltage. A calibration value generation circuit provides the oscillation circuit with a calibration value that lowers the frequency when the second voltage reaches the reference voltage before the first voltage and raises the frequency when the second voltage reaches the reference voltage after the first voltage.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: December 13, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Eji Shikata
  • Publication number: 20110298556
    Abstract: A voltage source circuit for a crystal oscillation circuit is provided, in which the voltage source circuit and the crystal oscillation circuit are formed with the same process. The voltage source circuit includes a current source, a first PMOS, a first NMOS and a regulator unit. The current source is coupled between a voltage source and an output terminal, in which the output terminal outputs a reference voltage. Both of the gates and drains of the first PMOS and the NMOS are coupled to each other, and the first PMOS and the first NMOS are coupled between the output terminal and a ground. The regulator unit generates a work voltage to the crystal oscillation circuit as a voltage source of the crystal oscillation circuit according to the reference voltage.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: EMEMORY TECHNOLOGY INC.
    Inventors: Yung-Ching Lin, Chia-Chun Hsu
  • Patent number: 8067993
    Abstract: There is provided a constant current driven oscillating circuit including: an oscillator with first and second ends; a first field effect transistor that turns ON when a signal of a lower level than a first threshold voltage is input to a first gate terminal, and outputs, from a second terminal, current that has been input from a first terminal; a second field effect transistor turning ON when a signal output from the oscillator and is at a higher level than a second threshold voltage is input to a second gate terminal connected to the second end of the oscillator, and outputs, from a fourth terminal, current that has been input from a third terminal connected to the second terminal and to the first end of the oscillator; and an adjusting section that adjusts the first threshold voltage according to the level of the signal output from the oscillator.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: November 29, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Kouji Nasu
  • Patent number: 8063711
    Abstract: A crystal oscillator emulator integrated circuit includes a first temperature sensor configured to sense a first temperature of the crystal oscillator emulator integrated circuit. The memory is configured to (i) store calibration parameters and (ii) select at least one of the calibration parameters based on the first temperature. A semiconductor oscillator is configured to generate an output signal, wherein (i) the output signal has a frequency and an amplitude and (ii) the frequency is based on the at least one of the calibration parameters. An amplitude adjustment module is configured to (i) compare the amplitude to a predetermined amplitude and (ii) generate a control signal to adjust the amplitude based on the comparison.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: November 22, 2011
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8058938
    Abstract: A voltage controlled oscillator (VCO) includes a first and a second n-type transistor, a first and a second p-type transistor, a first and second capacitive element, a bridge connecting (1) the ground-facing connection of the first n-type transistor and power-facing connection of the first p-type transistor to (2) the ground-facing connection of the second n-type transistor and power-facing connection of the second p-type transistor, a first inductive element, a first capacitor bank, a second inductive element, and a second capacitor bank.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: November 15, 2011
    Assignee: Project FT, Inc.
    Inventors: Arshan Aga, Farbod Aram
  • Patent number: 8054139
    Abstract: A voltage-controlled oscillator is implemented with a succession of delay cells coupled in series to form an oscillator loop. The oscillator loop is supplied with reference voltages produced by a voltage generator. The reference voltages produce stable operation of the voltage-controlled oscillator. Cascode reference current generators are incorporated within the voltage generator to supply a cross-coupled arrangement of pull-up devices within each delay cell. The cross-coupled pull-up devices are instrumental in producing complementary output signaling from each delay cell. A pair of cascode current generators is configured in parallel to produce a magnitude of current according to an applied voltage and to be selectable for dual or single operation with a corresponding frequency determination.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: November 8, 2011
    Assignee: Silicon Labs Spectra, Inc.
    Inventors: Francisco Fernandez, Alexei Shkidt
  • Patent number: 8054138
    Abstract: This invention makes it possible to reduce a power consumption of an electronic circuit (microcomputer, for example) while preventing malfunctioning of an oscillator by appropriately setting a power supply impedance of a low frequency oscillator corresponding to an operation mode. A high frequency oscillator, a medium frequency oscillator and a low frequency oscillator are provided as sources of system clocks. In addition, there is provided a quartz oscillator to generate a clock for a timepiece. When the high frequency oscillator is in operation, a power supply impedance of the quartz oscillator is reduced to improve a noise tolerance. In a waiting period during which the high frequency oscillator, the medium frequency oscillator and the low frequency oscillator are halted, on the other hand, the power supply impedance of the quartz oscillator is increased to suppress the power consumption.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Hideo Kondo
  • Patent number: 8044723
    Abstract: Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: October 25, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Hong Sun Kim, Jin Wook Kim, Gang Zhang, Jeremy Darren Dunworth, Timothy Paul Pals
  • Patent number: 8040195
    Abstract: A current source device that cuts off an output current when stopped and obtains a desired output current upon start-up includes a first circuit having a first FET and resistors in series, a second circuit having second and third FETs in series with a point between the second and third FETs and a gate of the third FET connected, a drive circuit supplying a common drive voltage to gates of the first and second FETs, and first and second current source circuits responsive to first and second drive voltages that are gate voltages of the second and third FETs. The first and second current source circuits respectively include first and second current source FETs having the first and second drive voltages as gate voltages, and a start-up circuit changing the first and second drive voltages forcedly when the first and second current source FETs are made conductive.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: October 18, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Nobukazu Murata
  • Patent number: 8037431
    Abstract: A design structure embodied in a machine readable medium used in a design process includes an interleaved voltage-controlled oscillator, including a ring circuit of main logic inverter gates; a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates; wherein each delay element comprises a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages; and a proportional section for regulating signal transmission through at least one logic inverter gate; at least one temperature compensation circuit responsive to a compensating voltage input that is proportional to temperature; an electronic circuit in communication with the temperature compensation circuit and configured to provide a voltage signal responsive to temperature; an amplifier in connection with the electronic circuit to amplify the voltage signal; and a DC offset generator configured to adjust the voltage of the
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: October 11, 2011
    Assignee: International Business Machines Corporation
    Inventors: David W. Boerstler, Eskinder Hailu, Jieming Qi, Mike Shen
  • Patent number: 8035457
    Abstract: A voltage controlled oscillator (VCO) includes a voltage controlled current source (VCCS), a negative resistance circuit (NRC), a first transformer, a second transformer, a first transistor and a second transistor. A current terminal of the VCCS receives a control voltage. First terminals of first and second current paths in the NRC are coupled to a current terminal of the VCCS. Primary sides of the first and the second transformers are respectively coupled to second terminals of the first and the second current paths. Secondary sides of the first and the second transformers are first and second output terminals of the VCO, respectively. First terminals of the first and the second transistor are respectively coupled to the secondary sides of the first and the second transformers. Control terminals of the first and the second transformers are respectively coupled to the primary sides of the first and the second transformers.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: October 11, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Hsiang Chang, Jung-Mao Lin, Ching-Yuan Yang
  • Patent number: 8031020
    Abstract: In one embodiment, the present invention includes noise reduction circuits and methods. In one embodiment, cross coupled switching transistors incorporate bias voltages between the control terminal of each transistor and the drain of the other transistor. The bias voltages increase the voltage on each transistors drain terminal and reduce noise upconversion in the system. In one embodiment, the source voltages of each transistor may be increased to linearize the circuit and further reduce noise. In another embodiment, a current is coupled to a PN junction to generate a low noise bias voltage. The bias voltage is used to bias capacitors of a selectively activated and deactivated capacitance to reduce noise. Features and advantages of the present invention may be implemented in an oscillator circuit, which may be used in a communication system, for example.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: October 4, 2011
    Assignee: Marvell International Ltd.
    Inventors: Cao-Thong Tu, David Cousinard, Michel Moser
  • Patent number: 8031026
    Abstract: An apparatus for generating an oscillating signal including an oscillator configured to generate the oscillating signal, a controller configured to generate a control signal that controls a characteristic (e.g., amplitude or frequency) of the oscillating signal, and a power supply configured to supply power to the oscillator as a function of the control signal. The power supply may be configured to supply power to the oscillator as a function of the amplitude or frequency of the oscillating signal to improve power efficiency.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: October 4, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Jorge A. Garcia
  • Patent number: 8031017
    Abstract: Described herein is the method and apparatus for determining frequency of an oscillator coupled with one or more analog devices, and for determining within-die or across-die variations in an analog property associated with the one or more analog devices, the determining based on the oscillator frequency. The analog property includes output signal swing, bandwidth, offset, gain, and delay line linearity and range. The one or more analog devices include input-output (I/O) buffer, analog amplifier, and delay line. The method further comprises updating a simulation model file based on the determining of the within-die and/or across-die variations of the analog property.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: October 4, 2011
    Assignee: Intel Corporation
    Inventors: Praveen Mosalikanti, Nasser A. Kurd, Timothy M. Wilson
  • Patent number: 8022779
    Abstract: An integrated circuit oscillator includes a microelectromechanical (MEM) resonator having input and output terminals. An oscillation sustaining circuit is provided. The oscillation sustaining circuit is electrically coupled between the input and output terminals of the microelectromechanical resonator. The oscillation sustaining circuit includes a sustaining amplifier and a negative impedance circuit electrically coupled to the sustaining amplifier. The negative impedance circuit is configured to increase a tuning range of the oscillator by at least partially cancelling a parasitic shunt capacitance associated with the microelectromechanical resonator.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: September 20, 2011
    Assignee: Georgia Tech Research Corporation
    Inventors: Farrokh Ayazi, Seyed Hossein Miri Lavasani
  • Patent number: 7999628
    Abstract: This invention includes a bias origination section configured to originate an original bias voltage; a comparison section configured to compare the original bias voltage and a comparison voltage, and output a comparison result; a resistive divider section composed by a resistance circuit including a variable resistor section having a resistor and a switch, and configured to generate the comparison voltage; a bias decision control section configured to determine bias decision data for controlling a resistance value of the variable resistor section so as to bring the comparison voltage close to the original bias voltage, based on a comparison result of the comparison section; and a storage section configured to hold the bias decision data and also output the comparison voltage as a bias voltage by controlling a resistance value of the variable resistor section based on the held bias decision data, thereby generating a low-noise bias with a small area.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: August 16, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Daisuke Miyashita
  • Patent number: 7990225
    Abstract: A phase-locked loop (PLL) with a decreased frequency tuning gain KVCO and a loop filter using capacitor multiplication technique to get high chip area efficiency. To get decreased frequency tuning gain, KVCO, a voltage to current converter in a voltage-controlled oscillator (VCO) in the PLL may comprise a first voltage to current converter and a second voltage to current converter. The trans-conductance of the first voltage to current converter is 1/? of that of the second voltage to current converter, wherein ?>1. The first voltage to current converter is controlled by an output voltage of a loop filter in the PLL, and the second voltage to current converter is controlled by a relative DC voltage, which may be the junction node between R1 and C1 in a loop filer of the PLL. Capacitor multiplication technique may use an auxiliary charge pump to charge or discharge the junction node between R1 and C1 inversely to the main charge pump.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: August 2, 2011
    Assignee: Marvell International Ltd.
    Inventors: Jianmin Guo, Yihui Li, Hong Xue, Yonghua Song, Tao Shui, Hao Zhou
  • Patent number: 7986191
    Abstract: A self-biased PLL includes a first charge pump and a second charge pump, an output terminal of the first charge pump is connected with a discharge-charge capacitor to output a control voltage, an output terminal of the second charge pump is connected with an output terminal of a bias generator for outputting a first bias voltage equal to the control voltage, wherein, a current output from the first charge pump is equal to a value obtained through dividing the production of a first constant with a bias current of a voltage control oscillator by a frequency division factor of a frequency divider; a current output from the second charge pump is equal to a value obtained through dividing the bias current of the voltage control oscillator by a second constant; and a multiple relation exists between an output resistance of the bias generator and an equivalent resistance of a differential buffer delay stage in the voltage control oscillator.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: July 26, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jinzhong Peng, Zhigang Chiachi Fu
  • Patent number: 7986194
    Abstract: An oscillator, includes an amplifier circuit including a semiconductor element having a first constant potential as reference potential for a power supply voltage, a variable capacitance element, a piezoelectric resonator, and a capacitance circuit constituting a closed circuit with the piezoelectric resonator. The amplifier circuit and the variable capacitance element are connected in series to provide a series circuit. The capacitance circuit connects the capacitance elements in a plurality of numbers in series. A connecting midpoint of the series connection is connected to a circuit for the first constant potential. Two connecting midpoints other than the midpoint of the closed circuit are used as connecting points to connect the series circuit and the closed circuit in parallel.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: July 26, 2011
    Assignee: Epson Toyocom Corporation
    Inventors: Atsushi Kiyohara, Takehiro Yamamoto
  • Patent number: 7982553
    Abstract: This invention discloses a clock generator capable of automatically adjusting output clock when process, voltage, or temperature variation occurred. The clock generator comprises a current generator, for generating a first current and a second current according to a control voltage; a oscillator, coupled to the current generator, for generating a clock signal according to the first current; and a voltage adjuster, coupled to the current generator and the oscillator, for adjusting the control voltage according to the clock signal and the second current; wherein, when the signal frequency of the clock signal changed, the voltage adjuster correspondingly adjusts the control voltage so as to adjust the first current.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: July 19, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chen-Chih Huang, Tsung Yen Tsai
  • Patent number: 7982548
    Abstract: Some embodiments of the present invention provide a system that implements a resonant oscillator circuit. This system includes a first inductor with a constant potential terminal coupled to an input voltage, and a time-varying potential terminal coupled to a first phase output. The system also includes a second inductor with a constant potential terminal coupled to the input voltage, and a time-varying potential terminal coupled to a second phase output. The system additionally includes a first n-type transistor with a source terminal coupled to a base voltage, a drain terminal coupled to the first phase output, and a gate terminal coupled to the second phase output. The system also includes a second n-type transistor with a source terminal coupled to the base voltage, a drain terminal coupled to the second phase output, and a gate terminal coupled to the first phase output.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: July 19, 2011
    Assignee: Apple Inc.
    Inventor: William C. Athas
  • Patent number: 7973612
    Abstract: A supply-regulated Phase-locked loop (PLL) is provided. The PLL comprises a supply-regulating loop, a voltage-controlled oscillator (VCO), and a programmable decoupling capacitor array for the VCO. The capacitance of the VCO decoupling capacitor array is adjustable to be equal to N times CUNIT, where N is the current value of a multiplication factor of a divide-by-N circuit and CUNIT is a unit capacitance characterized for a processing technology chosen for fabricating the decoupling capacitor array. When the PLL switches from one frequency band to another, a higher-order pole introduced by the VCO decoupling capacitor tracks the PLL reference frequency, thus improving the PLL operational stability.
    Type: Grant
    Filed: April 26, 2009
    Date of Patent: July 5, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Ashwin Raghunathan, Marzio Pedrali-Noy
  • Patent number: 7969253
    Abstract: A VCO includes a reference current module and a clock signal generating module. The reference current module generates a reference current according to a reference voltage. The clock signal generating module generates a clock signal according to the reference current. The reference current module utilizes the negative feed-back mechanism to keep the generated reference current at the predetermined size without being changed with the variation of the process and the bias source.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: June 28, 2011
    Assignee: Etron Technology, Inc.
    Inventors: Chun Shiah, Cheng-Nan Chang, Yu-Sheng Lai
  • Patent number: 7965150
    Abstract: It is an object of the present invention to shorten a time required until phases of output signals being output from two output terminals are inverted respectively from a start time of an oscillation in a differential oscillation apparatus.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: June 21, 2011
    Assignee: Panasonic Corporation
    Inventors: Shigeru Kobayashi, Suguru Fujita
  • Patent number: 7965145
    Abstract: A voltage-controlled oscillator (VCO) circuit includes a level shifter, and a semiconductor device includes the VCO circuit. The VCO circuit includes an input voltage receiver, a current mirror, and a frequency oscillator. The input voltage receiver receives a first voltage input to the VCO circuit so as to generate a first current. The current mirror copies the first current so as to generate a second current. The frequency oscillator oscillates in response to the second current. The input voltage receiver includes a level shifter and a first current generator. The level shifter shifts a voltage level of the first voltage to a voltage level of a second voltage. The first current generator generates the first current corresponding to the second voltage.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: June 21, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-hyun Kim, Jung-hyeon Kim
  • Patent number: 7961055
    Abstract: A phase locked loop circuit includes an oscillator part configured to generate a reference signal by amplifying a signal generated by an oscillator, and a phase locked loop part configured to include a filter that outputs a control signal to a clock transmitting circuit that generates a clock signal in accordance with a phase difference between the reference signal and a feedback signal, wherein a drive capability of the oscillator part is controlled in accordance with the control signal.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: June 14, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinji Miyata, Masahiro Tanaka
  • Patent number: 7944315
    Abstract: The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: May 17, 2011
    Assignee: Amazing Microelectronic Corp.
    Inventor: Wei-Cheng Lin
  • Patent number: 7936226
    Abstract: The invention relates to a circuit and method for a wireless accessory of a portable computer. The circuit comprises an oscillator circuit, a control circuit connected to the oscillator circuit, and a quenching circuit connected to the oscillator circuit. According to the invention, the oscillator circuit is formed of an LC resonator, the quality factor of which is at least 10, and the quenching circuit is formed in such a way that the energy of the oscillator circuit is discharged by a predefined current.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: May 3, 2011
    Assignee: Suunto Oy
    Inventor: Jari Akkila
  • Patent number: 7911282
    Abstract: A voltage-controlled oscillator includes a delay circuit. The delay circuit includes a first buffer inverter which receives one of the differential input signal and outputs an other of the differential output signal, a second buffer inverter which receives the other of the differential input signal and outputs the one of the differential output signal, a first latch inverter which receives the one of the differential output signal, and includes an output connected to an output of the first buffer inverter, and a second latch inverter which receives the other of the differential output signal, and includes an output connected to an output of the second buffer inverter. The first latch inverter and the first buffer inverter receive a current produced from different voltage-current conversion circuits.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: March 22, 2011
    Assignee: RENESAS Electronics Corporation
    Inventor: Satoshi Fujino
  • Patent number: 7911284
    Abstract: A voltage controlled oscillator circuit comprises a variable current generator to supply an operation current to a voltage controlled oscillator, the voltage controlled oscillator to include a resonance circuit having a variable capacitor and inductor, and to output an output signal having an amplitude based on a current generated by the variable current generator, and a first optimization circuit to which the output signal is inputted, the first optimization circuit generating and outputting a current setting signal based on an amplitude change of the output signal corresponding to a change of a current outputted by the variable current generator to the variable current generator.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: March 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Akira Kuwano
  • Patent number: 7907018
    Abstract: A phase noise minimization circuit is disclosed, to be used in a voltage-controlled oscillator (VCO) circuit embedded in a feedback system. The phase noise minimization circuit includes a noise power meter to analyze the control voltage fed into the VCO by the feedback system and determine its voltage noise power. Since the VCO is controlled by the feedback system, the control voltage noise power is also an indication of the VCO phase noise power for frequencies offset within the bandwidth of the feedback system. The VCO has several parameters that can be adjusted to affect its phase noise. A minimization algorithm generates the optimum set of parameters that minimize the control voltage noise power (and thus the VCO phase noise power), and sends them to the oscillator. The phase noise minimization circuit may be used in a variety of applications, particularly in phase-locked loop and frequency-locked loop VCOs.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: March 15, 2011
    Assignee: Intel Corporation
    Inventors: Stefano Pellerano, Ashoke Ravi, Yorgos Palaskas
  • Patent number: 7902935
    Abstract: A bias circuit and a voltage-controlled oscillator (VCO) thereof suitable for improving the stability of the bias circuit are provided. The bias circuit includes: an error amplifier circuit, having an inverting input terminal connected to a reference voltage; a voltage-controlled current source, having a voltage control terminal connected to a voltage output terminal of the error amplifier circuit, in which a current generated by the current source is controlled by a voltage at the voltage output terminal of the error amplifier circuit; a delay control circuit, having a current input terminal connected to the voltage-controlled current source, an output terminal connected to a non-inverting input terminal of the error amplifier circuit, and a voltage input terminal connected to a supply terminal of the control voltage, and the delay control circuit is adapted to adjust an output voltage of the delay control circuit according to a control voltage.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: March 8, 2011
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Yunhai Li
  • Patent number: 7898350
    Abstract: A frequency stabilizing device of an oscillator is disclosed. The frequency stabilizing device of an oscillator is used for stabilizing the frequency of an oscillator to keep the frequency in constant when input voltage is changed. The frequency stabilizing device comprises a plurality of transmission gates for receiving an input voltage and generating a current and a plurality of resistors for control the value of the current, wherein the current is positive in relation to the input voltage and the frequency of the oscillator is determined by the current.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: March 1, 2011
    Assignee: Princeton Technology Corporation
    Inventor: Shiun-Dian Jan
  • Patent number: 7893779
    Abstract: A system reduces a received RF signal from EMI generated by a digital electronic system that includes a clock. In the present invention the clock frequency, that generates signals and strobes data out, is purposely changed or modulated, by, illustratively, driving the power node of the clock. The typical filter circuit between the clock power node and the power supply is used to advantage in that the filter impedance allows a buffer to more easily drive the clock power node since the low impedance of the power supply is isolated by the filter circuit. The changing of the clock frequency spreads the EMI RF harmonics over a spectrum so that any harmonics received by an RF receiver will be short lived and therefore of small magnitude.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: February 22, 2011
    Assignee: Farichild Semiconductor Corporation
    Inventors: Jim Morra, Seth Prentice
  • Patent number: 7893777
    Abstract: In a voltage controlled oscillation circuit including a cascade connection of a voltage-to-current conversion circuit (310) for generating an input voltage converted current which is a current corresponding to an input voltage and a current controlled oscillation circuit (120) of which an oscillation frequency varies according to the input voltage converted current, the voltage-to-current conversion circuit (310) includes a first current source for outputting a current in proportion to the input voltage and a plurality of second current sources for outputting a current in proportion to a voltage obtained by shifting the input voltage. Then, a current obtained by adding a current output from the first current source and currents output from the plurality of current sources is output as the input voltage converted current to the current controlled oscillation circuit (120).
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: February 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Takashi Oka, Seiji Watanabe