Abstract: A piezoresistive MEMS oscillator uses an output circuit to control the voltage across the resonator body. This results in a DC bias of the resonator. A current path is provided between the output of the output circuit and the resonator body, such that changes in current through or voltage across the resonator body, resulting from changes in resistance of the resonator body, are coupled to the output. This arrangement uses the bias current flowing through the resonator to derive the output. In this way, the same DC current is used to provide the required DC resonator bias and to drive the output circuit to its DC operating point.

Abstract: Embodiments of the present invention provide an oscillator having circuitry that measures the power dissipated in a resonator and circuitry that controls the power delivered to the resonator in response to the measured power. In some embodiments, the circuitry that measures the power dissipated in the resonator comprises circuitry that measures the voltage across the resonator, circuitry that measures the current through the resonator, and circuitry that calculates the power dissipated in the resonator based on the measured voltage and current.

Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.

Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.

Abstract: According to an embodiment, there is provided with an oscillator including: a clock circuit, a power supply current source and an oscillating circuit wherein the clock circuit generates a clock signal, the power supply current source generates a power supply current according to the clock signal, and the oscillating circuit generates an oscillation signal of a higher frequency than a frequency of the clock signal based on the power supply current and a received signal from an input terminal, the received signal having amplitude of a predetermined level or more.

Abstract: Various embodiments relate to a bias generator including: a bias generator circuit; a master startup circuit that applies current to a first node in the bias generator circuit; a second startup circuit that applies current to additional nodes in the bias generator circuit; and a power switch that receives a power from a power supply and that provides power to the bias generator circuit, the master startup circuit, and the second startup circuit.

Abstract: A delay circuit includes a delay unit having a first and a second power supply terminals, a pair of differential signal input terminals and a pair of differential signal output terminals. The signals entered to the pair of differential signal input terminals are delayed and output at the pair of differential signal output terminals. The delay circuit also includes a current controller that exercises control to cause a current of a current source, controlled by a current control terminal, to flow through the first and second power supply terminals of the delay unit. The delay circuit also includes a voltage controller that exercises control to provide for a constant potential difference between the first and the second power supply terminals (FIG. 1).

Abstract: A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator.

Abstract: The invention relates to an oscillator circuit comprising: a VCO core having an output terminal for providing an oscillatory output signal thereat and having a supply terminal for receiving a supply voltage from a voltage supply, a subsequent circuit coupled to the VCO core's output terminal and having a supply terminal for receiving a supply voltage from the voltage supply. According to the invention, a decoupling member is arranged between the VCO core's supply terminal and the subsequent circuit's supply terminal for preventing high-frequency signals generated by the subsequent circuit at its supply terminal from entering the VCO core. The decoupling member may comprise a transmission line the length of which is one quarter wavelength associated with a second-harmonic oscillation.

Abstract: A method for compensating an oscillation frequency, a device, and a phase locked loop (PLL) is applied in the LC oscillating loop, including: sending voltage control signals to one end of a variable capacitor of an LC oscillating loop to generate oscillating signals in the LC oscillating loop through the voltage control signals; obtaining variable bias voltage that reflects changes of external parameters; and sending the variable bias voltage to the other end of the variable capacitor to compensate changes to the oscillation frequency of oscillation signals generated in the LC oscillating loop. This disclosure compensates the changes to the oscillation frequency of the circuit that contains the LC oscillating loop and improves the stability of the circuit oscillation frequency by sending bias voltage to one end of the variable capacitor of the LC oscillating loop.

Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.

Abstract: A PLL circuit comprises a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator (VCO), and two variable voltage sources. The phase detector and the charge pump each comprises low-voltage transistors, and operates with a fixed supply voltage VCC1 (e.g., 5 V) which is a potential difference applied from the variable voltage source of a power-supply voltage VL and the variable voltage source of a power-supply voltage VDC (=VL+VCC1). A tuning control signal VC generated by integrating an output current signal of the charge pump using the loop filter is input to the VCO having an input voltage range of the tuning control signal from 0 V to VCC2 (e.g., 16 V).

Abstract: A power-oscillator-starting circuit for an electronic high frequency induction-heater driver. The induction-heater driver, upon receipt of a turn-on signal, generates a high frequency alternating current, wherein the alternating current through an induction-heater coil is magnetically coupled to an appropriate loss component for a variable-spray fuel-injection system. The induction-heater driver uses a power oscillator that is started and restarted as is appropriate based on a threshold current limit referenced to the supply voltage of the induction-heater driver.

Abstract: A voltage-controlled oscillator robust against power supply includes: a regulating unit configured to maintain a virtual power supply of a VCO core circuit in a stable condition with regard to a reference voltage; and a power supply removal unit including second transistors configured to correspond to respective first transistors of the regulating unit, the power supply removal unit being configured to remove power noise of the virtual power supply by using negative feedback through a closed-circuit loop formed by each of the first and second transistors.

Abstract: The invention pertains to a method for exciting a resonant element of a microstructure, this element being mobile according to one degree of freedom. The method comprises a step for applying a charged particle beam to said microstructure, the beam being configured so as to drive the element in an alternating motion depending on its degree of freedom.

Abstract: A voltage source circuit for a crystal oscillation circuit is provided, in which the voltage source circuit and the crystal oscillation circuit are formed with the same process. The voltage source circuit includes a current source, a first PMOS, a first NMOS and a regulator unit. The current source is coupled between a voltage source and an output terminal, in which the output terminal outputs a reference voltage. Both of the gates and drains of the first PMOS and the NMOS are coupled to each other, and the first PMOS and the first NMOS are coupled between the output terminal and a ground. The regulator unit generates a work voltage to the crystal oscillation circuit as a voltage source of the crystal oscillation circuit according to the reference voltage.

Abstract: An apparatus comprising a transconductance control circuit, a boost control circuit, a current computation circuit and an oscillator circuit. The transconductance control circuit may be configured to generate a current control signal in response to (i) a voltage control signal and (ii) a plurality of range control signals. The boost control circuit may be configured to generate a current boost signal in response to a reference current signal and an enable signal. The current computation circuit may be configured to generate a first control signal and a second control signal in response to the current boost signal and the current control signal. The oscillator circuit may be configured to generate an output signal oscillating at a particular frequency in response to the first control signal and the second control signal.

Abstract: A voltage generating circuit generates a voltage for driving an ultrasonic oscillator, and includes a multi-stage connected power supply circuit without a transformer.

Abstract: A voltage control oscillator implemented in an integrated circuit includes a supply circuit and an oscillating circuit. The supply circuit, implemented with an input/output (I/O) interface element, receives an I/O reference voltage signal and provides a power signal accordingly. The oscillating circuit, implemented with a core circuit element, provides an oscillation signal in response to the power signal. A swing of the oscillation signal is determined according to a level of an I/O reference voltage signal.

Abstract: In accordance with some embodiments of the present disclosure, an oscillator may include a crystal resonator and a squaring circuit coupled to the crystal resonator and configured to convert a sinusoidal signal produced by the crystal resonator to a square-wave signal, the squaring circuit comprising a bias circuit configured to transmit a selected bias voltage for the squaring circuit, the selected bias voltage selected from a plurality of potential bias voltages. In accordance with this and other embodiments of the present disclosure, an oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, and a programmable voltage regulator coupled to the inverter. The programmable voltage regulator may be configured to supply a first supply voltage to the inverter during a startup duration of the oscillator, and supply a second supply voltage to the inverter after the startup duration, wherein the second supply voltage is lesser than the first supply voltage.

Abstract: A semiconductor device having a phase-locked loop (“PLL”) (100) drives a VCO (114) of the PLL circuit with a first control voltage (VCTRL) produced by a loop filter (112) when a first clock signal (clk_ref) is present. The VCO produces an output frequency while the PLL circuit is operating off the first clock signal. When the first clock signal is lost (ref_lost), a control voltage maintenance circuit (120) produces a second control voltage maintaining the VCO output frequency. In one device, the control voltage maintenance circuit includes a phase-frequency detector (104) that can operate off of either the clock reference signal or a master clock signal. In an alternative device, the control voltage maintenance circuit includes a voltage generator (334, 362) that produces a generated voltage that drives the loop filter when lock is lost.

Abstract: One embodiment of the oscillator includes a first starved inverter and a second starved inverter. An inner inverter of the second starved inverter is cross-coupled to an inner inverter of the first starved inverter. The oscillator further includes a first inverter connected to output of the inner inverter of the first starved inverter, and a second inverter connected to output of the inner inverter of the second starved inverter.

Abstract: An oscillator creates a reference voltage based on a pulse signal corresponding to an oscillation output of a crystal oscillation circuit and controls a supply voltage to the crystal oscillation circuit according to the reference voltage. A control signal creating circuit creates a control signal based on the pulse signal and reference voltage generating circuits that control the reference voltage based on the control signal. The control signal creating circuit creates a low-level control signal when the pulse signal is in a low level, creates a high-level control signal when the pulse signal is in a high level, and prevents transition of the control signal from the high level to the low level.

Abstract: Embodiments of a multi-band voltage controlled oscillator (VCO) are provided herein. The multi-band VCO is configured to adjust a frequency of an output signal based on an input signal. The multi-band VCO includes a tank module, an active module, and a control module. The tank module includes a parallel combination of a capacitor and an inductor. The active module includes a pair of cross-coupled transistors that are configured to provide a negative conductance that cancels out a positive conductance associated with the tank module. To improve the phase noise associated with the multi-band VCO, the control module is configured to adjust the body voltage of the cross-coupled transistors.

Abstract: A semiconductor device includes an antenna circuit for receiving a wireless signal, a power supply circuit generating power by the wireless signal received by the antenna circuit, and a clock generation circuit to which power is supplied. The clock generation circuit includes a ring oscillator which self-oscillates and a frequency divider which adjusts frequency of an output signal of the ring oscillator in an appropriate range. A digital circuit portion is driven by a clock having high frequency accuracy, so that a malfunction such as an incorrect operation or no response is prevented.

Abstract: A PLL circuit comprising an oscillation unit, a frequency division unit, a phase comparison unit, and a generation unit comprises a switching unit that switches between a first state in which a control voltage output from the generation unit is input into the oscillation unit and a second state in which a reference voltage is input into the oscillation unit; and a correction unit that, in the second state, compares the control voltage output from the generation unit with the reference voltage, and corrects a frequency at which the oscillation unit oscillates with respect to a voltage input into the oscillation unit, such that the control voltage output from the generation unit is equivalent to the reference voltage.

Abstract: Aspects of the disclosure provide a voltage controlled oscillator. The voltage controlled oscillator can include a plurality of oscillation stages coupled together to generate an oscillation signal having an oscillation frequency. At least one oscillation stage of the plurality of oscillation stages can include a first portion driven by a first driving power that can be a function of a control voltage and a second portion driven by a second driving power that can be substantially independent of the control voltage. The first driving power can be provided by a first power rail in the form of a driving current that is a function of the control voltage. The second driving power can be provided by a second power rail in the form of a substantially constant voltage that is substantially independent of the control voltage.

Abstract: A voltage source circuit for a crystal oscillation circuit is provided, in which the voltage source circuit and the crystal oscillation circuit are formed with the same process. The voltage source circuit includes a current source, a first PMOS, a first NMOS and a regulator unit. The current source is coupled between a voltage source and an output terminal, in which the output terminal outputs a reference voltage. Both of the gates and drains of the first PMOS and the NMOS are coupled to each other, and the first PMOS and the first NMOS are coupled between the output terminal and a ground. The regulator unit generates a work voltage to the crystal oscillation circuit as a voltage source of the crystal oscillation circuit according to the reference voltage.

Abstract: A method for compensating an oscillation frequency, a device, and a phase locked loop (PLL) is applied in the LC oscillating loop, including: sending voltage control signals to one end of a variable capacitor of an LC oscillating loop to generate oscillating signals in the LC oscillating loop through the voltage control signals; obtaining variable bias voltage that reflects changes of external parameters; and sending the variable bias voltage to the other end of the variable capacitor to compensate changes to the oscillation frequency of oscillation signals generated in the LC oscillating loop. This invention compensates the changes to the oscillation frequency of the circuit that contains the LC oscillating loop and improves the stability of the circuit oscillation frequency by sending bias voltage to one end of the variable capacitor of the LC oscillating loop.

Abstract: Low voltage oscillators that provide a stable output frequency with varying supply voltage are provided. The subject oscillators find use in a variety of different types of devices, e.g., medical devices, including both implantable and ex-vivo devices.

Abstract: A power supply voltage output circuit includes: a power supply voltage generation unit generating a power supply voltage to be supplied into a ring oscillator; a reference clock oscillator oscillating a reference clock with respect to a clock oscillated by the ring oscillator; a phase difference detection unit detecting a phase difference between the clock from the ring oscillator and the reference clock from the reference clock oscillator; a filter unit smoothing an output of the phase difference detection unit; and a PWM signal generation unit generating a PWM signal based on an output of the filter unit such that the phase difference approaches zero.

Abstract: A design structure embodied in a machine readable medium used in a design process includes an interleaved voltage-controlled oscillator, including a ring circuit of main logic inverter gates; a plurality of delay elements connected in parallel with a selected sequence of the main logic inverter gates; wherein each delay element comprises a feedforward section, comprising controls for regulating signal transmission through feedforward elements responsive to one or more control voltages; and a proportional section for regulating signal transmission through at least one logic inverter gate; at least one temperature compensation circuit responsive to a compensating voltage input that is proportional to temperature; an electronic circuit in communication with the temperature compensation circuit and configured to provide a voltage signal responsive to temperature; an amplifier in connection with the electronic circuit to amplify the voltage signal; and a DC offset generator configured to adjust the voltage of the

Abstract: An oscillator circuit includes differential variable delay circuits coupled together to form a ring oscillator. Each of the differential variable delay circuits has first and second inputs and first, second, third, and fourth transistors. A constant supply voltage is provided to sources of the first and the second transistors in each of the differential variable delay circuits. A variable supply voltage is provided to sources of the third and the fourth transistors in each of the differential variable delay circuits. Gates of the first and the third transistors are coupled to the first input. Gates of the second and the fourth transistors are coupled to the second input. The oscillator circuit generates a periodic output signal having a frequency that varies based on changes in the variable supply voltage.

Abstract: A voltage-controlled oscillator includes a voltage regulator, and a delay unit. The voltage regulator independently receives a first oscillation control signal and a second oscillation control signal to provide a regulated voltage signal which is represented by a regular ratio of combination of the first and second oscillation control signals, and the regulated voltage signal is feedback to the voltage regulator. The delay unit generates an output signal having a frequency varying in response to the regulated voltage signal.

Abstract: An oscillator circuit generates a constant delay time by use of a current source and a load element to determine a frequency of a clock. The oscillator circuit includes an integrator which integrates the clock, a first comparator which compares an output voltage of the integrator with a reference voltage, and a variable current source which changes a current in accordance with the comparison result of the first comparator. The frequency is corrected in accordance with the current of the variable current source.

Abstract: An oscillator, includes an amplifier circuit including a semiconductor element having a first constant potential as reference potential for a power supply voltage, a variable capacitance element, a piezoelectric resonator, and a capacitance circuit constituting a closed circuit with the piezoelectric resonator. The amplifier circuit and the variable capacitance element are connected in series to provide a series circuit. The capacitance circuit connects the capacitance elements in a plurality of numbers in series. A connecting midpoint of the series connection is connected to a circuit for the first constant potential. Two connecting midpoints other than the midpoint of the closed circuit are used as connecting points to connect the series circuit and the closed circuit in parallel.

Abstract: This invention discloses a clock generator capable of automatically adjusting output clock when process, voltage, or temperature variation occurred. The clock generator comprises a current generator, for generating a first current and a second current according to a control voltage; a oscillator, coupled to the current generator, for generating a clock signal according to the first current; and a voltage adjuster, coupled to the current generator and the oscillator, for adjusting the control voltage according to the clock signal and the second current; wherein, when the signal frequency of the clock signal changed, the voltage adjuster correspondingly adjusts the control voltage so as to adjust the first current.

Abstract: A supply-regulated Phase-locked loop (PLL) is provided. The PLL comprises a supply-regulating loop, a voltage-controlled oscillator (VCO), and a programmable decoupling capacitor array for the VCO. The capacitance of the VCO decoupling capacitor array is adjustable to be equal to N times CUNIT, where N is the current value of a multiplication factor of a divide-by-N circuit and CUNIT is a unit capacitance characterized for a processing technology chosen for fabricating the decoupling capacitor array. When the PLL switches from one frequency band to another, a higher-order pole introduced by the VCO decoupling capacitor tracks the PLL reference frequency, thus improving the PLL operational stability.

Abstract: A delay circuit includes a delay unit having a first and a second power supply terminals, a pair of differential signal input terminals and a pair of differential signal output terminals. The signals entered to the pair of differential signal input terminals are delayed and output at the pair of differential signal output terminals. The delay circuit also includes a current controller that exercises control to cause a current of a current source, controlled by a current control terminal, to flow through the first and second power supply terminals of the delay unit. The delay circuit also includes a voltage controller that exercises control to provide for a constant potential difference between the first and the second power supply terminals (FIG. 1).

Abstract: To drive an oscillator always at a stable and constant oscillation even if frequency and amplitude of a power supply voltage differ depending on a delivery destination of the oscillator, an oscillator drive control device (10), which generates a predetermined switching pattern by operating a switching element, and supplies an oscillation generation unit (7) of the oscillator with drive electric power for generating predetermined oscillation frequency and amplitude according to the switching pattern, includes: a voltage detection circuit (11) for detecting a power supply voltage unique to a delivery destination of the oscillator; a memory circuit (12) storing, in advance, a basic switching pattern adapted to an arbitrarily set reference voltage, and used for driving the oscillation generation unit (7) at proper oscillation frequency and amplitude; and an arithmetic processing circuit (13) for calculating a ratio of the detected voltage unique to the delivery destination detected by the voltage detection circui

Abstract: Disclosed is an oscillator circuit, comprising a crystal oscillator, an amplifier having an input and an output coupled across the crystal oscillator, a comparator having a reference input and an input coupled to the crystal oscillator and a pole network coupled between the comparator and the amplifier.

Abstract: An integrated circuit incorporating a bias circuit for a current-controlled oscillator (ICO) with improved power supply rejection ratio (PSRR) is described. The bias circuit for the ICO includes two error amplifiers. The first error amplifier regulates the bias voltage, VBN, referenced to a ground supply (GND). The second error amplifier regulates the bias voltage, VBP, referenced to a positive power supply (VDD). The VBP and VBN bias voltages have improved PSRR relative to conventional ICO bias circuits for noise injected into VDD and GND.

Abstract: A gain circuit of an oscillator circuit includes an inverter portion having an input IN and an output OUT arranged for connection to an external feedback circuit comprising a pi network. A feedback member having a first resistive element is coupled between the input IN and output OUT. An offset sense and correction block (OSCB) is configured to detect a dc offset potential difference between said input IN and output OUT and to reduce the offset potential by supplying a current to said input IN.

Abstract: The present invention is a self-calibrating, dual-band, wide range LC tank Voltage Controlled Oscillator (VCO) system. The system may include a first Voltage-Controlled Oscillator (VCO) and a second Voltage-Controlled Oscillator (VCO). The system may further include a calibration engine. The calibration engine may be configured for being connectable to at least one of the first VCO or the second VCO. The calibration engine may further be configured for automatically establishing/providing a VCO fix capacitor band code setting and a gear control setting for selectively activating or inactivating the first VCO and/or the second VCO. The calibration engine may be further configured for automatically comparing a VCO control voltage of the system to an allowable control voltage range for the system and may be further configured for automatically adjusting the VCO fix capacitor band code setting and/or the gear control setting when the VCO control voltage falls outside of the allowable control voltage range.

Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.

Abstract: To drive an oscillator always at a stable and constant oscillation even if frequency and amplitude of a power supply voltage differ depending on a delivery destination of the oscillator, an oscillator drive control device (10), which generates a predetermined switching pattern by operating a switching element, and supplies an oscillation generation unit (7) of the oscillator with drive electric power for generating predetermined oscillation frequency and amplitude according to the switching pattern, includes: a voltage detection circuit (11) for detecting a power supply voltage unique to a delivery destination of the oscillator; a memory circuit (12) storing, in advance, a basic switching pattern adapted to an arbitrarily set reference voltage, and used for driving the oscillation generation unit (7) at proper oscillation frequency and amplitude; and an arithmetic processing circuit (13) for calculating a ratio of the detected voltage unique to the delivery destination detected by the voltage detection circui

Abstract: There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. The frequency-variable oscillator includes: a voltage-to-current converter circuit for converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit for varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency.

Abstract: An apparatus for generating an oscillating signal that includes a circuit to accelerate the time in which an oscillating signal reaches a defined steady-state condition from a cold start. The apparatus includes an oscillating circuit to generate an oscillating signal; a first circuit to supply a first current to the oscillating circuit; and a second circuit to supply a second current to the oscillating circuit, wherein the first and second currents are adapted to reduce the time duration for the oscillating signal to reach a defined steady-state condition. The apparatus may be useful in communication systems that use low duty cycle pulse modulation to establish one or more communications channels, whereby the apparatus begins generating an oscillating signal at approximately the beginning of the pulse and terminates the oscillating signal at approximately the end of the pulse.

Abstract: A device including a voltage regulator with an adaptive switching frequency circuit for noise-sensitive analog circuits, such as oscillatory systems with phase-lock loops (PLLs) and voltage-controlled oscillators (VCOs) is described. In an exemplary embodiment, the device includes a reference clock oscillator, a low-jitter oscillator, a power supply including a clock signal input to regulate a power supply voltage for the low-jitter oscillator, a clock detector to generate a clock detector control signal when the low-jitter oscillator output frequency is stable, and a multiplexer to select between a reference clock oscillator output signal and a low-jitter oscillator output signal as the clock signal input to the power supply to mitigate effects of period jitter in the low-jitter oscillator output signal when the clock detector control signal is asserted.

Abstract: A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.