Abstract: An oscillator for use in pulse communication of pulse signals with a startup latency and a pulse oscillation signal (such as for use in a transmitter for OOK pulse communication with pulse modulation). The oscillator includes an LC resonator having a tank impedance, and including a high-side node (Vp), and a low-side node Vn, and having a tank voltage corresponding to [Vp-Vn]. A pulse startup circuit, includes a PMOS transistor with a source connected to a supply voltage VDD, and a drain connected through a resistance R to the Vp node (where R is significantly larger than the tank impedance), and connected to an attenuation capacitance, in parallel with the resistance R. The PMOS control terminal is coupled to receive a kick start pulse to initiate a pulse signal. the oscillator can include high-side and low-side pulse startup circuits.

Abstract: Various embodiments relate to a method for calibration of a center frequency of a BPF in an FSK transceiver, the method including the steps of filtering a carrier frequency signal by the BPF to produce a filtered signal, detecting, by a phase-frequency detector (“PFD”), a difference in phase between the carrier frequency signal and the filtered signal from the BPF, sweeping a calibration code of the BPF, detecting a transition in the sign of the phase difference and capturing a calibration code associated with the transition in the sign of the phase difference for calibration of the BPF.

Abstract: Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

Abstract: Power is provided from a power source and a status of the power source is signaled by controlling a waveform of an AC voltage generated from the power source. The status may include, for example, a capacity of the power source. In some embodiments, a frequency of the AC voltage may be controlled to signal the status. The power source may include, for example, an uninterruptible power supply (UPS), and signaling a status of the power source may include controlling an inverter of the UPS to signal the status. Related systems are also described.

Abstract: A radio network node comprised, and a wireless device configured to be operative, in a wireless communication system. The radio network node obtains downlink data and converts it to a baseband signal. The conversion comprises Gaussian Minimum Shift Keying (GMSK) modulation of the downlink data. The modulation applies a negative modulation index selected based on a type of wireless device that is a target for the downlink data. A radio signal is provided based on the baseband signal and sent to, and received by, the wireless device that provides user data based on the radio signal.

Abstract: A system includes a first entropy-based random number generator (RNG) circuit configured to produce a bit stream and a key generator configured to generate encryption keys using bits from the bit stream. The system also includes an encryption engine configured to encrypt bits from the bit stream and a de-multiplexer configured to receive the bit stream from the first entropy-based RNG circuit and to provide a first set of bits from the bit stream to the key generator for generation of an encryption key and a second set of bits from the bit stream to the encryption engine for encryption to produce an encrypted output value.

Abstract: Exemplary embodiments include an electronic frequency-divider circuit comprising a multi-phase generator circuit configured to: receive an oscillating input signal having a frequency f; determine an integer divide ratio Q based on a first control signal input; and based on the oscillating input signal, generate an N-phase output signal having a frequency f-divided-by-M, wherein M is an integer and adjacent phases of the N-phase output signal are separated by 360-divided-by-(M-times-Q) degrees. The divider circuit can also include a control circuit configured to receive a control input and, based on the control input: provide the first control signal to the multi-phase generator circuit; and select a particular phase of the N-phase output signal. Exemplary embodiments also include a phase-locked loop circuits, transceiver circuits, radio stations, and methods of frequency-dividing an oscillating signal.

Abstract: A frequency divider includes first circuitry, second circuitry, and third circuitry. The first circuitry includes divide-by-two (div2) frequency divider circuitry, and the second circuitry includes additional circuitry for a divide-by-three (div3) frequency divider. The second circuitry is selectively enabled using a control signal and can receive signals from the first circuitry when enabled. Specifically, the second circuitry is enabled in the div3 mode but is not enabled in the div2 mode. The third circuitry receives signals from the first circuitry and also receives signals from the second circuitry when the second circuitry is enabled. The first circuitry and the third circuitry function as a div2 frequency divider when the second circuitry is not enabled. The first circuitry, the second circuitry, and the third circuitry function as a div3 frequency divider when the second circuitry is enabled.

Abstract: Calibrating a Gaussian frequency-shift keying modulation index includes generating a training sequence of bits, shaping a pulse from the training sequence according to an initial modulation index, and converting the shaped signal to a transmission signal. The transmission signal is then either looped through a radio frequency core or processed by frequency deviation estimation hardware to determine a frequency deviation. The frequency deviation is converted to a new modulation index, and potentially a ratio between a target modulation index and a measured modulation index as a scaling factor. The process is then iteratively repeated until a threshold frequency deviation is achieved.

Abstract: A method and apparatus are provided. The method includes receiving, by a user equipment (UE), a phase shift keying (PSK) modulated signal from a transceiver, derotating the PSK modulated signal, and equalizing the PSK modulated signal using a maximum likelihood sequence estimator (MLSE) based on a first main tap gain (MTG) look up table (LUT) and a first inter-symbol interference (ISI) LUT corresponding to even time samples and a second MTG LUT and a second ISI LUT corresponding to odd time samples.

Abstract: Methods and apparatus for wired communications are disclosed. A method for transmitting a data stream through a wired communications channel includes encoding the data stream to produce a first baseband modulating signal I(t) and a second baseband modulating signal Q(t) whose amplitudes together represent a time series of complex symbols (I, Q) each selected from a two-dimensional (2-D) constellation of symbols distributed on the phase plane about the origin such that at least one of the baseband modulating signals has a substantially non-zero mean amplitude, modulating the baseband signals I(t) and Q(t) to produce a modulated signal, wherein the I(t) and Q(t) components of the modulated signals are generally fixed in quadrature, and providing the modulated signal to a wired communications channel.

Abstract: A direct digital frequency synthesis method comprises the following steps: calculating, by a phase accumulation module, a first phase according to a frequency synthesis word (S101); finding an amplitude value by a preset sinusoidal lookup table according to the first phase (S102); finding a second phase by a preset phase lookup table according to the amplitude value (S103); if the second phase is less than the first phase, adjusting and outputting the amplitude value (S105); or else, outputting the original amplitude value (S106); and performing, by a digital-to-analog converter, a digital-to-analog conversion according to the output amplitude value to obtain a sinusoidal wave (S107); wherein, for a N-bit phase accumulation module and a D-bit digital-to-analog converter, the preset phase lookup table has 2D?1-1 phase boundary value records corresponding to 0˜2D?1-2 amplitudes, each phase boundary value is stored in N-2 bits. A direct digital frequency synthesizer applying the above method is also disclosed.

Abstract: A predistortion system for optimizing the performance of a distorting component. The predistortion system comprises a signal generator, the distorting component, an analyzing device for frequency and/or time domain analysis, and a predistortion device. The signal generator generates a first signal according to a reference signal. Furthermore, the first signal after being passed through the distorting component results in a second signal. Then, the second signal after being passed through the analyzing device results in a third signal. Moreover, the third signal after being passed through the predistortion device results in a compensated signal. In addition to this, the reference signal is provided for the predistortion device.

Abstract: A terminal device is capable of communicating with a master wireless device. The terminal device includes a control circuit. The control circuit has operating modes including a normal mode for outputting startup information relating to startup of the terminal device, and a registration mode for outputting registration information relating to registration with the master wireless device. One of the operating mode of the control circuit shifts to the registration mode based on timing of plural startups of the terminal device. The terminal device can shift to the registration mode using the same operation and mechanism as operating in the normal mode.

Abstract: A wireless power transmitter in which an adjustment of the operating frequency is performed by selecting a signal from two or more signals having different frequencies as a carrier signal, the selected signal having a frequency corresponding to data included in the packet, the two or more signals has a resonant frequency for resonance coupling with the wireless power receiver and a frequency within a predetermined frequency from the resonant frequency, and the two or more signals at the resonant frequency and the frequency within the predetermined frequency range indicates a first data value and a second data value which is different from the first data value respectively.

Abstract: A radio transmission method which includes a steps of simulation of a phase modulation of a radio carrier by the successive transmission of a carrier of a main frequency f and of a carrier of an offset frequency f+?f, the offset frequency having a frequency difference suitable for simulating a given phase shift of the main frequency at the end of a given time T. The invention further relates to a radio transmission device for implementing the method which includes a radio integrated circuit for generating programmable frequency modulation, means for programming, in this radio integrated circuit, the main frequency f and the offset frequency f+?f and means for driving this radio integrated circuit in order to generate the frequencies as a function of the signal to be transmitted.

Abstract: A radio frequency (RF) transmitter includes a power amplifier comprising a plurality of power amplifier cells. At least one digital signal processing module of the RF transmitter is operably coupled to the power amplifier and comprises at least one digital pre-distortion component arranged to apply at least one digital pre-distortion codeword to the plurality of power amplifier cells, wherein the at least one digital pre-distortion codeword is applied to at least one of the plurality of power amplifier cells via a digital filter. A combiner is arranged to combine outputs of the plurality of power amplifier cells thereby generating an analogue RF signal for transmission over an RF interface based at least partly on the digitally filtered at least one digital pre-distortion codeword.

Abstract: A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL.

Abstract: Various examples of methods and systems are provided for generation of correlated finite alphabet waveforms using Gaussian random variables in, e.g., radar and communication applications. In one example, a method includes mapping an input signal comprising Gaussian random variables (RVs) onto finite-alphabet non-constant-envelope (FANCE) symbols using a predetermined mapping function, and transmitting FANCE waveforms through a uniform linear array of antenna elements to obtain a corresponding beampattern. The FANCE waveforms can be based upon the mapping of the Gaussian RVs onto the FANCE symbols. In another example, a system includes a memory unit that can store a plurality of digital bit streams corresponding to FANCE symbols and a front end unit that can transmit FANCE waveforms through a uniform linear array of antenna elements to obtain a corresponding beampattern. The system can include a processing unit that can encode the input signal and/or determine the mapping function.

Abstract: According to one embodiment, an electronic thermometer includes a temperature sensing unit, a conversion unit, an FSK modulation unit, and a transmission unit. The temperature sensing unit detects the temperature of a subject. The conversion unit converts a result detected by the temperature sensing unit to a digital signal. The FSK modulation unit converts the digital signal from the conversion unit to an FSK modulation signal. The transmission unit outputs a transmission signal including a pilot signal having a frequency assigned to the FSK (frequency shift keying) modulation signal and the FSK modulation signal subsequent to the pilot signal.

Abstract: An optical transceiver comprising an optical signal input, a first modulation section coupled to the optical signal input, a second modulation section coupled to the optical signal input and positioned in serial with the first modulation section, wherein the first modulation section comprises a first digital electrical signal input, a first digital driver coupled to the first digital electrical signal input, and a first modulator coupled to the first digital driver, and wherein the second modulation section comprises a second digital electrical signal input, a second digital driver coupled to the second digital electrical signal input, and a second modulator coupled to the second digital driver, and an optical signal output coupled to the first modulation section and the second modulation section.

Abstract: A direct digital synthesizer (DDS) includes a phase increment calculator that determines a phase increment for a selected frequency; a phase accumulator that accumulates the phase increment over time and provides an accumulated phase value; a converter that converts the accumulated phase value to an analog signal at the selected frequency; and a phase preset calculator that determines a phase preset value for the selected frequency. The phase accumulator resets the accumulated phase value to the phase preset value at a transition to the selected frequency in a phase coherent mode.

Abstract: An optical transceiver comprising an optical signal input, a first modulation section coupled to the optical signal input, a second modulation section coupled to the optical signal input and positioned in serial with the first modulation section, wherein the first modulation section comprises a first digital electrical signal input, a first digital driver coupled to the first digital electrical signal input, and a first modulator coupled to the first digital driver, and wherein the second modulation section comprises a second digital electrical signal input, a second digital driver coupled to the second digital electrical signal input, and a second modulator coupled to the second digital driver, and an optical signal output coupled to the first modulation section and the second modulation section.

Abstract: A method for generating a compound signal wave with one or more substantially sinusoidal waveform(s) containing an encoded digital information combined with a variable phase changing waveform(s) producing a compound sinusoid waveform that includes at least a sine wave that is amplitude-time modulated and at least one phase modulated wave(s).

Abstract: Circuitry for converting a multi-level signal into at least one binary signal, having a period T and comprising n signal levels, includes comparing and splitting circuitry configured for comparing a value of the multi-level signal with (n?1) different reference values, and having N sets of (n?1) output terminals for outputting N sets of (n?1) output signals indicating whether the value of the multi-level signal is below or above the (n?1) reference values. The circuitry also includes N sets of (n?1) sample-and-hold circuits having an input and an output and being configured for operating at a clock period N*T, wherein each output terminal is connected to the input of a sample-and-hold circuit. Further, the circuitry includes logical circuitry connected to the outputs of the N sets of (n?1) sample-and-hold circuits for generating at least one binary signal having a period N*T.

Abstract: There is provided a high frequency transceiver appropriate for ultra low power and high frequency characteristics. The high frequency transmitting device includes a voltage controlled oscillator configured to provide an oscillation signal; and a power amplifier configured to multiply the oscillation signal by an integer to generate a carrier signal, mix the carrier signal and a baseband signal to generate a mixed signal, and amplify power of the mixed signal.

Abstract: Methods and apparatuses for compensating for frequency mismatch between a base station and mobile station are disclosed. At a first oscillator, a fixed reference oscillation signal is generated. At a second oscillator, a baseband oscillation signal is generated. A frequency divided version of the baseband oscillation signal is locked to a frequency divided version of the first reference oscillation signal. At a third oscillator, a first RF oscillation signal is generated. A frequency divided version of the first RF oscillation signal is locked to the frequency divided version of the second reference oscillation signal. A frequency adjustment signal is inputted to the second and third oscillators. At the second and third oscillators, frequency errors of the baseband oscillation signal and first RF oscillation signal, respectively, are compensated based on the frequency adjustment signal.

Abstract: A method of generating a transmission signal may include mixing a baseband signal assigned for transmission within a narrow frequency range (“assigned narrow frequency range”) included in a wireless communication channel to produce a shifted signal. The shifted signal may have a shifted frequency that is based on a shift from the assigned narrow frequency range toward a center frequency of the wireless communication channel by a frequency offset. The method may further include shifting a modulation frequency of a modulating signal toward the assigned narrow frequency range frequency range and away from the center frequency by the frequency offset. Additionally, the method may include mixing the shifted signal with the modulating signal to produce a transmission signal having a transmission frequency within the assigned narrow frequency range.

Abstract: An apparatus, method and system is described herein for providing multiple maximum current configuration options including corresponding turbo frequencies for a processing device. Available options for a processor are determined by initialization code. And based on platform electrical capabilities, an optimal one of the multiple current configuration options is selected. Moreover, during runtime another current configuration is dynamically selected based on current configuration considerations to provide high flexibility and best possible performance per part and computing platform.

Abstract: A memristor-based emulator including a memristor circuit for use in digital modulation that includes a first current feedback operational amplifier (CFOA) having multiple terminals in communication with a capacitor Cd and in further communication with a resistor Ri. A second CFOA having multiple terminals is in communication with the first CFOA and is adapted to be in further communication with a voltage vM to provide an input current iM for integration by a capacitor Ci. A nonlinear resistor is in communication with the second CFOA. A third CFOA having multiple terminals is in communication with the nonlinear resistor and is in further communication with the first CFOA and a resistor Rd. The third CFOA and the resistor Rd act as an inverting amplifier associated with the nonlinear resistor to increase a current gain to increase a difference between ON and OFF values of a resistance of a realized memristor.

Abstract: A modulator for an electrical signal comprises a data input port and a clock frequency input port. The modulator also comprises a first phase shifter for subjecting input clock frequency signals to a phase shift and adapted to keep the phase of an input clock frequency signal aligned with the phase of a data stream which is input at the data input port. The modulator also comprises a first XOR gate with an output port, to which first XOR gate said input ports of the modulator are connected, by means of which a BPSK signal is created at the output port when a first data stream is connected to the data input port and a first clock frequency signal is connected to the clock frequency input port.

Abstract: A digital data signal, such as a digital video signal, is intentionally pre-distorted before being sent over a network. In one embodiment, this pre-distortion may be performed in accordance with a pre-distortion pattern or algorithm which is shared with only intended receivers. The pre-distortion pattern may be used to vary the pre-distortion on a periodic basis, as frequently as on a symbol-by-symbol basis. The pre-distortion function may include distorting the phase and/or the amplitude of the digital signal's modulation.

Abstract: A radio transmitter includes a signal processing circuit splitting a basic modulating signal into first and second modulating signals and outputting the first and second modulating signals. A PLL decides a fundamental wave. A VCO forms a portion of the PLL and modulates the fundamental wave decided by the PLL in accordance with a voltage of the first modulating signal outputted from the signal processing circuit. A PLL circuit forms a portion of the PLL and varies a frequency division ratio to modulate the fundamental wave decided by the PLL in accordance with the second modulating signal outputted from the signal processing circuit.

Abstract: A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel.

Abstract: A technique for adjusting a phase relationship among modulation symbols is disclosed. A method embodiment of this technique comprises the steps of applying to a sequence of modulation symbols a phase ramp that continuously increases over the duration of the symbol sequence, and applying a compensation phase to each modulation symbol to introduce a phase offset between two subsequent modulation symbols. The joint application of the phase ramp and the compensation phase can be used to establish a saw tooth-like phase characteristic over the sequence of modulation symbols. In one embodiment, the phase ramp is applied in the context of impressing a frequency shift on the modulation symbols.

Abstract: A method for driving a spin valve element, including passing driving current through the spin valve element to generate an oscillation signal, and performing amplitude modulation of the driving current at a frequency lower than the oscillation frequency of oscillation signals. This amplitude modulation can be ON-OFF modulation, and the interval ton in the conducting state of the ON-OFF modulation is made to satisfy the relation ton<D2/?, where ? is the thermal diffusivity of the heat diffusion portion, and D is the thickness of the heat diffusion portion.

Abstract: A radio transmitter system responsive to a binary signal drives a narrow bandwidth VLF or LF antenna. A generator derives a first variable frequency wave frequency coded based on bit values of a binary signal. An arbitrary impulse response signal processor responsive to the first wave derives a first output signal having real and imaginary components representing the shape of a modulating wave having a variable amplitude envelope and the frequency of the coded values. A transmitter responsive to the processor output signal and a VLF or LF carrier supplies the antenna with another output signal including a modulation wave having a shape that is a substantial replica of the modulating wave shape. The processor causes the signal emitted by the antenna system to include modulation having a shape that is substantially the shape of the first wave.

Abstract: A method of providing secure communications over a network includes receiving, at a receiving computer, a public key of a sending computer, and a hash of a sending random number over a first communication channel, transmitting, from the receiving computer, a public key of the receiving computer and a receiving random number provided by the receiving computer over the first communication channel, and receiving, at the receiving computer, the sending random number provided by the sending computer over the first communication channel.

Abstract: The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

Abstract: Various embodiments relate to a transmission circuit and related method of shaping the transmission spectrum of a carrier signal. The transmission circuit may comprise a plurality of switching amplifier stages that are controlled by a modulation sequence produced by a transmission (TX) modulator. The TX modulator may receive the transmission data as a sequence of bit groups and may produce a modulation sequence including a plurality of control bits that may drive each of the switching amplifier stages. In some embodiments, one or more pulse-shaping filters may modify in-phase (I) and quadrature (Q) phase components of the transmission data. The modified components may directly shape spectral content of the output signal produced by a transmission driving circuit. Higher quantities of amplifier stages included in the transmission driving circuit may add higher granularity to the shape of the spectrum of the output signal.

Abstract: A quadrature demodulation circuit includes: first to fourth mixers to receive a modulation signal; a phase shifter to supply to the first and third mixers a first local frequency signal, to supply to the second mixer a second local frequency signal having a designated phase difference relative to the first local frequency signal, and to supply to the fourth mixer a third local frequency signal that is an inverse in phase to the second local frequency signal; a first adder to add a signal output from the first mixer and a signal output from the second mixer and to output a first demodulation signal; and a second adder to add a signal output from the third mixer and a signal output from the fourth mixer and to output a second demodulation signal.

Abstract: A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one loop gain calibration result by performing loop gain calibration based upon signals of at least a portion of the transmitter, and obtaining at least one resistance-capacitance (RC) detection result by performing RC detection on the portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein, wherein the RC detection result corresponds to a detected value representing a product of a resistance value and a capacitance value, and the digital compensation filter includes a gain compensation module and an RC compensation module; and tuning the digital compensation filter by respectively inputting the loop gain calibration result and the RC detection result into the gain compensation module and the RC compensation module. An associated digital compensation filter and an associated calibration circuit are also provided.

Abstract: Provided is a modulation device including a signal selection circuit selecting two carrier signals from a plurality of carrier signals having the same frequency and the same phase difference according to a defined control signal and outputting the selected carrier signals, and a phase interpolator adjusting the phase in smaller units than the phase difference between the plurality of carrier signals according to the control signal and modulating the frequency or the phase of the carrier signal into a baseband signal based on the carrier signals selected by the signal selection circuit to generate a carrier wave signal.

Abstract: Provided are apparatuses and methods for digital FM modulation. In one example, a message signal is integrated by an integrator to transform the message signal into a complex signal. The complex signal may include at least two complex components that may interfere to produce an FM modulated carrier signal. Hence, in this example, the method and apparatus for digital FM modulation may produce an FM modulated carrier signal without phase shifting. In another example, a lookup table is not necessary for modulation of the carrier signal.

Abstract: A Gaussian Frequency Shift Keying/Frequency Shift Keying (GFSK/FSK) modulation circuit implemented in a digital manner comprises a frequency divider for dividing frequency of an inputted clock signal to get a sampling signal, a buffer coupled to the frequency divider for storing inputted data, an integrator coupled to the buffer for processing integration according to the data outputted from the buffer, a first read only memory coupled to the integrator for transferring the data outputted from the integrator according to a cosine function, and a second read only memory coupled to the integrator for transferring the data outputted from the integrator according to a sine function.

Abstract: In one embodiment, a switch provides output to a digital radio frequency (RF) modulator having a filtered input stage. The switch is configured to selectively provide a zero power data signal to the RF modulator based on a transient event control signal received at the switch.

Abstract: The invention relates to an automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol. The device has a microcontroller (110), which is assigned at least one clock generator (120) and one memory unit (150), and which is connected at least to one data source (140), which is designed to output a data bit-stream to be transmitted.

Abstract: There is provided a modulation circuit including a sampling unit that over-samples an input digital signal based on a multiplying clock signal, and outputs a first over-sampling signal, a first frequency conversion unit that outputs a first high-frequency signal based on the first over-sampling signal and a reference signal, a first filter unit that outputs a second high-frequency signal based on a second over-sampling signal obtained by delaying the first over-sampling signal by one clock and the reference signal, a second filter unit that outputs a third high-frequency signal based on a third over-sampling signal obtained by delaying the second over-sampling signal by one clock and the reference signal, and an adder unit that adds the first high-frequency signal, the second high-frequency signal, and the third high-frequency signal, and outputs an output signal.

Abstract: Aspects of a method and system for direct and polar modulation using a two input PLL are presented. Aspects of the system may include generating digital signals Wn and Vn from an input data signal Un and a feedback signal Yn. The generated digital signals Wn and Vn combined may carry the information content of Un while they compensate the non-idealities of the two-input analog phase locked loop (PLL). The digital signal Wn, which may be scaled appropriately in frequency, and the digital signal Vn may be provided as inputs to the PLL. The feedback signal Yn may be a digital signal that may correspond to the analog feedback signal Pt that may be generated by the PLL. Accordingly, the PLL may be adaptively controlled via the digital signals Wn and Vn for properly transmitting the input data signal Un.

Abstract: A frequency shift keying (FSK) demodulator includes a band-pass filter, an auto-calibration loop, a phase comparator, and an analog-to-digital converter. The band-pass filter is used for shifting phase of an FSK signal to generate a revised FSK signal. The auto-calibration loop is coupled to the band-pass filter for adjusting a center frequency of the band-pass filter. The first input end of the phase comparator is coupled to an output end of the band-pass filter, and the second input end of the phase comparator is used for receiving the FSK signal. The phase comparator is used for comparing the FSK signal with the revised FSK signal and outputting a comparison result. The analog-to-digital converter is coupled to the phase comparator for converting the results of the phase comparator into digital data. Similarly, a frequency modulation (FM) demodulator includes a band-pass filter, an auto-calibration loop, and a phase comparator.