Abstract: An apparatus is disclosed for generating an output signal in response to an input signal having a variable input level. The output signal has an output frequency which varies to represent variations in the input level. The apparatus comprises a processing circuit for implementing a digital signal processing algorithm to generate control signals in response to the input signal, which control signals are representative of the variable input level, and an oscillator circuit for generating the output signal in response to the control signals. The control signals include a first control signal representing a first output frequency, a second control signal representing a second output frequency, and at least one intermediate control signal representing output frequencies intermediate the first and second output frequencies.

Abstract: A modulation circuit that is particularly suited for a communication modem and provides for each of the channels precise carrier mark and space frequencies generated in response to external signals from an FSK communication station. The modulation circuit includes first and second frequency controlling circuits arranged with an inductor to form a resonant circuit of a voltage variable oscillator. The modulation circuit further includes a feedback control network and a voltage-frequency control adjustment circuit. The feedback control network generates a loop error signal applied to both frequency controlling circuits. The voltage-frequency control adjustment circuit generates a voltage-frequency adjustment control signal and has a switching circuit responsive to the external signals. The voltage-frequency control adjustment circuit includes an inverting network and a bias network.

Abstract: A Minimum-Shift Keying (MSK) modulator is described, wherein a feedback scheme is used in combination with a precise frequency reference to enable the production of MSK modulation at the output of an off-the-shelf voltage controlled oscillator (VCO). The upper and lower drive voltages for the VCO, corresponding to the upper and lower frequencies characteristic of MSK, are individually and independently corrected to compensate for imprecisions or fluctuations in the VCO characteristics. The correction increments are derived from phase excursion measurements over individual keying intervals.

Abstract: A phase locked loop frequency synthesizer with DC data modulation capability is described. This synthesizer includes an arrangement for detecting one of a plurality of FSK data levels (61), generating a corresponding predetermined compensation signal (71) and utilizing the compensation signal to substantially continuously compensate the frequency synthesizer for normal response to the detected data modulation level.

Abstract: A fractional-N synthesizer realizes automatic frequency control by adding (509) a digital representation of a determined frequency offset to a digital representation of applied modulation to create the modulus control of a programmable frequency divider (203).

Abstract: A modulator (14) and a demodulator (30) cooperate in a system (10) to communicate data at a high data rate using a pulse frequency modulation scheme (PFM). The modulator (14) receives data symbols in a FIFO memory (72) and applies the data symbols, after an adjustable delay, to a variable frequency oscillator (74) to control the frequency of a carrier waveform (16) generated by the oscillator (74). Circuits (76, 78, 98) monitor the carrier waveform (16) and couple to the FIFO memory (72) to control the advancing of data to the oscillator (74). Consequently, the carrir waveform (16) is capable of changing frequency at each half-cycle of the carrier waveform (16), and such changes occur only at zero-crossings of the carrier waveform (16). The carrier waveform (16) is applied through a transmission channel (22) to the demodulator (30). The demodulator (30) includes a comparison circuit (36-42) which produces bipolar signals describing positive and negative half-cycles of the carrier waveform (16).

Abstract: Vector modulation is effected by summing output signals from two phase modulators. The lack of amplitude modulation on the signals when summed permits non-linear processing of the signals, such as PLL frequency translation. In one embodiment, the phase modulators comprise fractional-N phase locked loops modulated with digital data words. In another, the phase modulators comprise direct digital synthesizers.

Abstract: A GMSK modem is provided and comprises a baseband modulator section and demodulator section coupled to an FM transmitter and receiver, respectively. The Modulator section includes a digital waveform generator for generating a GMSK baseband signal from a binary digital data source. The output of the waveform generator approximates the baseband signal output of a premodulation filter with a Gaussian impulse response having a normalized noise bandwidth of between 0.25 and 0.45 in series with a gain controlled amplifer. The gain is adjusted such that the modulation index of an RF signal modulated with the baseband signal is between 0.5 and 0.7.The demodulator section receives the analog output of a discriminator-based FM receiver with a phase equalized Butterworth IF filter. The demodulator section comprises a binary quantized loop bit timing recovery subsystem and one or the other of two data detectors.

Abstract: In a frequency-modulated frequency generator comprising an oscillator connected in a phase control loop, the reference frequency is generated in a digital frequency synthesizer which is adapted to be frequency-modulated by digital data signals; under control of the data signal, numerical values are alternately read out from a register to result in corresponding different frequency deviations; the register stores further predetermined additional numerical values which result in frequencies adjacent to said frequency deviations; the register is controlled by the data signal so that for every edge of the data signal predetermined additional numerical values are initially read out in such an order that the frequency values produced thereby will compensate for any overshooting which occurs upon switching between the drift frequencies.

Abstract: A modulation circuit is used in GMSK modulation system. The system includes I-channel and Q-channel ROM look-up tables, each preprogrammed for generating a representative digital waveform based on an input data stream and a clock signal. Each digital waveform is converted to an analog signal for subsequent radio frequency (RF) modulation. Each ROM is addressed by an interpolation counter controlled by a clock signal, by a data shift register receiving input data at a rate corresponding to the clock signal, and by an quadrant register, also receiving the input data, for specifying the phase of the data signal with respect to the clock signal. Additionally, a signal indicates a time at which synchronization to the system clock is required and such synchronization requires synchronizing at a non-integer bit interval time, and in response to that signal, the address of the ROMs is adjusted in order to modify the phase of the data signal so that it is consistent with the system clock requirement.

Abstract: Apparatus for generating an MSK signal by using a dual modulus frequency divider which divides an incoming digital clock signal of frequency f.sub.0 by the factors n and (n+1) in dependence on the data type of the data to be transmitted and in which the frequency f.sub.0, the data rate f.sub.d and the factor n are such as to satisfy the relationship f.sub.d =f.sub.0 .multidot.2/(n(n+1)).

Abstract: A frequency shift keying system for transmitting a signal which is a function of supplied data, includes first and second frequency generators producing first and second frequencies which differ in value by an amount which is a function of the maximum baud rate of the data. A counter is responsive alternately to one and the other of the two frequencies supplied thereto as a function of the data values for alternately counting up and down between values which differ by some given amount. The counter output in analog form is the transmitted signal. This system is particularly adapted to minimum frequency shift keying.

Abstract: A digital Non Return to Zero (NRZ) and Frequency Modulated (FM) radio transmitter intended but not unique to, for the transmission of Digital, Tone Only or Tone and Voice paging messages is described. This transmitter is built on the concept that the separate signals required are individually constructed, and then combined together into the actual RF output. This provides for optimized circuitry for each particular function for the highest performance. There is no reason for compromising the performance of a particular function, and the implementation of the modulation and synthesis with direct digital technology provides extremely linear and fast radio performance at no extra cost. Maintenance is also simplified since the individual blocks can be troubleshooted and repaired (or replaced) requiring a minimum of down time.

Abstract: A continuous phase shift modulation system wherein, for each of the in-phase and quadrature components, adjacent half-cosine pulses of the same polarity are joined by a continuous transition modulation signal which maintains continuity of the waveform and at least its first derivative. When this occurs, the other component signal is adjusted to maintain constant the vector sum of the component signals.

Abstract: Signal modulation apparatus for the transmission of binary data signals edying a process which results in superior side-lobe suppression compared with other forms of modulation such as frequency shift keying. The apparatus generates two carrier waves, the difference between whose frequencies is an integral multiple of the data signal bit-rate, amplitude modulates the two waves by a low-pass filtered data signal and an inverted version thereof respectively and then sums the resulting modulated waveforms to produce a frequency keyed waveform having continuous phase and almost negligible envelope ripple. The apparatus can be used with most forms of digital communication systems and may be demodulated by a conventional receiver such as ratio detector or phase-locked loop.

Abstract: A binary signal modulator includes a sampling circuit for sampling a binary signal at a predetermined sampling frequency, a modulating circuit responsive to the sampled binary signal for generating a modulating signal, the rising and decaying timings of which are respectively determined by the start and end times of the binary signal and the rising and decaying characteristics of which are respectively defined as predetermined functions, and a circuit responsive to the modulating signal for generating a modulated signal.