Abstract: A laminate defining a high-frequency laminated component includes a ground electrode on a bottom surface of a lowermost insulating layer. A second insulating layer includes an inner-layer ground electrode arranged over substantially the entire surface thereof. A portion from a third insulating layer to a fifth insulating layer is provided with a capacitor electrode defining a series capacitor of a ground impedance adjustment circuit and capacitor electrodes defining a first parallel capacitor and a second parallel capacitor. A sixth insulating layer has an inner-layer ground electrode provided over substantially the entire surface thereof. The inner-layer ground electrodes are arranged in electrical continuity with the ground electrode by via holes.

Abstract: A laminated inductor includes a ceramic body, a coil part including a plurality of first internal electrodes including connection portions at both end portions thereof and disposed in the ceramic body in a spiral shape, a second internal electrode including a lead electrode portion exposed to the outside of the ceramic body, having an internal area smaller than that of the first internal electrode, and disposed on or below the coil part in a spiral shape, and a connection electrode portion extended from the second internal electrode in a direction opposite to the lead electrode portion.

Abstract: In a common mode noise filter, first coil (12) includes first coil conductor (16) and second coil conductor (17) with spiral shapes. Second coil (13) includes third coil conductor (18) and fourth coil conductor (19) with spiral shapes. First coil conductor (16), third coil conductor (18), second coil conductor (17), and fourth coil conductor (19) are placed in this order from above. First metal layer (14) configured to be connected to a ground is provided above first coil conductor (16).

Abstract: The electronic component includes a substantially rectangular parallelepiped multilayer body formed by laminating a plurality of insulation layers, a capacitor including a plurality of capacitor conductor layers provided on the insulation layers, and a substantially spiral-shaped inductor including one or more inductor conductor layers provided on the insulation layers and having a center axis extending along the lamination direction. A mounting surface of the multilayer body is a surface of the multilayer body located on the end of one side of a first orthogonal direction orthogonal to the lamination direction. The inductor conductor layer and the capacitor conductor layer are provided on the first insulation layer. On the first insulation layer, an end portion of the capacitor conductor layer on the one side of the first orthogonal direction are closer to the mounting surface than an end portion of the inductor conductor layer on the one side of the first orthogonal direction.

Abstract: A Metal-Insulator-Metal on-die capacitor is described with partial vias. In one example, first and second power grid layers are formed in a semiconductor die. The power grid layers have power rails. First and second metal plates are formed in metal layers of the die between the power grid layers. Full vias extend from a power rail of the first polarity of the first power grid layer to a first side of the second metal plate and from a second side of the second metal plate opposite the first side of the metal plate to a power rail of the first polarity of the second power grid layer. Partial vias extend from the power rail of the first polarity of the second power grid layer and end at the second side of the second metal plate.

Abstract: Systems and methods for enhanced high frequency power bias tee designs are provided. In one embodiment, a bias tee network comprises: a first port configured to couple across a data line comprising a first electrically conducting line and a second electrically conducting line; a second port configured to couple to a power port of an electrical device; and a distributed impedance interface coupled between the power supply unit and the differential data line, wherein the distributed impedance interface includes a ferrite impedance gradation network having a plurality of ferrite impedance elements series coupled in an order of progressing impedance, wherein a low impedance end of the first ferrite impedance gradation network is coupled to the first port.

Abstract: The invention relates to a compact multi-level antenna including: a ground plane; a radiating element including n?2 portions extending in n?2 parallel planes in a planar pattern, the planes defining a volume above the ground plane, the radiating element including a first end connected to the ground plane and a second end ending with an open circuit.

Abstract: An electronic component (11) is embedded in an end portion of a surface (P1) and an end portion of a surface (P2) adjacent to each other in a three-dimensional base (2). The portion of an electrode (21) exposed from the surface (P1) and an electrode (101) of a packaged IC (41) are connected to each other via a wiring line (201). The portion of the electrode (21) exposed from the surface (P2) and an electrode (25) of an electronic component (15) are connected to each other via a wiring line (202). Accordingly, it is possible to realize a three-dimensional circuit structure requiring no wiring line spanning over or along an end portion thereof.

Abstract: A signal transmission cable including a high-Q value band-elimination filter includes a first signal line conductor pattern including a first capacitor conductor portion and an inductor conductor portion on a first base layer. The first capacitor conductor portion includes a flat conductor, and the inductor conductor portion has a spiral shape. A second signal line conductor pattern including a second capacitor conductor portion is provided on a second base layer. The inductor conductor portion constitutes an inductor, and the first and second capacitor conductor portions and the first base layer constitute a capacitor. The inductor and the capacitor are connected in parallel by transmission conductor portions on the first and second base layers and an interlayer-connector conductor on the first base layer.

Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.

Abstract: Various examples of a connector device for connecting an electronic device with an external electronic device are described.

Abstract: An electronic device is provided. The electronic device includes an antenna radiator configured to operate in at least one frequency band, a ground stub disposed at a coupling location in proximity to the antenna radiator, and a switching device configured to selectively ground the ground stub and a ground of a main board. Thus, the present disclosure is easily applicable without design constraints in terms of space use when the main board and the antenna radiator are separated, and simplifies the assembly and reduces the cost without a separate sub-board.

Abstract: A front-surface-side 3-terminal capacitor and a rear-surface-side 3-terminal capacitor are disposed respectively on a front surface and a rear surface of a circuit substrate at opposing positions. A first outer terminal and a second outer terminal of the front-surface-side 3-terminal capacitor are electrically connected to hot-side conductor patterns and, respectively. Third outer terminals and of the rear-surface-side 3-terminal capacitor are electrically connected to ground-side conductor patterns and, respectively. Third outer terminals and of the front-surface-side 3-terminal capacitor are electrically connected to a first outer terminal and a second outer terminal of the rear-surface-side 3-terminal capacitor by employing vias and, respectively. The front-surface-side 3-terminal capacitor and the rear-surface-side 3-terminal capacitor are thereby electrically connected in series.

Abstract: In a testing circuit performing a testing operation to detect an RF circuit characteristic, a first filter unit is provided, having a first external terminal electrically coupled to a testing signal and a second external terminal electrically coupled to an RF circuit of the RF device. The first filter unit is configured to allow the testing signal to enter the RF circuit while blocking an RF signal transmitted in the RF circuit from entering the testing circuit. In addition, a testing-result informing unit is provided, having an external input electrically coupled to the first external terminal, and generating an informing signal, which indicates a condition of the RF circuit according to an electric level at the external input.

Abstract: Provided is an LC composite component having a multi-layer substrate, a pattern coil, and a chip capacitive element. The multi-layer substrate is configured such that insulating layers are stacked. The pattern coil forms a coiled shape of which the coil axis extends along a stacking direction of the multi-layer substrate, and includes a coil conductor disposed between the insulating layers. The chip capacitive element includes a ceramic body having a relative permittivity higher than that of the insulating layers and counter electrodes. The chip capacitive element is at least partially disposed within the pattern coil.

Abstract: A multilayer capacitor includes a first grounding internal electrode including a first grounding electrode having a lead-out part led to one side surface of a stacked body, and a second grounding electrode having a lead-out part led to the other side surface; a second grounding internal electrode including a third grounding electrode which overlaps the first grounding electrode and has a lead-out part led to the other side surface, and a fourth grounding electrode which overlaps the second grounding electrode and has a lead-out part led to one side surface; and a signal internal electrode disposed between the first and second grounding internal electrodes, wherein the first and second grounding electrodes and the third and fourth grounding electrodes have, at their adjacent opposed sides, corners curved as seen in a plan view in the stacking direction, respectively, the corners being each located opposite to the corresponding lead-out part.

Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.

Abstract: An LC parallel resonant element includes a first planar or substantially planar conductor on a first base material layer and second and third planar or substantially planar conductors on second and third base material layers. The first and third planar or substantially planar conductors extend over nearly the entire surfaces of the first and third base material layers. The second planar or substantially planar conductor extends over nearly the entire length of the second base material layer in a second direction such that a space from the other end portion of two end portions of a multilayer body in a first direction is provided. The first and third planar or substantially planar conductors are connected to each other by interlayer conductors near the other end portion of the multilayer body. The first and second planar or substantially planar conductor are connected to each other by interlayer conductors near one end portion of the multilayer body.

Abstract: In a laminated LC filter, at least four LC parallel resonators are provided inside a multilayer body. At least a pair of loops of inductors in odd numbered-stage LC parallel resonators among the at least four LC parallel resonators are disposed at an angle at which magnetic coupling is obtained therebetween, and winding directions thereof are the same, so as to obtain magnetic coupling between the inductors. In addition, magnetic coupling may also be obtained between a pair of loops of inductors in even numbered-staged LC parallel resonators among the at least four LC parallel resonators.

Abstract: In a laminated LC filter, at least four LC parallel resonators are provided inside a multilayer body. At least a pair of loops of inductors in odd numbered-stage LC parallel resonators among the at least four LC parallel resonators are disposed at an angle at which magnetic coupling is obtained therebetween, and winding directions thereof are the same, so as to obtain magnetic coupling between the inductors. In addition, magnetic coupling may also be obtained between a pair of loops of inductors in even numbered-staged LC parallel resonators among the at least four LC parallel resonators.

Abstract: A laminated composite electronic device has a circuit including a coil and a capacitor within a laminate having a plurality of conductor layers laminated with an insulating layer interposed between the respective ones of the conductor layers. The device includes a coil conductor arranged on a first conductor layer and forming part of the coil, and a pair of capacitor electrodes for forming the capacitor, one of which is arranged on a second conductor layer such that the one capacitor electrode laps over the coil conductor when viewed from a laminating direction of the laminate, wherein the coil conductor forms part of the coil, and simultaneously serves as the other of the pair of capacitor electrode for forming part of the capacitor.

Abstract: A common mode filter includes a substrate; an insulating layer disposed on the substrate and including coil patterns, the insulating layer having a cavity disposed in a central portion therein; and a magnetic particle-resin composite layer including a core part filling the cavity and a cover part covering the insulating layer. The core part contains fine magnetic particles having an average particle diameter of 30 ?m or less, and the cover part contains the fine magnetic particles having the average particle diameter of 30 ?m or less and coarse magnetic particles having an average particle diameter greater than that of the fine magnetic particles.

Abstract: Systems, apparatuses, and methods may include a circuit board having a plated through hole with a via portion and a stub portion and a self-coupled inductor electrically coupled to the via portion of the plated through hole. The self-coupled inductor may include a first inductor mutually coupled to a second inductor in series to reduce a capacitive effect of the stub portion of the plated through hole.

Abstract: A balance-unbalance converter includes a low pass filter including a first inductor and a first capacitor and a high pass filter including a second inductor and a second capacitor. A via continuous portion of the first inductor penetrates a helix of a helical portion of the second inductor, and a via continuous portion of the second inductor penetrates a helix of a helical portion of the first inductor.

Abstract: Systems and methods according to one or more embodiments are provided for filtering of communication signals. Filtering may be implemented, for example, as a bandpass filter that is selectively tuned across a communication system frequency range to more effectively utilize the communication system bandwidth. In one example, a system includes a printed wiring board (PWB) and a filter implemented in the PWB. The filter includes first and second ports, an inductor comprising a plurality of vias extending through the PWB and a plurality of conductors connecting the plurality of vias to provide a plurality of coils between the first and second ports, and a plurality of capacitors disposed within the PWB. Additional systems and methods are also provided.

Abstract: A harmonics suppression filter includes a main circuit, a first inner circuit, a first outer circuit, a first inner node and a first outer node. The first inner circuit, the first outer circuit and the main circuit are in the same layer of the base board. Meanwhile, the first inner circuit is located inside of the main circuit. There is an inner gap between the first inner circuit and the main circuit. The first outer circuit is located outside of the main circuit. There is an outer gap between the first outer circuit and the main circuit. The first inner node is located in the inner gap to couple the first inner circuit with the main circuit. The first outer node is located in the outer gap to couple the first outer circuit with the main circuit.

Abstract: An electronic circuit includes at least two first conductors having line shapes which are arranged on a first plane of a substrate, a second conductor arranged on a second plane of the substrate, and a third conductor having a line shape, with at least part thereof being arranged on a third plane between the first plane and the second plane of the substrate. The open end of the third conductor is included in part of the third conductor which is arranged on the third plane, and the part is arranged to at least partly overlap one of at least the two first conductors and not to overlap the other first conductor when viewed from a direction perpendicular to the substrate.

Abstract: A radio frequency (RF) filter circuit for rejecting one or more spurious components of an input signal has a first resonator circuit including a first capacitor and a first coupled inductor pair of a first inductor and a second inductor, and a second resonator circuit with a second capacitor and a second coupled inductor pair of a third inductor and a fourth inductor. First and second resonator coupling capacitors are connected to the first resonator circuit and the second resonator circuit. A first port and a second port are connected to the first resonator circuit and the second resonator, with the filtered signal of the input signal passed through both the first resonator circuit and the second resonator circuit being output.

Abstract: An inductor apparatus includes: a substrate including an electrical insulation property and a non-magnetic material; and a plurality of inductors disposed in the substrate so as to extend from a first surface of the substrate to a second surface of the substrate, each of the plurality of inductors including: an inductor conductive part that has an electrical conductivity and extends in a thickness direction of the substrate; and a magnetic layer that covers a side of the inductor conductive part and include a relative permeability and a soft magnetic material.

Abstract: An integrated circuit common-mode electromagnetic interference filter incorporating electro-static discharge protection comprising two inductive coils is provided. A pair of primary and secondary spiral inductor coils is disposed corresponding to each other. A dielectric layer is used to separate the primary spiral inductor coil from the secondary spiral inductor coil electrically. Resistivity of a high-resistance substrate is more than 100 ?-cm for supporting the primary spiral inductor coil, the secondary spiral inductor coil and the dielectric layer thereon. The proposed filter structure can be formed in integrated circuit (IC) back-end processes and thus be extraordinarily advantageous of effectively eliminating electromagnetic interferences and having electrostatic protection effect at the same time, while having small footprint.

Abstract: A network distribution adapter may be configured to vertically connect a network cable on one side of an isolation wall (within a vertical wire-way) while connecting another network cable at an angle on an opposing side of the isolation wall (interior to the MCC). This may advantageously allow fitting the adapter in the limited space provided by the vertical wire-way while also providing more reliable protection for the network connections. In one aspect, the network distribution adapter may include a printed circuit board (PCB) which couples a first connector disposed in a first plane parallel to the PCB with a second connector disposed in a second plane at an angle to the first plane. The PCB may be mounted in a housing which, in turn, may be mounted in relation to an opening in the isolation wall.

Abstract: A composite electronic component may include: a composite body including a combination of a capacitor formed of a ceramic body including a plurality of dielectric layers and first and second internal electrodes disposed to face one another with the dielectric layers interposed therebetween, and an inductor formed of a magnetic body including a coil unit; a first external electrode formed on the first lateral surface of the ceramic body and electrically connected to the first internal electrodes and a second external electrode formed on the second lateral surface of the ceramic body and electrically connected to the second internal electrodes; third and fourth external electrodes formed on first and second end surfaces of the magnetic body and connected to the coil unit, and first and second dummy electrodes formed on first and second end surfaces of the magnetic body.

Abstract: A semiconductor device has a substrate and RF FEM formed over the substrate. The RF FEM includes an LC low-pass filter having an input coupled for receiving a transmit signal. A Tx/Rx switch has a first terminal coupled to an output of the LC filter. A diplexer has a first terminal coupled to a second terminal of the Tx/Rx switch and a second terminal for providing an RF signal. An IPD band-pass filter has an input coupled to a third terminal of the Tx/Rx switch and an output providing a receive signal. The LC filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The IPD filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The RF FEM substrate can be stacked over a semiconductor package containing an RF transceiver.

Abstract: A multilayer filter includes a plurality of mutually coupled resonant circuits provided within a multilayer body. Capacitor internal electrodes, inductor internal electrodes, and inductor via electrodes, ground via electrodes, and input-output via electrodes are arranged within the multilayer body. The ground via electrodes and the input-output via electrodes are provided on a dielectric layer on a mounting surface, or a second dielectric layer on a first dielectric layer provided on the mounting surface. The capacitor internal electrodes arranged towards the side of the mounting surface do not overlap the input-output electrodes when viewed in plan view. With this configuration, degradation in frequency characteristics of a resonant circuit is effectively prevented by controlling one of an inductive component and a capacitive component of the resonant circuit.

Abstract: The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.

Abstract: An electromagnetic interference suppressing structure including a multi-layered substrate; a differential pair including first and second signal lines which are disposed on a first layer of the multi-layered substrate; and two grounding recess structures disposed symmetrically in a second layer of the multi-layered substrate which is positioned under the first layer, and on both sides, respectively, of the differential pair, wherein no electrical coupling element extends across a region lying directly under the differential pair, between the two grounding recess structures.

Abstract: The invention relates to a capacitor component having a first integrated capacitor (C1) and an integrated Y capacitor, wherein the Y capacitor has a second capacitor (C2) and a third capacitor (C3), and the second and third capacitor (C2, C3) are connected in series with one another and in parallel with the first capacitor (C1). The invention further relates to a method for producing such a capacitor component.

Abstract: A device is disclosed that includes a transmission plate, a conductive plate, and a capacitive unit. The transmission plate includes a winding structure and is configured to be electrically coupled between an input source and a load. The conductive plate is configured to be electrically coupled to ground. The capacitive unit is electrically coupled between the conductive plate and the transmission plate.

Abstract: An embedded sensor apparatus for enabling wireless signal transmission while protecting an embedded sensor is disclosed. In various embodiments, an embedded sensor apparatus may comprise a substrate with a cavity, a wireless sensor embedded in the cavity of the substrate, a protective cover coupled to the wireless sensor, and a ferrite layer covering the protective cover. Further, the embedded sensor apparatus may comprise an electromagnetic reflector coupled between the wireless sensor and the substrate. In addition, the ferrite layer may be a ferrite plug, a deposited ferrite layer, or a combination thereof. Furthermore, in various embodiments, covering the protective cover with the ferrite layer may comprise depositing the ferrite layer on the protective cover using a cold spray process. In another embodiment, covering the protective cover with the ferrite layer may comprise depositing the ferrite layer on the protective cover using a thermal spray process.

Abstract: A semiconductor device with an inductor-capacitor (LC) resonant circuit includes a first insulation layer, an inductor component, and a capacitor component. The inductor component includes a coil-conductor segment and two extension-conductor segments. The coil-conductor segment and the extension-conductor segments are located on a same surface of the first insulation layer, and the extension-conductor segments are coupled to two ends of the coil-conductor segment, respectively. The extension-conductor segments are arranged at an interval, and extend outwards relative to the coil-conductor segment. A first region is defined by the extension-conductor segments and the coil-conductor segment, and the capacitor component is arranged corresponding to the first region in an embedded manner on the other surface, opposite to the inductor component, of the first insulation layer.

Abstract: Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode.

Abstract: A second conductor plane (102) is formed in a layer different from a layer in which a first conductor plane (101) is formed, and faces the first conductor plane (101). A first transmission line (104) is formed in a layer different from the layers in which the first conductor plane (101) and the second conductor plane (102) are formed, and faces the second conductor plane (102), and one end thereof is an open end. A conductor via (106) connects the other end of the first transmission line (104) and the first conductor plane (101). An insular conductor (112) is connected to a portion of the first transmission line (104) other than a portion thereof at which the transmission line (104) is attached to the conductor via (106), is located in a layer different from the layer in which the second conductor plane (102) is located, and faces the second conductor plane (102).

Abstract: A connector includes a shell and a case firmly connected to each other. The connector includes a contact, a contact holder holding the contact, a metal shell accommodating the contact holder and a resin case accommodating the shell. A stopper is provided to be inserted into a first hole portion formed in the case and a second hole portion formed in the shell. The second hole portion has a same shape as the first hole portion and is overlapped with the first hole portion.

Abstract: The present invention discloses an electronic package structure. The body has a top surface with a cavity thereon, the first conductive element is disposed in the cavity, and the second conductive element is disposed in the body. The first external electrode electrically connected to the first conductive element and the second external electrode electrically connected to the second conductive element are both disposed on the top surface of the body or a first surface formed by the top surface of the encapsulation compound and the exposed portions of the top surface of the body which are not covered by the encapsulation compound.

Abstract: A composite electronic component includes a composite body in which a capacitor and an inductor are coupled to each other, the capacitor including a ceramic body including a plurality of dielectric layers and first and second internal electrodes, and the inductor including a magnetic body including a coil part. An input terminal is disposed on a first side surface of the composite body and is connected to the coil part. An output terminal includes a first output terminal disposed on the first side surface of the composite body and connected to the coil part and a second output terminal disposed on a first end surface of the composite body and connected to the first internal electrodes. A ground terminal is disposed on a second end surface of the composite body and is connected to the second internal electrodes. The capacitor is coupled to a side surface of the inductor.

Abstract: There is provided a band pass filter including: a first substrate including a plurality of capacitors and a plurality of conductive patterns provided thereon; and a second substrate laminated with the first substrate and connected to the plurality of first conductive patterns through a plurality of via holes, wherein an attenuation frequency is determined according to the amount and shape of the plurality of via holes.

Abstract: A tunable resonator includes at least one tunable capacitor coupled with at least one tunable inductor. The tunable resonator includes a mechanical tuning mechanism coupled with a connecting bridge and with first and second electrodes of the tunable inductor. The mechanical tuning mechanism also moves the first and second electrodes of the tunable inductor relative to an electrode of the tunable capacitor, and providing a force down onto or to pull up a connecting bridge to tune the tunable inductor.

Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.

Abstract: The present invention discloses a common mode filter and a method for manufacturing the common mode filter. The common mode filter in accordance with an embodiment of the present invention includes: a magnetic substrate; a first coil electrode formed on the magnetic substrate; a first lead electrode formed on the magnetic substrate; a first dielectric layer formed on the magnetic substrate; a height compensation electrode formed on the upper surface of the first lead electrode; a second coil electrode formed on the first dielectric layer; a second lead electrode formed on the first dielectric layer; a second dielectric layer formed on the first dielectric layer; and an external electrode formed on the second dielectric layer.

Abstract: There are provided a coil substrate which includes a coil for wireless charging and an antenna and is capable of increasing charging efficiency, and an electronic device including the same. The coil substrate according to embodiments of the invention may include a coil pattern; a dummy part formed around the coil pattern; and at least one penetration part formed in the dummy part or in a central portion of the coil pattern.