Tapered Patents (Class 333/34)
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Patent number: 7154355Abstract: A transmission line for high-frequency differential signals and having a transforming impedance is formed into a substrate. The transmission line is comprised of a slot, the opposing surfaces of which carry a conductive surface capable of carrying electrical signals. The conductive surface on the opposing surfaces is gradually receded along a length of the slot. An The transmission line of claim 1, further including a non-air dielectric filling the space between the opposing faces in said second length of said slot, said non-air dielectric having a thickness that extends from the depth D, to the bottom of the slot at the first end of said second length, the thickness of the non-air dielectric continuously increasing along said second length up to the substrate surface at the second end of the second length. equivalent amount of metallization is applied on the substrate's surface and electrically continuous with conductive surfaces on the slot's opposing sidewalls.Type: GrantFiled: December 24, 2004Date of Patent: December 26, 2006Assignee: Molex IncorporatedInventors: David L. Brunker, Victor Zaderej
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Patent number: 7148765Abstract: The invention provides a dielectric substrate; a ground conductor pattern is formed on one surface of the dielectric substrate and which has a ground conductor pattern omission portion; a strip conductor pattern formed on a surface of the dielectric substrate opposite to the surface having the ground conductor pattern; a conductor pattern for shorting of a waveguide formed so as to be continuously connected to the strip conductor pattern; connecting conductors for connecting the ground conductor pattern and the conductor pattern to each other within the dielectric substrate; and a waveguide connected to the dielectric substrate so as to correspond to the ground conductor pattern omission portion. Also, a microstrip line is constituted by the strip conductor pattern, the ground conductor pattern, and the dielectric substrate. Further, a dielectric waveguide shorting portion is constituted by the conductor pattern, the ground conductor pattern, and the connecting conductors.Type: GrantFiled: March 12, 2003Date of Patent: December 12, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yukihiro Tahara, Moriyasu Miyazaki, Kouichi Matsuo, Kazuyoshi Inami, Makoto Matsunaga
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Patent number: 7145414Abstract: A circuit structure may include first and second transmission lines, each with a center conductor extending along or between one or more spaced-apart conducting surfaces. A conducting surface, such as a ground, reference, or signal-return plane, of the first transmission line may have an orientation that is transverse to the orientation of a conducting surface of the second transmission line. Each of the conducting surfaces of the first transmission line may contact one or more of the conducting surfaces of the second transmission line. In some examples, one or both of the transmission lines are slablines, and in some examples, the contacting edges or edges adjacent the contacting edges of the respective conductive surfaces are curved.Type: GrantFiled: June 30, 2004Date of Patent: December 5, 2006Assignee: Endwave CorporationInventors: Douglas Seiji Okamoto, Anthony C. Sweeney, Thomas M. Gaudette
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Patent number: 7109821Abstract: The present invention relates to connecting and impedance matching a balanced electrical signal, such as that received by an antenna, with an unbalanced transmission circuit, such as that delivered to an amplifier. A planar circuit board is described that delivers signals having opposite polarization collected by different antenna arms to a location for convenient connection to a twin-lead transmission line. Circuit topologies for the circuit board are described that provide relatively low loss and low cross-coupling. A tapered microstrip balun is also described that includes two conducting microstrips on opposing faces of a dielectric separator. Stepped or tapered microstrips at the balanced input port of the balun provide an impedance transforming section electrically connecting to a mode transducing section, in which one of the microstrips tapers outward to form a substantially wider strip. Appropriate choice of parameters is shown to lead to favorable performance in a compact balun.Type: GrantFiled: June 15, 2004Date of Patent: September 19, 2006Assignee: The Regents of the University of CaliforniaInventor: Gregory Engargiola
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Patent number: 7109820Abstract: The circuit device has a contact element, which electrically connects a wave guide (1) with a conductor strip (2). To avoid mechanical stresses due to thermal expansion the contact element is a pre-stressed prefabricated leaf spring having reproducible properties, which is bonded at one contacting area to the wave guide (1) or the conductor strip (2) by electrically conducting adhesive or glue, while a sliding contact is provided on the conductor strip (2) or the wave guide (1) at the other contacting area. The prefabricated leaf spring is preferably a MIGA leaf spring precisely made by UV depth lithography and multiplayer galvanic methods in a batch production process.Type: GrantFiled: January 20, 2000Date of Patent: September 19, 2006Assignee: Robert Bosch GmbHInventors: Bernhard Lucas, Frank Schatz, Juergen Seiz, Heinz Eisenschmid, Achim Dieterich, Andreas Kugler
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Patent number: 7106145Abstract: A signal transmission structure is provided. The signal transmission structure has salients. The salients are corresponding to the position of the non-reference region and protrude from a lateral side of the signal traces. When the signals are transmitted on the signal traces, the parasitic capacitance between the salients and the reference plane can improve the characteristic impedance mismatch. Hence, when the signals are transmitted in a high frequency/high speed environment, the salients of the signal transmission structure reduce the effect of the near-end and far-end crosstalk generated by the other signal trace when a signal trace passes through a non-reference region, in order to keep the good quality of the signals.Type: GrantFiled: July 12, 2004Date of Patent: September 12, 2006Assignee: VIA Technologies, Inc.Inventors: Jimmy Hsu, Teddy Chou
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Patent number: 7088200Abstract: A method and structure are provided to control common mode impedance in fan-out regions for printed circuit board applications. A differential pair transmission line includes a narrow signal trace portion in the fan-out region and a wider signal trace portion outside of the fan-out region. A dielectric material separates the differential pair transmission line from a reference power plane. A thickness of the narrow signal trace is increased and a thickness of the dielectric material is correspondingly decreased in the fan-out region.Type: GrantFiled: October 21, 2004Date of Patent: August 8, 2006Assignee: International Business Machines CorporationInventors: Gerald Keith Bartley, Darryl John Becker, Paul Eric Dahlen, Philip Raymond Germann, Andrew B. Maki, Mark Owen Maxson
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Patent number: 7081648Abstract: A structure and method of manufacturing a CMOS device where the Coplanar wave guide (CPW) lines are formed above the top metal lines. Also other insulating layers are provided that reduce the e-field from the signal line to the substrate. There are four embodiments. In the first embodiment, the following layers are formed over the semiconductor structure: the passivation layer, a shielding layer, a first insulator layer, a high K dielectric layer, a CPW and a second insulator layer. In the second embodiment, no shielding layer is used and the high k dielectric layer is thicker than in the first embodiment. In the third embodiment, a thick shielding layer is used and no high k dielectric layer. In the fourth embodiment, the top metal layer is used as a shielding layer and no high k dielectric layer is used.Type: GrantFiled: July 1, 2002Date of Patent: July 25, 2006Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Chao Chieh Tsai
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Patent number: 7064627Abstract: A signal transmission structure is provided. The structure comprises a reference plane, a bonding pad, a conductive trace and a conductive ball. By changing the shapes of the reference plane and the conductive trace, the equivalent capacitance at the conductive ball and the signal route near the conductive ball is reduced, or the equivalent inductance at the conductive ball and the signal route near the conductive ball is increased to compensate the high equivalent capacitance between the conductive ball and the reference plane. Therefore, the impedance of the conductive ball and the signal route near the conductive ball are matched to increase the integrity of the signals after these signals pass through the conductive ball and the signal neighbor route near the conductive ball.Type: GrantFiled: November 3, 2003Date of Patent: June 20, 2006Assignee: VIA Technologies, Inc.Inventor: Jimmy Hsu
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Patent number: 7009471Abstract: An apparatus for launching a surfacewave onto a single conductor transmission line provides a launch including a flared, continuously curving cone portion; a coaxial adapter portion; a wire adapter portion for contacting the wire conductor which allows for a multiplicity of wire dimensions for either insulated or uninsulated wire, or a tri-axial wire adapter device enabling non-contacting coupling to a wire; and a longitudinal slot added to the flared cone, wire adapter, and coaxial adapter portions of the launch to allow direct placement of the launch onto existing lines, without requiring cutting or threading of those lines for installation.Type: GrantFiled: December 9, 2003Date of Patent: March 7, 2006Assignee: Corridor Systems, Inc.Inventor: Glenn E. Elmore
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Patent number: 6992544Abstract: A coaxial connection is electromagnetically shielded at an interface between a surface mountable coaxial connector and a planar circuit operating in the radio frequency (RF) and microwave frequency ranges. In addition or alternatively, the coaxial connection reduces a potential impedance mismatch associated with attaching a coaxial transmission line of the coaxial connector to a planar transmission line of the planar circuit.Type: GrantFiled: October 10, 2002Date of Patent: January 31, 2006Assignee: Agilent Technologies, Inc.Inventors: Heidi L. Barnes, Andrew N. Smith, Floyd A. Bishop
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Patent number: 6987634Abstract: A high-speed transmission circuit includes an inductive head. The high-speed transmission circuit also includes a non-uniform transmission line having a variable characteristic impedance. The non-uniform transmission line is coupled between the inductive head and an endpoint node such that pulses are conducted over the non-uniform transmission line. The variable characteristic impedance is greater near the inductive head than near the endpoint node.Type: GrantFiled: August 20, 2004Date of Patent: January 17, 2006Assignee: Marvell International Ltd.Inventors: Farbod Aram, Leechung Yiu, Sehat Sutardja
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Patent number: 6985050Abstract: A tunable phase shifter includes a waveguide, a finline substrate positioned within the waveguide, a tunable dielectric layer positioned on the finline substrate, a first conductor positioned on the tunable dielectric layer, and a second conductor positioned on the tunable dielectric layer, with the first and second conductors being separated to form a gap. By controlling a voltage applied to the tunable dielectric material, the phase of a signal passing through the waveguide can be controlled.Type: GrantFiled: April 19, 2001Date of Patent: January 10, 2006Assignee: Paratek Microwave, Inc.Inventors: Louise C. Sengupta, Andrey Kozyrev
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Patent number: 6985056Abstract: A high-frequency circuit formed on a surface of a dielectric substrate includes: a signal strip formed on a first face of the dielectric substrate for transmitting a signal therethrough; a pair of ground strips formed on the first face astride the signal strip, with an interspace on each side of the signal strip; a ground conductor layer formed on a second face of the dielectric substrate, the second face being opposite to the first face; and a plurality of through-vias formed in the dielectric substrate astride the signal strip for electrically connecting the pair of ground strips to the ground conductor layer. First and second through-vias, which are a pair of opposing through-vias located closest to a terminating end of the signal strip, are disposed apart from each other by a distance smaller than a distance between any other pair of opposing through-vias.Type: GrantFiled: February 20, 2004Date of Patent: January 10, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Hiroshi Kanno
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Patent number: 6980063Abstract: A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with embodiments of the present invention are directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.Type: GrantFiled: August 3, 2004Date of Patent: December 27, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventor: Frank G. Mikalauskas
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Patent number: 6977561Abstract: An impedance matching feed is disclosed for use in a ridge waveguide which allows a coaxial transmission line, generally having an impedance of fifty ohm, to be matched to a ridge waveguide of arbitrary impedance. The matching feed consist of a transformer which is located inside the ridge of the waveguide, a probe and a quarter wave choke.Type: GrantFiled: March 11, 2004Date of Patent: December 20, 2005Assignee: The United States of America as represented by the Secretary of the NavyInventor: Will Freeman
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Patent number: 6958664Abstract: A variable permittivity structure is proposed based on composition of two different dielectrics in a transmission line. The composition is adjusted through a thermally-actuated MEMS structure, and this compositional adjustment alters the relative permittivity at least at a macro level. Adjusting the permittivity leads to tune-able impedances in the associated transmission line. The proposed invention can also be used as a variable capacitor, and it can be used to create variable capacitor, and it can be used to create variable couplers and other structures. Since the approach does not alter any conducting surfaces in the transmission line, it is believed to lead to a superior technique for impedance matching to reduced physical discontinuity.Type: GrantFiled: December 22, 2003Date of Patent: October 25, 2005Assignee: The United States of America as represented by the Secretary of the Air ForceInventor: James C. Lyke
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Patent number: 6954118Abstract: A phase shifter includes a substrate, a tunable dielectric film having a dielectric constant between 70 to 600, a tuning range of 20 to 60%, and a loss tangent between 0.008 to 0.03 at K and Ka bands positioned on a surface of the substrate, a coplanar waveguide positioned on a surface of the tunable dielectric film opposite the substrate, an input for coupling a radio frequency signal to the coplanar waveguide, an output for receiving the radio frequency signal from the coplanar waveguide, and a connection for applying a control voltage to the tunable dielectric film. A reflective termination coplanar waveguide phase shifter including a substrate, a tunable dielectric film having a dielectric constant between 70 to 600, a tuning range of 20 to 60%, and a loss tangent between 0.008 to 0.Type: GrantFiled: August 22, 2003Date of Patent: October 11, 2005Assignee: Paratek Microwave, Inc.Inventors: Andrey Kozyrev, Louise Sengupta, Youngfei Zhu
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Patent number: 6909345Abstract: The invention relates to a waveguide manufacturing and a waveguide manufactured with the method, which can be integrated into a circuit structure manufactured with the multilayer ceramic technique. The core part (23, 33, 43, 53a, 53b, 53c) of the waveguide is formed by a unit assembled of ceramic layers, which is limited in the yz plane by two impedance discontinuities and in the xz plane by two planar surfaces (24, 25, 34, 35, 54a, 54c, 55a, 55b, 55c) made of conductive material. The conductive surfaces can be connected to each other by vias made of conductive material (38, 39, 48, 49). The waveguide manufactured with the method according to the invention is a fixed part of the circuit structure as a whole.Type: GrantFiled: July 10, 2000Date of Patent: June 21, 2005Assignee: Nokia CorporationInventors: Olli Salmela, Esa Kemppinen, Hans Somerma, Pertti Ikäläinen, Markku Koivisto
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Patent number: 6867661Abstract: A millimeter wave system includes a plurality of millimeter wave modules, each of which comprises a substrate; a microstrip conductor formed on one surface side of the substrate; a ground plate formed on the other surface side of the substrate; and conductive pads which are disposed on both sides of a strip conductor portion which extends from said microstrip conductor via a tapered portion, and which are connected to the ground potential of said ground plate through a via hole, wherein the strip conductors of this plurality of millimeter wave modules are connected to each other using conductive ribbon. Moreover, when a plurality of millimeter wave modules is connected to form a millimeter wave system, the effect produced by the interaction between the unnecessary conductive pads connected to the ground potential and the strip conductor can be reduced.Type: GrantFiled: September 4, 2002Date of Patent: March 15, 2005Assignee: Fujitsu LimitedInventors: Debasis Dawn, Yoji Ohashi, Toshihiro Shimura
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Patent number: 6864757Abstract: An impedance matching circuit includes a conductor line having an input port and an output port, a ground conductor, a tunable dielectric material positioned between a first section of the conductor line and the ground conductor, a non-tunable dielectric material positioned between a second section of the conductor line and the ground conductor, and means for applying a DC voltage between the conductor line and the ground conductor. The impedance matching circuit may alternatively include a first planar ground conductor, a second planar ground conductor, a strip conductor having an input port and an output port, and positioned between the first and second planar ground conductors to define first and second gaps, the first gap being positioned between the strip conductor and the first planar ground conductor and the second gap being positioned between the strip conductor and the second planar ground conductor.Type: GrantFiled: June 6, 2003Date of Patent: March 8, 2005Assignee: Paratek Microwave, Inc.Inventors: Cornelis Frederik du Toit, Deirdre A. Ryan
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Patent number: 6853264Abstract: A power limiter for limiting power of high frequency signals at an input to a receiver comprises a plurality of transmission line sections connected in succession. Each section has a series inductance coupling an input to an output of the section, and a shunt capacitance constituted by capacitance of at least one pair of oppositely-poled Schottky diodes coupled at the output of the section to limit voltage of the signal at the output. Individual diodes can be replaced by series-connected diodes, or by an array of parallel and series-connected diodes, in different sections for improved performance of the limiter. The limiter can be integrated with a GaAs low noise amplifier of the receiver.Type: GrantFiled: March 17, 2004Date of Patent: February 8, 2005Assignee: Nortel Networks LimitedInventors: Jeffrey H. Bennett, Yuanfei Cen
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Patent number: 6828875Abstract: A spatial power divider/combiner that comprises: a housing containing a first channel forming three sides of a rectangular input waveguide and a second channel forming three sides of a rectangular output waveguide; a board coupled to the housing, wherein the underside of the board forms the fourth side of the input and output waveguides; a series of slots etched on the underside of the board located in the input waveguide to divide an input signal; a series of slots etched on the underside of the board located in the output waveguide to recombine the divided signal; and a series of microstrip lines printed on the top side of the board to couple the input waveguide and the output waveguide. Additionally, the divider/combiner can comprise a series of active devices, such as MMIC power amplifier, to provide a spatial power amplifier.Type: GrantFiled: December 9, 2002Date of Patent: December 7, 2004Assignee: MIA-Com, Inc.Inventors: Eswarappa Channabasappa, Thongchai Hongsmatip, Noyan Kinayman, Richard Alan Anderson, Bernhard A. Ziegner
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Patent number: 6803836Abstract: A multilayer ceramic structure (30) includes a first ceramic layer (32), a second ceramic layer (34) adjacent to the first ceramic layer, and a transmission line (38) formed between the first and second ceramic layers. The transmission line includes first and second portions (44, 46) having a first width, third and fourth portions (47, 48) formed between the first and second portions and having a second width that is narrower than the first width, and a fifth portion (49) formed between the third and fourth portions. A probe (40), comprising a conductively filled via, is attached at one end to the fifth portion, the probe passing through the second ceramic layer for providing a test point (42). The structure compensates for return loss induced by the probe.Type: GrantFiled: September 27, 2002Date of Patent: October 12, 2004Assignee: Freescale Semiconductor, Inc.Inventors: John C. Estes, Rudolfo Lucero, Anthony M. Pavio
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Patent number: 6794950Abstract: A waveguide to microstrip T-junction includes a microstrip transmission line structure having a ground plane separated from a strip conductor by a dielectric layer, the ground plane defining an aperture; a waveguide channel having a conductive periphery being electrically coupled to the ground plane to provide a waveguide short circuit wall located at the end of the waveguide channel; at least one conducting ridge inside the waveguide channel; and an end of the ridge being electrically coupled with the ground plane.Type: GrantFiled: December 19, 2001Date of Patent: September 21, 2004Assignee: Paratek Microwave, Inc.Inventors: Cornelis Frederik du Toit, Mangipudi Ramesh
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Patent number: 6791429Abstract: A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with embodiments of the present invention are directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.Type: GrantFiled: October 30, 2003Date of Patent: September 14, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Frank G. Mikalauskas
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Publication number: 20040174228Abstract: A high-frequency circuit formed on a surface of a dielectric substrate includes: a signal strip formed on a first face of the dielectric substrate for transmitting a signal therethrough; a pair of ground strips formed on the first face astride the signal strip, with an interspace on each side of the signal strip; a ground conductor layer formed on a second face of the dielectric substrate, the second face being opposite to the first face; and a plurality of through-vias formed in the dielectric substrate astride the signal strip for electrically connecting the pair of ground strips to the ground conductor layer. First and second through-vias, which are a pair of opposing through-vias located closest to a terminating end of the signal strip, are disposed apart from each other by a distance smaller than a distance between any other pair of opposing through-vias.Type: ApplicationFiled: February 20, 2004Publication date: September 9, 2004Inventor: Hiroshi Kanno
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Publication number: 20040174227Abstract: A signal path passing through a via hole of a substrate includes a first transmission line, a second transmission line and a via-hole transition structure. The first transmission line is arranged on an insulation layer of the substrate. The second transmission line is arranged on an insulation layer of the substrate. The via-hole transition structure has a conductive material formed at the wall of the via hole. One end of the via-hole transition structure is connected with the first transmission line while the other end thereof is connected with the second transmission line. The first transmission line has a modulating line. The impedance of the signal path is modulated by controlling the cross-sectional size of the modulating line.Type: ApplicationFiled: April 25, 2003Publication date: September 9, 2004Inventor: Sheng-Yuan Lee
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Patent number: 6768398Abstract: A transmission line (218) is formed to have a characteristic impedance which increases at a first substantially exponential rate with respect to a distance from the input (202). A plurality of resonators (206-214) are coupled to the transmission line and positioned at a plurality of locations along the transmission line. The plurality of resonators has resonant frequencies that decrease at a second substantially exponential rate with respect to the distance from the input. An output signal (810, 812) is obtained at a point in the filter that produces a filter response having a corner frequency.Type: GrantFiled: December 12, 2001Date of Patent: July 27, 2004Assignee: Motorola, Inc.Inventors: Edgar Herbert Callaway, Jr., Raymond Louis Barrett, Jr., Gilberto Jacinto Hernandez, Douglas Harold Weisman
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Publication number: 20040130408Abstract: An apparatus and system may include a microstrip line capable of being coupled to an amplifier, wherein the microstrip line is to transform an input impedance of the amplifier to a substantially resistive value, and wherein the microstrip line has a characteristic impedance approximately equal to a selected system reference impedance. The apparatus and system may include a transformer coupled to the microstrip line, wherein the transformer is to transform the substantially resistive value into approximately a resistance of a source impedance included in a source. An article may include data, which, when accessed, results in a machine performing a method including simulating selecting a system having a reference impedance and simulating coupling an amplifier having an input impedance to a source having a source impedance using a transformer coupled to a microstrip line.Type: ApplicationFiled: January 3, 2003Publication date: July 8, 2004Inventors: Gaurab Banerjee, Krishnamurthy Soumyanath
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Patent number: 6759921Abstract: The present invention provides a characteristic impedance equalizer and method of manufacture thereof for use with an integrated circuit package having first and second signal transmission zones. In one embodiment, the characteristic impedancs equalizer includes a first conductor having a first width and providing a characteristic impedance within the first signal transmission zone. The characteristic impedance equalizer also includes a second conductor, coupled to the first conductor, having a second width and providing substantially the same characteristic impedance within the second signal transmission zone.Type: GrantFiled: August 17, 2001Date of Patent: July 6, 2004Assignee: LSI Logic CorporationInventors: Anand Govind, Yogendra Ranade
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Patent number: 6737931Abstract: Device interconnects and methods of making the same are described. In one aspect, a device interconnect system includes a bonding pad portion and a transmission line portion. The bonding pad portion is disposed on a device substrate and is constructed and arranged for electrical connection to a bond wire. The transmission line portion is disposed on the device substrate and is constructed and arranged to electrically couple the bonding pad portion to a device formed on the device substrate. The transmission line portion has a width dimension that is substantially parallel to the device substrate and a height dimension that is substantially perpendicular to the device substrate. The width dimension and the height dimension of the transmission line portion both vary from the bonding pad portion to the device.Type: GrantFiled: July 19, 2002Date of Patent: May 18, 2004Assignee: Agilent Technologies, Inc.Inventors: Alfonso Benjamin Amparan, David Lee Gines
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Patent number: 6714095Abstract: A constant “R” network distributed amplifier formed in a multi-layer, low temperature co fired ceramic structure comprises multiple cascaded constant “R” networks for amplifying a signal applied thereto. Each one of the multiple cascaded constant “R” networks is formed in the ceramic structure and includes a plurality of ceramic layers each of which have a top and bottom planar surfaces which, when bonded together form the ceramic structure. A transmission line is formed on the top surfaces of each of the ceramic layers having a beginning end and a distal end and has a generally rectangular shape. The distal end of the transmission line formed on a lower ceramic layer is connected to the beginning end of the transmission line formed on the next adjacent upper ceramic layer by way of vias formed in the ceramic layers through which metal conductive material is formed there through.Type: GrantFiled: June 18, 2002Date of Patent: March 30, 2004Assignee: Motorola, Inc.Inventors: Anthony M. Pavio, Lei Zhao
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Patent number: 6710675Abstract: A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with the present invention is directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.Type: GrantFiled: October 3, 2001Date of Patent: March 23, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Frank G. Mikalauskas
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Publication number: 20040041653Abstract: A high frequency apparatus includes a dielectric substrate having a surface including a first area and at least one second area; a first dielectric thin layer provided on a portion of a first area; and a uniplanar transmission line provided on the first dielectric thin layer and on a portion of the second area, the uniplanar transmission line extending, continuously on the second area and the first dielectric thin layer.Type: ApplicationFiled: April 14, 2003Publication date: March 4, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsuru TANABE, Mitsuru NISHITSUJI, Yoshiharu ANDA
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Patent number: 6700457Abstract: In some embodiments, the invention includes system comprising a circuit board including a circuit board trace. This system includes a packaged chip supported by the circuit board including, the packaged chip having a package, wherein the circuit board trace is connected to the package in a circuit board breakout region, and wherein the circuit board trace includes a fan-out trace section having an impedance Zo1, a matching region trace section having an impedance Zo2, and a package trace compensation section having an impedance Zo3, wherein an effective impedance of the matching region trace section and the package trace compensation section is approximately equal to impedance Zo1, where Zo3<Zo1<Zo2.Type: GrantFiled: December 26, 2001Date of Patent: March 2, 2004Assignee: Intel CorporationInventors: James A. McCall, Steven M. Stahlberg, David N. Shykind
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Patent number: 6700458Abstract: An AC power feed device for conducting electrical power from a source to a load. The feed device has a constant characteristic impedance along its length and an outer periphery that varies in size progressively along its length, or the feed device has an input end connected to the match network and an output end connected to an electrode, and has a characteristic impedance which varies from a value substantially equal to the output impedance of a match network coupled at the input end to a value equal to the impedance of the electrode.Type: GrantFiled: August 14, 2002Date of Patent: March 2, 2004Assignee: Tokyo Electron LimitedInventors: Andrej S. Mitrovic, Thomas H. Windhorn, Wayne L. Johson
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Publication number: 20040036549Abstract: A coupling element for an HF strip line structure on an HF substrate, implemented in thin-silicon layer technology as a finger coupler structure on a silicon support is described. The bonding to the strip line tracks of the HF strip line structure is effected via metallizations, in particular in the form of spacers.Type: ApplicationFiled: September 8, 2003Publication date: February 26, 2004Inventors: Thomas Walter, Markus Ulm, Stefan Keith, Dirk Steinbuch, Mathias Reimann
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Publication number: 20040012458Abstract: Device interconnects and methods of making the same are described. In one aspect, a device interconnect system includes a bonding pad portion and a transmission line portion. The bonding pad portion is disposed on a device substrate and is constructed and arranged for electrical connection to a bond wire. The transmission line portion is disposed on the device substrate and is constructed and arranged to electrically couple the bonding pad portion to a device formed on the device substrate. The transmission line portion has a width dimension that is substantially parallel to the device substrate and a height dimension that is substantially perpendicular to the device substrate. The width dimension and the height dimension of the transmission line portion both vary from the bonding pad portion to the device.Type: ApplicationFiled: July 19, 2002Publication date: January 22, 2004Inventors: Alfonso Benjamin Amparan, David Lee Gines
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Patent number: 6677831Abstract: A new method to control differential signal trace impedance allows flexible use of different signal trace width and spacing while maintaining constant differential impedance in printed circuit boards. Differential impedance of a signal pair is determined by the geometry of individual traces and the spacing between traces. The value of the differential impedance is inversely proportional to signal trace width and directly proportional to signal trace spacing. By decreasing or increasing trace width and spacing simultaneously, a constant differential impedance can be achieved.Type: GrantFiled: January 31, 2001Date of Patent: January 13, 2004Assignee: 3PARdata, Inc.Inventors: Christopher Cheng, Josh Price
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Patent number: 6677830Abstract: A broadband impedance matching circuit for use with an optical device such as an electroabsorption optical modulator comprises a microstrip transmission line, including pairs of like-sized open stubs disposed on opposite sides of the transmission line along its length. The number of open stubs, as well as their dimensions and location are chosen to provide for broadband impedance matching (from dc to several GHz) between an external electrical signal source and the optical device.Type: GrantFiled: September 11, 2001Date of Patent: January 13, 2004Assignee: TriQuint Technology Holding Co.Inventors: Thomas James Miller, Jr., Prashant Kumar Singh
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Patent number: 6653916Abstract: A microwave monolithic integrated circuit (MMIC) assembly and related method are disclosed. A dielectric substrate has a surface on which radio frequency circuits and microstrip lines are formed. At least one MMIC chip opening is dimensioned for receiving therethrough a MMIC chip. A metallic carrier is mismatched as to coefficient of thermal expansion to the dielectric substrate and includes a component surface adhesively secured to the dielectric substrate on the surface opposing the radio frequency circuits and microstrip lines. At least one raised pedestal is on the component surface that is positioned at the MMIC chip opening. A MMIC chip is secured on the pedestal and extends through the MMIC chip opening for connection to the radio frequency circuits and microstrip lines. Stress relief portions are formed in the metallic carrier that segment the carrier into subcarriers and provide stress relief during expansion and contraction created by temperature changes.Type: GrantFiled: September 24, 2002Date of Patent: November 25, 2003Assignee: Xytrans, Inc.Inventors: Danny F. Ammar, Gavin Clark
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Patent number: 6653911Abstract: A stripline integrated circuit apparatus comprising a first ground plane, a stripline section positioned on the first ground plane, the stripline section including N stripline regions where N is a whole number greater than or equal to one, wherein each stripline region includes a stripline sandwiched therebetween a first dielectric layer with a thickness and a second dielectric layer with a thickness where each adjacent stripline is connected in parallel, wherein each adjacent stripline region is separated by a ground plane, a second ground plane positioned on the stripline region, and wherein the plurality of stripline sections are formed and electrically connected in series. The distances between the striplines and the ground planes are adjusted to vary the input and output impedance.Type: GrantFiled: April 10, 2002Date of Patent: November 25, 2003Assignee: Motorola, Inc.Inventors: John C. Estes, Lei Zhao, Anthony M. Pavio, William J. Thompson
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Publication number: 20030214364Abstract: A broadband interconnection device (10) used for interconnection between a first transmission line (100) and a second transmission line (200), has a substrate (300) with the first transmission line (100) defined at a first side (310) on a first surface (320), the first transmission line (100) including a signal conductor (120) and at least one ground conductor (121 or 122), a signal conductor (220) of the second transmission line (200) defined on an opposite side (340) of the first surface (310), and a ground plane (260) of the second transmission line (200) on an opposed surface (360), the signal conductor (120) of the first transmission line (100) being electrically connected to the signal conductor (220) of the second transmission line (200) on the first surface (320). On the opposed surface (360), the ground plane (260) of the second transmission line (200), has at least one protrusion (261) aligned with the signal conductor (120) of the first transmission line (100).Type: ApplicationFiled: May 16, 2002Publication date: November 20, 2003Inventors: Jeffrey S. Cites, Sean M. Garner, L. Christopher Henning, Fang Wen
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Publication number: 20030210105Abstract: An impedance matching circuit includes a conductor line having an input port and an output port, a ground conductor, a tunable dielectric material positioned between a first section of the conductor line and the ground conductor, a non-tunable dielectric material positioned between a second section of the conductor line and the ground conductor, and means for applying a DC voltage between the conductor line and the ground conductor. The impedance matching circuit may alternatively include a first planar ground conductor, a second planar ground conductor, a strip conductor having an input port and an output port, and positioned between the first and second planar ground conductors to define first and second gaps, the first gap being positioned between the strip conductor and the first planar ground conductor and the second gap being positioned between the strip conductor and the second planar ground conductor.Type: ApplicationFiled: June 6, 2003Publication date: November 13, 2003Inventors: Cornelis Frederik du Toit, Deirdre A. Ryan
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Patent number: 6646518Abstract: A balun includes a first conductive layer disposed on a top surface of a substrate, a second conductive layer having a shorter length than the first conductive layer and disposed on the top surface of the substrate, the second conductive layer having first and second end portions, a substrate having a through hole electrically connected to the second end portion of the second conductive layer, and a third conductive layer disposed on a bottom surface of the substrate, the third conductive layer having a first end portion electrically connected to the second end portion of the second conductive layer via the through hole, and the third conductive layer being tapered from a maximum width at the second end portion thereof to a minimum width at the first end portion thereof.Type: GrantFiled: October 16, 2001Date of Patent: November 11, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Minoru Tajima
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Patent number: 6646522Abstract: A phase shifter includes a substrate, a tunable dielectric film having a dielectric constant between 70 to 600, a tuning range of 20 to 60%, and a loss tangent between 0.008 to 0.03 at K and Ka bands positioned on a surface of the substrate, a coplanar waveguide positioned on a surface of the tunable dielectric film opposite the substrate, an input for coupling a radio frequency signal to the coplanar waveguide, an output for receiving the radio frequency signal from the coplanar waveguide, and a connection for applying a control voltage to the tunable dielectric film. A reflective termination coplanar waveguide phase shifter including a substrate, a tunable dielectric film having a dielectric constant between 70 to 600, a tuning range of 20 to 60%, and a loss tangent between 0.008 to 0.Type: GrantFiled: August 22, 2000Date of Patent: November 11, 2003Assignee: Paratek Microwave, Inc.Inventors: Andrey Kozyrev, Louise Sengupta, Youngfei Zhu
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Publication number: 20030206077Abstract: An impedance matching circuit includes a conductor line having an input port and an output port, a ground conductor, a tunable dielectric material positioned between a first section of the conductor line and the ground conductor, a non-tunable dielectric material positioned between a second section of the conductor line and the ground conductor, and means for applying a DC voltage between the conductor line and the ground conductor. The impedance matching circuit may alternatively include a first planar ground conductor, a second planar ground conductor, a strip conductor having an input port and an output port, and positioned between the first and second planar ground conductors to define first and second gaps, the first gap being positioned between the strip conductor and the first planar ground conductor and the second gap being positioned between the strip conductor and the second planar ground conductor.Type: ApplicationFiled: June 6, 2003Publication date: November 6, 2003Inventors: Cornelis Frederik du Toit, Deirdre A. Ryan
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Patent number: 6639486Abstract: A transition from microstrip to waveguide comprises a rectangular waveguide and a microstrip structure formed by a resilient substrate (24) having a stripline (26) on one surface and a ground plane (44) on an opposite surface, the conductors (26, 44) being interconnected by viaholes. The substrate (24) is disposed between the side walls (36) and the floor (22) of the waveguide with the ground plane contacting the floor. The stripline extends from one end of the waveguide along a portion of its length. A tapered ridge (38) depends from the ceiling (34) of the waveguide and extends from the other end of the waveguide. A terminal end (40) of the ridge contacts a terminal portion of the stripline under mechanical pressure. The ridge (38) may have a choice of profiles such as triangular, half cosine and half cosine with a semicircular cut-out in the upright edge.Type: GrantFiled: March 22, 2002Date of Patent: October 28, 2003Assignee: Koninklijke Philips Electronics N.V.Inventor: Christopher M. Buck
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Patent number: 6639484Abstract: A planar mode converter includes a rectangular waveguide, a microstrip feed-in circuit, and a microstrip feed-out circuit. The rectangular waveguide is filled with dielectric layers and surrounded with metal materials. The lowermost dielectric layer has usually largest thickness and dielectric constant. Except for the lowermost dielectric layer, each of the dielectric layers has a rectangular aperture at its front-end and back-end, respectively. The microstrip feed-in circuit is constituted by first, second and third metal strips, and a feed-in metal ground plane. The first metal strip and the feed-in metal ground plane form a feed-in signal line. The first, second and third metal strips are adhered to the top surface of the lowermost dielectric layer, and the feed-in metal ground plane is adhered to the bottom surface of the lowermost dielectric layer. The microstrip feed-out circuit is constituted of fourth, fifth and sixth metal strips, and a feed-out metal ground plane.Type: GrantFiled: June 7, 2002Date of Patent: October 28, 2003Assignee: National Chiao Tung UniversityInventors: Ching-kuang Tzuang, Cheng-jung Lee