Abstract: Timing information may be embedded along with other display control information in a signal using a pulse width modulation (PWM) mechanism to controllably drive a display (e.g., a plurality of display elements forming an array of display elements). In one embodiment, a non-uniform pulse interval clock may be generated from a uniform pulse interval clock in response to the timing information having pulse interval values. Using the non-uniform pulse interval clock, the width, and optionally the amplitude, of a drive signal may be modulated in order to controllably drive one or more display elements of an array of display elements. For example, while using video data with the non-uniform pulse interval clock to adjust the duration of the drive signal directed to each display element of the array of display elements, calibration data may be simultaneously used to adjust the magnitude of the drive signal.

Abstract: Analog-to-digital converter (ADC) structures and methods are provided that reduce an initial converter nonlinearity by introducing an inverse nonlinearity into the converter's response that is substantially the inverse of the initial converter nonlinearity. In a pipelined ADC embodiment, for example, upstream converter stages are selected that generate an upstream digital code which defines sufficient upstream code words to designate respective segments of the inverse nonlinearity. In response to each of the upstream code words, the conversion gain of the remaining downstream converter stages is then sufficiently adjusted to insert the inverse nonlinearity into the converter response.

Abstract: A digital signal directed to a display (e.g., a plurality of display elements forming an array of display elements) may be converted into an analog signal using a nonlinear relationship. In one embodiment, a drive signal may be provided to at least one display element of the array of display elements in response to calibration data. Embedding the calibration data using the nonlinear relationship, the amplitude of the drive signal may be determined in order to control a perceptible output from the at least one display element of the array of display elements. Thus, a compensation for initial non-uniformity degradation over time, and/or non-uniform degradation may be provided to the at least one display element of the array of display elements. The nonlinear relationship reduces the number of discrete calibration data levels required to avoid perceptible contrast among neighboring pixels that leads to contouring effects.

Abstract: This invention provides a method and apparatus to selectively compress digital image data for the supply of that information to digital display screens or storage. The invention utilizes a digital input containing a non-linear representation between the value and the intended intensity and linearizes this into a higher order number. If the higher order number is below at least a first threshold, it is transmitted or stored on a lower order data system noting that the higher order bits or channels should all be zero. If the higher order value is above the threshold, the highest order bits of that value are transmitted or stored on the lower order data system so that only the lowest order bits are lost. The received input from the lower order data system can then be decoded and the data sent to drive a digital display or otherwise utilized.

Abstract: A direct digital waveform synthesiser with DAC error correction includes a digital to analog converter system for producing a desired output waveform and having between its digital and analog output a characteristic having a linear component and a non-linear component; and a phase to amplitude converter including a storage device responsive to phase inputs to provide to the digital to analog converter system amplitudes modified to compensate for the non-linear component of a characteristic of the digital to analog converter system.

Abstract: Apparatus and method to perform the real-time correction of differential non-linearities in a broadband wireless transceiver system using a digital look-up table. Initially, the values for the digital look-up table are determined prior to full operational use of the broadband transceiver system. The one set of values represents inverse response of the transfer function of the D/A converter. The other sets of values represents the inverse response of the transfer function for each A/D converter. The inverse response values for the D/A and A/D converters are stored in a non-volatile memory. During initialization of the broadband transceiver system, the values of the inverse response of the transfer function for the D/A converter are transferred from the non-volatile memory to a high speed memory. The values of the inverse response of the transfer function for each A/D converter is also transferred to another set of high speed memory.

Abstract: A method and circuitry for implementing a built-in self test (BIST) for determining the frequency characteristics of filter circuits in mixed-signal integrated circuits (ICs). The method comprises inserting a Circuit Under Test (CUT) into a feedback loop that looks like a sigma delta modulation loop and adjust the feedback loop so that it oscillates at the cut-off frequency of the filter. The frequency of oscillation can then easily be measured using either on on-chip counter or digital automated testing equipment. The feedback loop preferably comprises a comparator, a phase-delay component, such as a delay-line, and a one-bit DAC (digital-to-analog converter), wherein the comparator is connected to the output of the CUT, and the output of the one-bit DAC is connected to the input of the CUT. The phase delay of the feedback loop can be tuned through adjustment of the delay-line (e.g., an n-length shift register) until an oscillation frequency is obtained.

Abstract: A keyboard with interchangeable connection specification, comprises an input/output circuit board for DIN, PS/2 or USB connection specification and replaceably assembled within a main body of the keyboard. The input/output circuit board has signal transmitting end connected to the signal receiving end of a membrane circuit of the keyboard. The keyboard further comprises an openable cover on a panel of the main body of said keyboard and corresponding to the location of the input/output circuit board. The openable cover is opened to replace the input/output circuit board mounted within the keyboard for required connection specification.

Abstract: A process and device for generation of a random signal, and a digital-analog conversion system using such a random signal.

Abstract: A device and method for data transmission between a transducer and a processing unit which are coupled by one or several signal transmission lines, to selectively activate at least two different modes of operation of the transducer. The device includes a comparator unit which identifies the respectively activated mode of operation by comparing signals present on at least one signal transmission line with predetermined reference signals.

Abstract: Highly accurate, self-calibrating data processors and methods for calibrating the same use internal analog references with negligible time and temperature drifts. A first input reference signal set generated by any accurate, precision analog reference is applied to a data processor. The corresponding output response is compared to the theoretical ideal output response to determine the data processor's initial gain and offset errors. This information can be stored in non-volatile memory, recalled, and used to compensate for the data processor's initial gain and offset errors during actual use of the data processor. Subsequent errors due to time and temperature drifting can be determined by comparing the output responses to a second input reference signal set which is generated by the internal analog reference. The subsequent errors can be combined with the initial errors to compensate for system errors within the data processor.

Abstract: A joystick system is designed to provide a modified digital representation of the setting of a joystick potentiometer. The system operates to compensate for non-linearities and offsets in the joystick response, or may be used to enhance or vary the joystick response to a non-linear form. This is accomplished by supplying the output voltage of the joystick to an analog-to-digital converter, the output of which then is supplied to a lookup table. The lookup table output is provided to a counter. In one mode of operation, the counter counts down to zero at some multiple of a sample rate. When the counter reaches a zero count, the time interval representative of the joystick position is indicated; and the corrected or enhanced position is indicated by this output.

Abstract: A method is provided for linearizing variations in a transfer characteristic of a digital-to-analog (D/A) converter to which a digitized input signal is fed for being converted to an analog output signal. The method includes balancing the D/A converter so that essentially only negative differential variations result in the transfer characteristic at identified locations; determining amplitudes of the negative differential variations; and adding, with an inverse operational sign, the respective amplitudes of the negative differential variations to the input signal of the D/A converter at the respective locations of the variations.

Abstract: Abnormal changes in the non-linear characteristics of electronic components are an indication of abnormal conditions such as impending component or system failure. To detect such abnormal changes in nonlinearity, an electronic circuit is subjected to a calibration signal including at least one frequency component. Nonlinearity in the electronic circuit causes distortion components to be generated from the calibration signal. Preferably the nonlinearity is characterized by compensation coefficients that digitally compensate the nonlinearity. The compensation coefficients are adjusted in a feedback loop in response to measured values of the distortion components, so that the distortion components are minimized. At the end of the adjustment process, the transfer function of the electronic circuit is specified by the compensation coefficients, which are stored in memory.

Abstract: A analog calibration signal including at least one frequency component is generated by a very pure signal source, such as a digital oscillator and a digital-to-analog converter (DAC) that has been calibrated to be ultralinear. The analog calibration signal is converted by an analog-to-digital converter (ADC) to a digital signal. The digital signal is digitally compensated in accordance with compensation coefficients to produce a compensated digital signal. The compensated digital signal is digitally processed to isolate and measure distortion components, and the compensation coefficients are adjusted in response to the distortion components in order to reduce the distortion components. Feedback causes the distortion components to be minimized so that the compensation coefficients correct the nonlinearity in the analog-to-digital converter.

Abstract: A circuit for linearizing analog-to-digital output is shown in FIG. 2, with an analog signal V.sub.i transmitted by input circuit 10 is applied to an input port of an analog-to-digital converter 12 controlled by a sampling signal V.sub.s, to provide digital data V.sub.d on an "N" bit data bus 14. An analog-to-digital linearizing memory 16 storing a look-up table of digital values, is coupled to bus 14 to receive the digital data V.sub.d, and to respond to the digital data V.sub.d by providing true linear digital values from the look-up table to digital data processing system DSP 20 via an "N" bit data bus 18. A microprocessor 22 is temporarily coupled between the output port of converter 12 and the input port of memory 16 via bus 14, to serve as a switch between bus 14 and a programming memory 24 containing a table of true linear digital values V.sub.t. A known test signal is applied to input circuit 10, and true linear digital values V.sub.

Abstract: A digital and programmable measuring and control instrument comprising a digital-analog converter receiving an analog signal from a pressure transducer and converting it into a digital signal and dividing the same in about 4,000 parts separated in thousands, hundreds, tens and units. The so divided signal is delivered to programmable memories that evaluate the level thereof and refer it to stored values, in such a way as to produce a signal to be shown by display means indicating the precise and actual measurement. The output digitalized and linearized signals from the programmable memories are also delivered to additional programmable memories that evaluate them and in turn transmit programmed signals to a digital-analog converter that generates in response a signal to be used for commanding operative units. Additional control signals from the programmable memory are used as actuatable signals for control or alarm units.

Abstract: An analog-to-digital converter circuit is disclosed for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal. A number of devices are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks. In the illustrated embodiments, these devices are resonant tunneling diodes. For each bit to be produced, a pair of said devices are provided, each being coupled in series arrangement with a resistor. Predetermined portions of the input signal are applied to both of the series arrangements for each respective bit to be produced. Signals from both of the series arrangements are combined for each respective bit to be produced. The combined outputs respectively represent the produced binary bits.

Abstract: A floating point analog to digital converter having an exponent converter which divides the input signal successively one-half until the divided signal is within the range of a mantissa linear analog to digital converter. The exponent converter also generate a digital exponent representative of the division factor. The resulting divided signal is then digitized by the mantissa analog to digital converter. An output is thereby provided composed of a digital exponent and a digital mantissa. In one embodiment, the floating point converter is a charge mode converter suitable for direct interface to a charge mode device such as a CCD image sensor.

Abstract: A method for correcting data conversion/transfer errors in each of a plurality N of channels of a vibratory energy imaging system, by: providing an addressable memory having a plurality L=2.sup.M locations, each for storage of a data word of B bits; then storing in each of the L locations of the memory means a B-bit data word having a value selected to cause the output-to-input transfer function for that channel to assume a desired relationship, with respect to a standard transfer measure; and selecting that one of the L data word locations, responsive to that actual one of an M-bit data word output from a channel ADC or from a data bus, responsive to a test signal, in which to place corresponding data.

Abstract: Apparatus for providing a desired output signal as a function of a single-valued input signal in an electronic system, includes: an addressable memory, having a plurality L locations, each for storage of a data word of B bits; a circuit for storing in each of the L locations of the memory means a B-bit data word having a value selected to provide a particular output value; and circuitry for converting a present single-valued increment of input signal to a unique address, within the range of allowable locations of the memory, to cause each increment of input signal to select the associated one of the L data word locations, from which to output corresponding data.

Abstract: A digital-analog converter circuit comprising a current output type digital-analog converter and a current/voltage converter connected to an output terminal of the current output type digital/analog converter, the current/voltage converter including bias application means to always apply a bias voltage having a predetermined set value to the output terminal of the digital/analog converter.

Abstract: A desired non-linear, monotonic compression function is performed substantially symmetrically upon both polarities of an AC signal by a circuit having a plurality of limiting stages, each having input circuitry with like terminals connected in parallel to one another, and providing an output current proportional to the stage input voltage, with a gain constant decreasing for an increasing stage number. Each stage has output circuitry connected in parallel with one another and providing an output current proportional to the stage input voltage, with a gain constant decreasing for an increasing stage number. A single output stage converts the total current provided by the limiter stages to an output voltage.

Abstract: Distortion in a digital-to-analog converter (DAC) is eliminated by adding a digital random number to each sample of the digital signal, converting the sum into analog form, and subtracting from this analog sum the analog counterpart of the digital random number. The result is the analog counterpart to the input digital signal. The conversation of the summed digital signal and the random number into analog form can be performed by two conventional DACs. For any digital input sample, the output of each DAC is equally likely to contain any of the possible distortion errors produced by the DAC. (An exception is the most significant output bit of the DAC that processes the summed signal, an exception that may be handled by stripping off the most significant bit and applying it to a one-bit DAC.) The error signal at the output of each of the two DACs is thus a random sequence (i.e. noise) of DAC distortion errors.

Abstract: Apparatus and an associated method are described for encoding an analog signal to a digital representation thereof and then decoding the same to reconstruct the original analog signal with reduced quantization noise and error. The analog signal is first adaptively pre-emphasized. A series of samples of the pre-emphasized signal are then obtained and encoded to create a series of digital representations which have a lower order resolution than the samples. The difference between each sample and its corresponding lower resolution digital representation is obtained and combined with the next sample. Decoding of the combined signals takes place in a complementary manner to create an approximate analog output signal, which is then de-emphasized in a manner complementary to the pre-emphasis to produce an analog output signal closely approximating the original analog signal.

Abstract: An adjustable current source comprising a bipolar transistor (BT), the base of which receives a signal adapted to approximately set the current which flows therethrough, and a MOS transistor (MT), in series with the bipolar transistor, the gate (G) of which receives an adjustment signal stored by a capacitor (C) connected between its gate and its drain. This current source can be used for forming the upper stages of an auto-calibration digital converter.

Abstract: Apparatus and an associated method are described for encoding an analog signal to a digital representation thereof and then decoding the same to reconstruct the original analog signal with reduced quantization noise and error. The analog signal is first adaptively pre-emphasized. A series of samples of the pre-emphasized signal are then obtained and encoded to create a series of digital representations which have a lower order resolution than the samples. The difference between each sample and its corresponding lower resolution digital representation is obtained and combined with the next sample. Decoding of the combined signals takes place in a complementary manner to create an approximate analog output signal, which is then de-emphasized in a manner complementary to the pre-emphasis to produce an analog output signal closely approximating the original analog signal.

Abstract: An improved circuit for compensating an input/output characteristic linearity of a parallel comparison type analog-to-digital converter which reduces a wasteful consumption of current in the linearity compensation circuit. In the improved linearity compensation circuit, a dummy circuit having the same construction as a bias circuit of each comparator of the A/D converter is installed for providing a current I.sub.E which is an amplification of an input current by means of the input circuit of each comparator, a first current multiplier is installed for providing a multiplied current kI.sub.E on the basis of the current provided by the dummy circuit, an amplifier is installed for providing a current ki which corresponds to a multiplication of the current i by an amplification factor of the input circuit, and a second current multiplifier is installed for providing another multiplied current kli which is a multiplication of the current ki by l.

Abstract: A low cost analog-to-digital converter having a non-linear conversion characteristic produces an output digital signal non-linearly relative to an input analog transmission signal which is applied thereto for demodulation. A compensation circuit having a non-linear conversion characteristic converts the non-linear digital signal output from the analog-to-digital converter into a linear digital signal which has a larger number of bits than the non-linear digital signal.

Abstract: A thermal anemometer, including a constant temperature anemometer bridge excitation circuit together with multiple signal comparators and a tapped resistance reference divider, providing a linearized digital output signal, together with a digitally controlled output section that presents a simultaneous linear analog output signal. All logic switching is actuated by the anemometer signal itself. Both unipolar (non-directional) and bipolar (directional) constant temperature anemometer signals are linearized, digitized, and processed with a minimum number of steps and component parts to provide simultaneous digital and analog output signals. Generic transducer electrical output signal digitizing is disclosed.