Abstract: In recording systems using partial-response maximum-likelihood detection (PRML) techniques, data sequences are preceded by a preamble consisting of all ones. Coding schemes are disclosed which allow to keep the number of consecutive ones occurring in the coded data sequences at a minimum, while simultaneously restricting the number of consecutive zeros in full and partial data sequences to a low value which is important for improving receiver operation. The disclosed coding schemes and apparatus enable a faster and more reliable discrimination between timing preambles and data sequences, thus allowing to use shorter timing preambles which results in faster receiver start-up and in a reduction of storage overhead for the preambles.

Abstract: An embedded controller disk-drive system including a microprocessor features writing and reading of compressed/decompressed data having an arbitrary length to a rigid disk drive in an efficient manner which is transparent to a host of the disk-drive system. A compression factor relating a size of a logical block to the number of bytes stored in a physical sector on the rigid disk is selected and stored in the microprocessor. The data string is compressed, whereupon the microprocessor generates a specialized table containing descriptor field information for each logical block. The descriptor field contains information on a physical block address corresponding to the location of the compressed data string, the length of the compressed data string, and also, for overflow data, linking sector information for linking the compressed data string between two or more physical blocks on the rigid disk.

Abstract: A system for data compression and decompression is disclosed. A series of fixed length overlapping segments, called hash strings, are formed from an input data sequence. A retrieved character is the next character in the input data sequence after a particular hash string. A hash function relates a particular hash string to a unique address in a look-up table (LUT). An associated character for the particular hash string is stored in the LUT at the address. When a particular hash string is considered, the content of the LUT address associated with the hash string is checked to determine whether the associated character matches the retrieved character following the hash string. If there is a match, a Boolean TRUE is output; if there is no match, a Boolean FALSE along with the retrieved character is output. Furthermore, if there is no match, then the LUT is updated by replacing the associated character in the LUT with the retrieved character.

Abstract: This invention relates to a digital modulating method used for recording a PCM audio signal, computer data, and etc. on a recording medium such as an optical disc. The digital modulating method is constructed so that the minimum length between transition could be the maximum in encoding M bits into N bits (M<N), and can generate clock pulses with a simple circuit arrangement by satisfying the relationship N=.alpha.M, where .alpha. is an integer equal to or larger than 2.Further, by converting a predetermined unit of input data into a first code signal according to substantially the same conversion rule and selectively adding coupling bits of different bit number to each junction between a first code signal and an adjacent code signal, the digital modulating method is adaptable for various transmission systems with a simple arrangement.

Abstract: A data compression circuit is provided for a digital audio tape recorder for converting an analog audio signal of standard 16 bit data to compressed 12 bit data when the recorder is in four-channel or long play operation mode. The compression circuit can compress standard data to be recorded with a sampling frequency of 48 KHz and a quantization of 16 bits in long play mode resulting in a compressed data recording in which sampling frequency is 32 KHz and the quantization is 12 bits. Thus, recording the compressed data occurs about twice as fast as recording standard data. Moreover, since the overall amount of recorded data is reduced owing to 12-bit linear compression, channel expansion on the tape is provided.

Abstract: An information track on a record carrier (2) is read by a read head which includes detectors producing detection signals (IA, IB, IC and ID) which correspond to the information pattern on the track. The respective detection signals are converted by analog-to-digital converters (16a, 16b, 16c and 16d) into respective series of n-bit digital signal values (ua, ub, uc and ud). From such signal values a data signal (SD) is derived which is representative of the information being read. The signal values are also applied to respective cascade arrangements of a quantizing circuit (21a, 21b, 21c and 21d) and a decimating filter (22a, 22b, 22c and 22d), which convert them into respective series of signal values (va, vb, vc and vd) which represent only the low frequency portion of the information in the detection signals produced by the read head and include control information relating to tracking by the read head.

Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.

Abstract: This invention relates to a code modulating apparatus and a code demodulating apparatus for digital signals such as PCM audio signal, computer data, and so on. An input signal of M bit words is divided into a plurality of data bits and the code conversion is performed for respective data bits, thereby simplifying the circuit arrangement for data conversion.

Abstract: A data conversion method and an apparatus for the same which converts undefined-length image signal coded by a MH or MR method for facsimile equipment, etc. into fixed-length data. Coded undefined-length image data is inputted, and, in accordance with a bit length contained in the image data and with the number of the effective bits in the last byte, bits to be outputted from a barrel shifter are shifted. Control is performed to byte pack the bits of the last byte and the shifted bits outputted from the barrel shifter, and coded data is converted into data in byte units, thereby enabling high-speed byte packing.

Abstract: A method and apparatus for compressing digital data uses data which has been previously compressed as a dictionary of substrings which may be replaced in an input data stream. The method and apparatus uses a hash table to take advantage of principles of locality and probability to solve the maximal matching substring problem inherent in this type of compressing apparatus, most of the time. The hash table consists of first-in, first-out (FIFO) collision chains of fixed, uniform numbers of pointers to substrings of data already compressed which potentially match an input substring. A companion decompressing method and apparatus receives compressed data from the compressing apparatus and expand that data back to its original form.

Abstract: Binary words of the same length are grouped in codewords having a capacity for data bits which is not an integral multiple of the number of bits in a data word. Each of the codewords has the same length, and includes a plurality of data words in their entirety and all but a given number of bits of one other data word. A header codeword is provided which contains information identifying the number of following codewords related to that header, and a fixed length data field. The fixed length data field includes the missing bits from each of the incomplete data words in the following codewords. In one embodiment, the number of missing data bits contained in the header is used as an indication of the number of the following codewords. The location of the first of the missing data bits may be indicated by filling out the unused leading portion of the fixed length field with a string of zeros ending in a single one.

Abstract: Format compatibility between arithmetic binary compression coding devices used in a magnetic tape drive can be retained even though different numbers of compression/decompression devices are required to attain a higher throughput through the system. Each device must process the data directed to it in a known maximum amount of time. Each compaction processor contains a selected number of statistic tables for each compaction processors. Eight compaction processors are selected with the possibility of two statistic tables in each. Thus format compability can be retained using four compaction processor with two statistic tables in each or double the throughput by using eight compaction processors with one statistic table in each encoder/decoder. Data compacted on a magnetic tape using either speed compaction can be decoded by either tape drive and compatibility is insured.

Abstract: A semiconductor logic circuit for realizing bit expansion comprises a series of CMOS transfer gates that transfer, for example, a fourth bit of input data to all bit positions upper than the fourth bit. The transfer of the fourth bit is done through clocked inverters. Each of the clocked inverters gives the fourth bit to, for instance, four of the upper bit positions in parallel.

Abstract: Short-data records are compressed and decompressed by Lempel-Ziv compression and decompression utilizing a fixed searchtree database, an encoder and a decoder. The searchtree database is incrementally grown by a file preprocessor from a sample of the input data. The searchtree is fixed either when the data sample or the storage space for the searchtree is exhausted. The encoder maintains an encoded-record directory for locating the compressed records. A record located by the directory is decompressed by the decoder, and may be modified and recompressed by the encoder. Lempel-Ziv compresssion and decompression of the type of U.S. Pat. No. 4,464,650 is utilized. The preprocessor also constructs, as part of the searchtree database, a last-descendant list for use by the decoder to extend internal nodes received as leaf pointers by the appropriate number of repetitions of the first encountered symbol of the alphabet.

Abstract: The data acquisition portion of a data signal processing system has a nonnear data compression and conversion arrangement and a data decompression and scaling arrangement. The non-linear data compression and conversion arrangement employs graduated reference voltage levels provided by resistors having graduated, unequal values, such as values being related as a geometric progression. The graduated form of the reference voltage levels provide a form of data compression wherein large value and small value measurements will have essentially the same fractional resolution. The data decompression and scaling arrangement can decompress previously compressed digital signals and limit the digital data width of such signals in systems which have input dynamic range requirements greater than their output resolution requirements.

Abstract: A method and apparatus for compressing digital data that is represented as a sequence of characters drawn from an alphabet. An input data block is processed into an output data block composed of sections of variable length. Unlike most prior art methods which emphasize the creation of a dictionary comprised of a tree with nodes or a set of strings, the present invention creates its own pointers from the sequence characters previously processed and emphasizes the highest priority on maximizing the data rate-compression factor product. The use of previously input data acting as the dictionary combined with the use of a hashing algorithm to find candidates for string matches and the absence of a traditional string matching table and associated search time allows the compressor to very quickly process the input data block. Therefore, the result is a high data rate-compression factor product achieved due to the absence of any string storage table and matches being tested only against one string.

Abstract: A data companding method instantaneously compands the 14-bit digital audio signals to be outputted from a satellite broadcast receiver and so on is realized with the given conversion rule, which has a superior companding characteristics across the whole input range of the 14-bit data with SN being not deteriorated as compared with the 14-10 near-instantaneous companding law at the satellite broadcast transmission. A data compressor and a data expander in accordance with the present invention are realized by the construction of the combination of the coefficient table, a data shifter composed of a pluarlity of 4 to 1 data selectors, and an adder.

Abstract: This invention is an image compression device which includes a means to rearrange binary image data in a unit of pixel in accordance with a first conversion table, and a means to encode said rearranged data in accordance with a second conversion table, and which is characterized in that the second conversion table contains a data comprising a code which is added to a predetermined code used for the case where the same logical value continues in the rearranged data and which is based on the number of continuous pixels, a code having the same bit at the leading edge thereof as the leading bit of the predetermined code for the case where the same logical value continues up to the trailing end of the rearranged data, and a code having at its leading edge of a bit different from the leading bit of the predetermined code which is to be used for the data other than above. The above device according to this invention can compress any binary data including line images and dot images at high efficiency and high speed.

Abstract: A band compression device for digital signals in which input digital data are subjected to floating to realize bit reduction and in which a high speed compressing operation is made possible by shifting the input digital data by a number of bits equal to about one half the maximum shift quantity before starting the floating operation for the input digital data.

Abstract: When a variable length code requires two cycles in decoding, portions of code bit strings serving as objects to be decoded in first and second cycles of the variable length code are caused to overlap each other. In the first cycle, a non-overlapping portion is determined as a decoded portion. A length of a code bit string actually decoded in the first cycle is determined as a length of the code bit string serving as the object to be decoded in the first cycle excluding the length of the overlapping portion so as to determine a start position of the code bit string serving as the object to be decoded in the second cycle.

Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.

Abstract: Human speech is analyzed and a feature parameter is extracted from the human speech. The feature parameter is quantized and a quantization parameter is generated. Part of the bits of the quantization parameter is a predetermined bit pattern when the feature parameter is in a predetermined range. The part of the bits of the quantization parameter is tranformed into an additive parameter of at least one bit. The human speech is synthesized on the basis of the quantization parameter and the additive parameter. It is possible to nonlinearly quantize human speech into a quantization parameter having a small number of bits and to generate the synthesis parameter from the quantization parameter using a small size circuit.

Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.

Abstract: An apparatus and method for converting an input data character stream into a variable length encoded data stream in a data compression system. The data compression system includes a history array means. The history array means has a plurality of entries and each entry of the history array means is for storing a portion of the input data stream. The method for converting the input data character stream includes the following steps. Performing a search in a history array means for the longest data string which matches the input data string. If the matching data string is found within the history buffer means, the next step includes encoding the longest matching data string found by appending to the encoded data stream a tag indicating the longest matching data string was found and a string substitution code.

Abstract: A digital modulator converts M-bit data words to N-bit code words (N>M) each containing a specific number of bits `1`. The specific number is one of a plurality of predetermined numbers which are different by at least 3 from one another. A specific data word may be converted to either one of two code words having different numbers of bits `1` from each other so as to reduce DC components of a channel code constituted by the code words.

Abstract: A system for encoding/decoding an 8-bit binary code into/from a 4/11 channel code is disposed such that an 8-bit binary code is encoded into a 11-bit channel code by adding a 3-bit extension code as a parity code which keeps the number of "1"s in the channel code at four. When the 8-bit binary code cannot be encoded by this rule, it is converted to a temporary 8-bit code by a table encoder and then a 3-bit extension code is added. The 4/11 channel code is decoded referring to the 3-bit extension code, which indicates the encoding rule by which the 4/11 channel code has been generated. When the 4/11 channel code is detected to have been encoded by the bits-adding rule, an original 8-bit binary code is derived from the 4/11 code by removing the 3-bit extension code. When the 4/11 channel code has been encoded by the table-encoding rule, it is decoded by a table decoder.

Abstract: A dictionary-based data compression technique wherein compression occurs at a variety of levels in response to word, phrase, super-phrase (sentence), and context-sensitive recognition. A separate dictionary is used at each compression level so that word compression occurs first, followed by phrase compression, followed by other compressions. Disclosed applications built upon the compression strategy include an idiomatic-language translator and a voice-recognition control system.

Abstract: In Trellis coded modulation system in which an input digital signal in parallel form is encoded by a convolutional encoder which adds an additional bit to the input digital signal for error correction purpose, and a mapping circuit designated amplitude and phase for each symbol for QAM signal, the number of parallel bits at output of said convolutional encoder is the same as the number of parallel bits of an input digital signal. An input digital signal is first rate converted so that m+n bits in every T period is converted to m bits in every T' period, where T'=(m/(m+n)).T. The convolutional encoder adds n number of bits so that the total number of parallel bits is m+n, which is applied to the mapping circuit. In a receive side, a received signal having m+n bits in every T' period is decoded through an error correction decoder which provides m bits in every T' period, then, the decoded signal is rate converted to m+n bits in every T period.

Abstract: An improved method of generating a compressed representation of a source data string, each symbol of which is taken from a finite set of m+1 symbols, a.sub.o to a.sub.m. The method is based on an arithmetic coding procedure wherein the source data string is recursively generated as successive subintervals within a predetermined interval. The width of each subinterval is theoretically equal to the width of the previous subinterval multiplied by the probability of the current symbol. The improvement derives from approximating the width of the previous subinterval so that the approximation can be achieved by a single SHIFT and ADD operation using a suitable shift register.

Abstract: A time-division bit number circuit that comprises a bit number expansion system and/or a bit number reduction system. The bit number expansion system converts an N bits signal to a 2N bits signal, while the bit number reduction system converts the 2N bits signal to the N bits signal where N is an integer. Thus, according to the time-division bit amount circuit, the number of memory can be saved, the area of circuit can be reduced and the pattern area of substrate can be reduced.

Abstract: A high bit-rate serial communications link encodes data by inserting non-data 0's and 1's. These extra bits are removed by a decoder at the receiving end of the link. Transmission of data can be made along optical fibers.

Abstract: A data compression/decompression system employs two stages of data compression. Information and/or character data is first formatted into M-bit width digital data characteristics for input to the first stage of the data compression system which comprises an expanding run length encoder having N-bit width output character where N>M and the number of M-bit width characters is greater than the number of N-bit width characters. The output of the expanding run length encoder is applied directly to a compatible adaptive string matching second stage data compression encoder of the type which is not degraded or affected by the input.When the input data stream to the two stage system is not of a known format or provided with leader or header bit character width information, a bit analyzer and a chopper are provided in a data stream to prepare the data stream in a bit character width format which matches the input of the expanding run length encoder.

Abstract: A numeric encoding method and apparatus for neural networks, encodes numeric input data into a form applicable to an input of a neural network by partitioning a binary input into N-bit input segments, each of which is replaced with a code having M adjacent logic ones and 2.sup.N -1 logic zeros, the bit position of the least significant of the M logic ones corresponding to the binary value of the input segment it replaces. The codes are concatenated to form an encoded input. A decoding method decodes an output from the neural network into a binary form by partitioning the output into output segments having 2.sup.N +M-1 bits each, each of which is replaced with an N-bit binary segment being a bracketed weighted average of the significances of logic ones present in the output segment. The binary segments are concatenated to form a decoded output.

Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.

Abstract: The adaptive data compression apparatus is located within a tape drive control unit which is interposed between one or more host computers and one or more tape transports. The adaptive data compression apparatus functions to efficiently compress a user data file received from a host computer into a bit oriented compressed format for storage on the magnetic tape that is loaded in the tape transport. The data compression apparatus divides each block of an incoming user data file into predetermined sized segments, each of which is compressed independently without reference to any other segment in the user data file. The data compression apparatus concurrently uses a plurality of data compression algorithms to adapt the data compression operation to the particular data stored in the user data file. A cyclic redundancy check circuit is used to compute a predetermined length CRC code from all of the incoming user data bytes before they are compressed.

Abstract: A code converter includes a signal converter converting an input digital signal into an intermediate digital signal of two's complement. A subtracter has a minuend input node, receiving lower bits of the intermediate digital signal, and a subtrahend input node. A digital integrator receives an output from the subtracter, a digital comparator receives an output from the digital integrator, a delay unit receives an output from the digital comparator to execute a one-sampling period delay. An output from the delay unit is applied to the subtrahend input node of the subtracter, and an adder receives the remaining upper bits of the intermediate digital signal and the output from the digital comparator, a converted output digital signal being produced from the adder.

Abstract: A data decoding system includes a data retrieval device which retrieves encoded data from a mass-storage device and transmits the data to a serial-to-parallel shift register. The shift register, operating at the data transfer rate, converts the encoded data to a parallel stream of bit-pairs. The bit-pairs are then transmitted, over parallel lines, to a second shift register which is operating at one-half the data transfer rate. The second shift register stores a sufficient number of the bit-pairs to constitute a byte of binary data when decoded. Once enough bit-pairs are stored, a ROM, operating at a rate which is slower than the data transfer rate, decodes the information to form a byte of binary data. The system utilizes a data retrieval system with a high data transfer rate and processing circuitry with a reduced bandwidth requirement to produce decoded data at a rate which is comparable to the data transfer rate.

Abstract: A data compression method and apparatus particularly suitable for use in electrical power line fault data recorders. The system performs both gain compression and frequency compression. For gain compression, a predetermined number of samples are analyzed to determine a gain setting common to each sample in the set of samples. A reduced data string consisting of a gain code and data words having fewer bits than the input words are transmitted as a compressed data string. For frequency compression, a sample set representing the input signal is decimated until there remain only a sufficient number of data samples to satisfy the Nyquist criterion for the highest frequency component of interest. The frequency compressed output data string comprises a frequency code representing the highest frequency of interest followed by the set of decimated data samples.

Abstract: Apparatus and method for compressing and de-compressing binary decision data by arithmetic coding and decoding wherein the estimated probability Qe of the less probable of the two decision events, or outcomes, adapts as decisions are successively encoded. To facilitate coding computations, an augend value A for the current number line interval is held to approximate one by renormalizing A whenever it becomes less than a prescribed minimum AMIN. When A is renormalized, the value of Qe is up-dated. The renormalization of A and up-dating of Qe are preferably based on a single-bit test. Also, each Qe value is preferably specified as a 12-bit value having the least significant bit set to 1 and having no more than four other bits set to 1. The number of Qe values in the 1/4 to 1/2 probability range is enhanced to improve coding efficiency.

Abstract: A data outputting circuit including absolute value conversion circuit for converting digital data that is inputted with a determined sampling period into absolute value data, a register for storing the largest of the absolute value data provided within a predetermined period of time, a transferring register for receiving data and trransferring the data every predetermined period of time, and a compressing circuit adapted to compress compressing the data applied to the transferring register, whereby the circuit scale is reduced, and the data transferring time or the number of transferring lines is decreased.

Abstract: In the serializer for converting parallel data into serial data, where the parallel data comprises normal characters all of the same length and a last character of a different length, the characters are each tagged by an extra bit as it enters a FIFO. This tag bit indicates the length of the character and is shifted along with the character as the character is shifted through the FIFO. The normal character length and the length of the last character are stored. As a character emerges from the FIFO, its tag bit identifies it as a normal character or as the last character. Such tag bit is used to select the correct character length in a counter. The character is loaded in a shifter which is controlled by the counter. Therefore, the shifter is controlled by the counter to shift the correct number of times in order to shift the character into a serial bit stream.

Abstract: In a digital encoder, truncation is controlled by the fullness of the output rate-smoothing buffer. A signal compression system is shown for processing a stream of fixed length digital sample signals, such as audio signals, which system includes a linear digital compression filter for compression filtering the sample signal stream and generating a stream of compression-filtered signals. The compression-filtered stream is encoded by an encoder which implements a variable word length truncated code. The encoder output is supplied to a buffer for transmission to a communication channel. The encoder is controllably operable in a normal mode and in an out of range (OOR) mode. In the OOR operating mode an OOR code word together with the compression filtered signal is sent to the buffer. Buffer underflow is controlled by operation in the OOR mode when the buffer is empty or near empty.

Abstract: Encoding method for data to be recorded on optical disks using the pit-per-transition technique or return-to-zero techniques whereby the characteristics of the encoded bits produce a stable, low frequency spectral notch and minimum interference with associated focus and tracking servomechanisms. RLL (d,k) code words are selected so that the ratio of the lengths of pits and lands approximate some nonzero fraction less than one-half which depends on the (d,k) code employed. For example, a fraction of 1/3 is appropriate for RLL (2,7).

Abstract: A digital limiter limits the amplitude of a digital video signal by replacing input data that lies outside the range defined by lower and upper limit levels. Such data are replaced respectively with (1) an average value of (a) the data preceding the first data lying outside the range and (b) the upper or lower limit level data and (2) an average value of (a) the data following the last data lying outside the range and (b) the upper or lower limit level data. This enables a good soft-limit operation without compromising the linearity of the video signal.

Abstract: A method of data compression for recording data on a recording medium such as a magentic tape, a method of data restoration for data which has been compressed for recording, and an apparatus of data compression and restoration prescribe the data to be compressed based on type or value and encode the compression object data, thereby reducing the number of bits necessary to indicate the compression object data. Compression is implemented only for consecutive data fewer in number of repeating consecutive bytes than a certain number, thereby reducing the number of bits necessary to indicate the number of bytes of the consecutive data. A compression mark indicative of compression is appended to the compressed data, consisting of data made by encoding the compression object consecutive data and data indicating the number of bytes of the data, either at the front or rear of the compressed data, whereby an input data string can be compressed drastically and compressed data, even including errors, can be restored.

Abstract: A data compression and restoration method and an apparatus for realizing same, by which, when identical data patterns appear successively in data information, which may be recorded in a magnetic tape, etc., the data patterns are subjected to a compression operation, the data thus compressed is recorded, and it is restored at the reproduction. When the data patterns appear successively, they are compressed, and the data patterns generated by the compression are subjected to a second compression, after they have been rearranged for the purpose of the second compression. In this way it is possible to record data significantly compressed.

Abstract: A system for serial communications is disclosed comprising an encoder for serially outputting conservative encoded codewords responsive to a parallel data input, and a decoder for outputting, in parallel, decoded data words responsive to the serially transmitted conservative encoded codewords.The codewords are characterized in that the ratio is known between the total number of bits per codeword transmitted and the total number of transitions per codeword.The encoder transforms each m-bit parallel data work into one n-bit codeword, where n is greater than m, such that every codeword has a known number of transitions and such that one of the transitions in the codeword has a predefined position.Thereafter, the encoder converts each n-bit codeword from parallel to serial form for output onto a serial communications channel.A method is taught for conservative encoding as follows.First, identify and define the total set of q different datawords of m-bits each which can be transmitted.

Abstract: An information-transmission system including an encoder for converting n-bit information words (D7, . . . , D0) into transmitted m-bit code words (C10, . . . , C0), and a decoder which reconverts the received code words (C'10, . . . , C'0) into information words (D*7, . . . , D*0) corresponding to the original information words. For a first group the encoder converts a first portion (D7, . . . , D3) into a first portion of a code word, such portion comprising q bits (C10, . . . , C5) thereof; and converts a second portion (D2, . . . , D0) of the information word into a second portion of the code word, such portion comprising s bits (C4, . . . , C0) thereof. For a second group the encoder converts a first portion (D7, . . . , D3) into a second portion comprising q bits (C'5, . . . , C'0) of a code word, and converts a second portion (D2, . . . , D0) of the information word into a first portion comprising s-bits of (C'10, . . . , C'6) such code word.

Abstract: A signal processing system (10) is provided for digitally filtering an input digital signal. The signal processing system (10) includes a digital filter (12) without normal finite precision arithmetic whose output is applied to an adaptive quantizer (14). The output of the adoptive quantizer (14) includes a digital signal having a number of bits per sample which is less than or equal to the number of bits per sample contained in the output of the digital filter (12).

Abstract: Each of data words has m bits. The m-bit data words are converted into corresponding n-bit code words. The n-bit code words are concatenated to form a bit sequence where the number of successive bits having a same binary value is limited to a range of a smaller value d to a larger value k. A code work W1 and also a following code word W2 are controlled to satisfy the limitation defined by the values d and k. The number of different code words forming an RLL code system is relatively large. For example, in respect of a first available RLL code word system, 8-bit data words are directly converted into 12-bit code words (Tw=0.667T) and the limitation defined by the values d and k equal to 2 and 10 respectively are satisfied. In respect of a second available RLL code word system, 6-bit data words are directly converted into 9-bit code words (Tw=0.667T) and the limitation defined by the values d and k equal to 2 and 23 respectively are satisfied.