Abstract: An image display method includes generating luminance data, applying a special filter to the luminance data, generating luminance setting data, generating gradation setting data, and controlling a backlight based on the luminance setting data and a liquid crystal panel based on the gradation setting data. The luminance data indicates a luminance value for each of light-emitting regions of the backlight based on a maximum gradation value among gradation values of image pixels of an input image that correspond to the light-emitting region. The special filter is applied such that, with respect to each light-emitting region, a difference of the luminance value thereof from the luminance values of neighboring light-emitting regions decreases, and the luminance setting data is generated therefrom. The gradation setting data sets a gradation value of each pixel of the liquid crystal panel, and is generated based on the input image and the luminance setting data.

Abstract: The present disclosure provides a device and a method for detecting a screen freeze error of a display of a vehicle. The method comprises monitoring a drive pattern of at least one pixel in a porch area during a time period corresponding to a plurality of image frames, wherein the porch area including at least one of a front porch area and a back porch area of a display panel driven according to the plurality of image frames; and determining occurrence of a screen freeze error by comparing the drive pattern of the at least one pixel with a preset drive pattern.

Abstract: A display device that includes a plurality of scanning lines, a plurality of data lines, and a pixel unit in which a pixel is specified by the scanning line and the data line, in which image data of one line is simultaneously displayed for a plurality of adjacent scanning lines, image data to be simultaneously displayed is made different between an N frame and an (N+1) frame that are temporally consecutive, and the image data is shifted by one line, and the image data of a last scanning line of at least one of the N frame or the (N+1) frame is hidden.

Abstract: The present application discloses a cross voltage compensation method for a display panel, a display panel and a display device. The cross voltage compensation method includes steps of transmitting a preset voltage signal to in-plane data lines after scan of scanning lines of a last row of a current frame is completed and before scanning lines of a first row of a next frame are started, keeping all the scanning lines at a close state while transmitting the preset voltage signal to in-plane data lines, and keeping all the scanning lines at a close state after scan of scanning lines of a last row of a current frame is completed and before scanning lines of a first row of a next frame are started, that is, V-blank time.

Abstract: A pair of eyeglasses may include one or more adjustable lenses that are each configured to align with a respective one of a user's eyes. The adjustable lenses may each include electrically modulated optical material such as one or more liquid crystal cells, each having a phase profile that is adjusted using patterned electrodes. Analog voltages may be provided to the patterned electrodes through variable-resistance conductive paths that are each coupled to a subset of the patterned electrodes. Digital voltage selection circuitry may be used to select which analog voltage to apply to each of the variable-resistance conductive paths from a predetermined set of analog voltages that are generated off of the lens. The digital voltage selection circuitry may include an array of multiplexers, each of which selects a desired voltage based on control signals received from digital control circuitry such a shift register and/or a decoder.

Abstract: Disclosed are a display panel, a driving method therefor, a display device. The display panel includes pixel circuits, data lines, write control lines, compensation control lines, a first driving circuit connected to compensation control lines, a second driving circuit connected to write control lines. Each column of pixel circuits corresponds to one data line, each row of pixel circuits corresponds to one write control line, one compensation control line. The first driving circuit outputs compensation control signals to pixel circuits by compensation control lines, second driving circuit outputs write control signals to pixel circuits by write control lines. The pulse width of compensation control signals is N times pulse width of write control signals, write control signals on two adjacent write control lines do not overlap, an overlap time of compensation control signals on two adjacent compensation control lines is (N?1)/N of pulse width of compensation control signals.

Abstract: In an electro-optical device, pixel circuits are provided corresponding to an intersection between a scanning line in an i-th row and a data line in a k-th column in a display region, and an intersection between a scanning line and data line. The pixel circuit is brought into an optical state in accordance with a voltage of a data line when a scanning line is selected. In an odd frame period, in the i-th row selection period and the (i+1)-th row, a data signal of a voltage corresponding to the i-th row and k-th column of data of the top image is output, and in an even frame period, in the i-th row selection period and the (i+1)-th row, a data signal of a voltage corresponding to the (i+1)-th row and the k-th column of data of the bottom image is output.

Abstract: A direct current-to-direct current (“DC-DC”) converter includes: a first converter which outputs a first power voltage in a normal mode or a power saving mode based on a inductor current generated therein, where the first converter operates in a first driving manner in the normal mode, and operates in a second driving manner in the power saving mode; a second converter which outputs a second power voltage based on a inductor current generated therein, where the second converter operates in a third driving manner in the power saving mode, and a magnitude of the second power voltage in the power saving to mode is different from that in the normal mode; and a mode selector which supplies a mode control signal to the first and second converters, where the first and second converters are driven in the normal mode or the power saving mode based on the mode control signal.

Abstract: A display device includes a display control circuit. The display control circuit includes: an arithmetic unit obtaining a video signal, and calculating, in accordance with the video signal, an average voltage value of a source signal in a display period; and a controller and a signal synthesizer supplying, in the display period, a source signal, based on the video signal, from a source drive circuit to a plurality of source lines, and supplying, in a suspension period, a source signal, having the average voltage value, from a source drive circuit to each of the source lines.

Abstract: The display apparatus includes a data generation circuit, a source driver circuit, and a pixel. The source driver circuit is electrically connected to the pixel through first and second wirings. The pixel includes a display device that is a liquid crystal device, a potential of one electrode of the display device can be a potential of the first wiring, and a potential of the other electrode of the display device can be a potential of the second wiring. The image data generation circuit has a function of generating digital image data including first and second data. One of the first and second wirings is made to have a potential corresponding to first data, and the other of the first and second wirings is made to have a potential corresponding to the second data. The potential of the first wiring and the potential of the second wiring are interchanged.

Abstract: A light emitting display device includes a display panel configured to display an image, a data driver configured to supply a data voltage to data lines of the display panel, and a sensing circuit configured to obtain a sensing voltage through sensing lines of the display panel after reflecting a negative impedance value canceling impedance differences of the sensing lines.

Abstract: An embodiment of the present disclosure is directed to a method of determining a charging time. The method includes: obtaining frame images corresponding to at least three grayscales; determining a luminance and a corresponding charging time of at least one test position in each of the frame images; obtaining a charging time luminance variance curve corresponding to the test position according to the luminance of the at least one test position in each of the frame images and the corresponding charging time; and determining the charging time corresponding to a highest luminance in the charging time brightness change curve as an optimal charging time.

Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.

Abstract: A signal obtained through sampling a gate start pulse signal GSP by using one of a plurality of gate clock signals is supplied as a shift pulse for a forward shift action (a forward shift start pulse signal) to the first stage of a plurality of stages constituting a bidirectional shift register, and a signal obtained through sampling the gate start pulse signal GSP by using another one of the plurality of gate clock signals is supplied as a shift pulse for a backward shift action (a backward shift start pulse signal) to the last stage of the plurality of stages constituting the bidirectional shift register.

Abstract: An electrical driver can be used to provide electrical drive signals to a first and second electrically controllable optical privacy glazing structures. A first electrical drive signal can be applied to the first privacy glazing structure and a second electrical drive signal can be applied to the second privacy glazing structure. Applying the first and second electrical drive signal can comprise temporally staggering delivery of the first and second electrical drive signals such that a peak power draw and/or a peak current draw from the first privacy glazing structure is temporally offset from a peak power draw and/or a peak current draw from the second privacy glazing structure. Staggering can include delaying the application of one electrical drive signal relative to the other, phase shifting one electrical drive signal relative to the other, or a combination thereof.

Abstract: The disclosure provides a display device including a first display panel and a second display panel. The second display panel is disposed above the first display panel. The first display panel includes a first pixel unit. The first pixel unit includes a first sub-pixel and a second sub-pixel, where the first sub-pixel and the second sub-pixel are connected in parallel. The display device of the disclosure has better yield.

Abstract: Apparatus comprises an image processor configured to provide output video images to a head mountable display, HMD, having one or more display elements to display video images to a wearer of the HMD, for display by the one or more display elements in response to input video images, in which each output video image corresponds to a respective input video image; in which: the image processor comprises a detector configured to detect whether an input image brightness at image locations in the input video images exceeds a threshold image brightness; and the image processor is configured to vary a relationship between the display properties at a given image location in a given output video image and the input image display properties at the given image location in the corresponding input video image in response to a detection that image brightness at the given image location in one or more input video images preceding that corresponding input video image exceeded the threshold image brightness.

Abstract: This application discloses a display device driving method and a display device. The driving method includes steps of: synchronously starting a backlight circuit, a timing control circuit and a power circuit; outputting a first signal after the timing control circuit is initialized; outputting a second signal after the power circuit is started; and controlling a gate driver to output a drive signal according to the first signal and the second signal.

Abstract: The present disclosure provides a display panel, a display device and a driving method. The display panel includes a display substrate and a driving chip. The display panel is configured to write a data signal to a corresponding pixel circuit at a pre-writing phase and a target data writing phase. The driving chip includes a voltage compensation module configured to obtain a compensation voltage value for the pixel circuits in each row in accordance with the quantity of pre-writing phases. Each pixel circuit is configured to write a pre-writing voltage stored in a parasitic capacitor to a gate electrode of a driving transistor in response to a pre-scanning signal at the pre-writing phase, and write a target writing voltage stored in the parasitic capacitor to the gate electrode of the driving transistor in response to a target scanning signal at the target data writing phase.

Abstract: A system, circuit, and method for implementing a low power common electrode voltage for a display (e.g., LCoS display) having transistors with low to moderate breakdown voltages may include a first and a second low voltage amplifier, wherein the first amplifier generates a pixel voltage and the second amplifier generates a predetermined voltage. The circuit may include a common electrode circuit coupled to the first and second amplifier to generate a common electrode voltage. Particularly, the circuit may include a control circuit coupled to the common electrode circuit, wherein, during a first phase, the control circuit selectively controls the common electrode circuit to generate a low common electrode voltage based upon a negative value of the predetermined voltage. Further, during a second phase, the control circuit selectively controls the common electrode circuit to generate a high common electrode voltage based upon the sum of the predetermined voltage and the pixel voltage.

Abstract: A scan-type display apparatus includes an LED array, a display module, a control module and a driver module. The LED array has a common anode configuration. The control module generates a synchronization control (SC) signal. Based on the SC signal, the driver module outputs an input voltage to scan lines of the LED array sequentially without overlapping in time so as to drive LEDs of the LED array to emit light in a line scan manner, and generates an image refresh signal that is related to the output of the input voltage to one of the scan lines which corresponds to a last line of the line scan in each line scan cycle and that is further related to refreshing of images on a display constituted by the LED array and the display module.

Abstract: The display control circuit includes a drive signal generation circuit that generates a gate drive signal, a scanning line drive circuit that supplies the gate drive signal to the scanning line, and a first wire through which the gate drive signal from the drive signal generation circuit is supplied to the scanning line drive circuit. The drive signal generation circuit includes a first potential supply circuit that supplies, to the first wire, a first potential equal to or lower than an off-potential of the pixel transistor, a second potential supply circuit that supplies, to the first wire, a second potential lower than the first potential, a third potential supply circuit that supplies, to the first wire, a third potential higher than the first potential, and a fourth potential supply circuit that supplies, to the first wire, a fourth potential equal to or higher than an on-potential of the pixel transistor.

Abstract: The present invention provides a display panel and a control method thereof, and a display device. The display panel includes a display unit and a backlight module. The display unit includes a main display region and a function additional region. The backlight module includes a first light source block providing a light source for the main display region and a second light source block providing a light source for the function additional region. The first light source block and the second light source block are independently driven and controlled.

Abstract: The present disclosure provides a method, a device, a system, and a display device for adjusting a luminance viewing angle of a liquid crystal display panel. The method obtains an actual value of a luminance viewing angle corresponding to a current image, adjusts a positive and negative polarity driving voltage when the actual value is less than a threshold value to obtain a relational expression between the positive and negative polarity driving voltage and the luminance viewing angle, processes a difference value between the actual value and the threshold value to obtain a target driving voltage value, and adjusts the positive and negative polarity driving voltage according to the target driving voltage value, thereby realizing adjustment of the luminance viewing angle.

Abstract: A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.

Abstract: The present disclosure provides a pixel structure, a method of driving the same and a display device. The pixel structure includes gate lines, data lines, and a plurality of subpixels arranged in an array form. Subpixels in each row correspond to two gate lines. Each data line corresponds to the subpixels in two adjacent columns, and each data line is arranged between the two adjacent columns of subpixels. Among the subpixels in each row, three adjacent subpixels are in different colors and forms a complete pixel unit. Among the subpixels in each column, three adjacent subpixels are in different colors and forms the complete pixel unit. Among the subpixels in two adjacent columns, the subpixels in two adjacent rows form two complete pixel units each including three subpixels, and two of the three subpixels are shared by the two pixel unit.

Abstract: A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.

Abstract: A driving controller of a display device includes a timer which counts an operation time and outputs a count signal, a memory which stores compensation data, a control signal generation part which receives the compensation data from the memory in response to the count signal and outputs a compensation data signal corresponding to the compensation data, and an image processor which converts an image signal into a data signal and outputs the data signal, where the data signal is obtained by combining the image signal and the compensation data signal. The compensation data includes first compensation data corresponding to a first operation time and second compensation data corresponding to a second operation time which is different from the first operation time.

Abstract: Disclosed is an organic light-emitting diode display device including: a display panel in which pixels adjacent to each other are paired and arranged to share a single data line in pixel areas defined by gate and data lines; a gate driver configured to drive the plurality of gate lines; a data driver configured to output a data voltage to data voltage output channels on the basis of an arrangement of pixels; a data switcher configured to alternately select a data line and to electrically connect the data line with the data voltage output channel of the data driver; and a timing controller configured to control the data switcher and the gate and data drivers, thereby making it possible to drive a data driving circuit at high driving frequency and to reduce a deterioration of image quality and image distortion even in a simplified structure of the data driving circuit.

Abstract: A scan driver includes: a plurality of first stages configured to sequentially output a plurality of intermediate scan signals based on a scan start signal; a plurality of masking transistors respectively connected to a plurality of output terminals of the plurality of first stages, and configured to selectively transfer the plurality of intermediate scan signals in response to a masking signal, respectively; and a plurality of second stages including a plurality of input terminals respectively connected to the plurality of masking transistors, and configured to selectively output a plurality of scan signals based on the plurality of intermediate scan signals selectively transferred by the plurality of masking transistors.

Abstract: An apparatus for driving an electro-optic display may comprise a first switch designed to supply a voltage to the electro-optic display during a first driving phase, a second switch designed to control the voltage during a second driving phase and a resistor coupled to the first and second switches for controlling the rate of decay of the voltage during the second driving phase.

Abstract: A display device includes a display panel, a data driving circuit which drives a plurality of data lines, a scan driving circuit which drives a plurality of scan lines, and a driving controller which controls the data driving circuit and the scan driving circuit such that the display panel is divided into a first display region and a second display region during a multi-frequency mode and the first display region and the second display region are respectively operated at different frequencies, where the driving controller changes an operation mode to a normal mode when a still image and a moving image are simultaneously displayed in the first display region during the multi-frequency mode and the duration of the still image reaches a predetermined time.

Abstract: A liquid crystal display device includes: a first electrode layer provided on a display surface side to prevent noise from being emitted from a display element to the outside; a second electrode layer provided outside the first electrode layer to perform position detection; a hover signal generation unit that generates a detection signal to be input to the second electrode layer and the first electrode layer for detection of an indicator approaching the display surface; a common electrode that applies a common voltage to derive the display element; a cancellation signal generation unit that generates a cancellation signal which cancels a signal component leaking from the first electrode layer to the common electrode; and a voltage addition unit that superimposes a cancellation signal on the common voltage.

Abstract: The present disclosure provides a method for compensating a common voltage. The method for compensating a common voltage includes: generating a feedback signal by acquiring a real-time monitoring result of a feedback signal line on the common voltage, the feedback signal including a plurality of time periods, each of the time periods including a first sub-period in which the feedback signal is interfered by the periodic signal and a second sub-period in which the feedback signal is not interfered by the periodic signal; processing the feedback signal to eliminate distortion of the feedback signal caused by interference of the periodic signal in the first sub-period; and compensating for the common voltage according to the feedback signal.

Abstract: Embodiments relate to a display device including an active display area with pixels arranged in rows and columns, where a focus area of the active display area is operated in a progressive scanning manner and a non-focus area of the active display area is operated in an interlaced scanning manner. The active display area is driven by a gate driver circuit that supplies gate signals the pixels. First stages of the gate driver circuit are coupled to first rows of the pixels that are in the focus area and output first gate signals in the progressive scanning manner. Second stages of the gate driver circuit are coupled to second rows of the pixels that are in the non-focus area and output second gate signals in the interlaced scanning manner.

Abstract: A driving circuit for display panel is provided. Wherein, a first and a second power supply circuits produce a first and a second supply voltages. The electric charge provided by the second power supply circuit is less than that provided by the first power supply circuit. A plurality of drivers include a plurality of first power input terminals and a plurality of second power input terminals. The first power input terminals are coupled to the first power supply circuit and receives the first supply voltage. The second power input terminals are coupled to the second power supply circuit and receives the second supply voltage. The drivers increase the voltage levels of a plurality of gate signals in a voltage rising period according to the first supply voltage. The drivers hold the voltage levels of gate signals in a voltage holding period according to the second supply voltage.

Abstract: A voltage regulator circuit includes a power chip, a controlling chip, and a regulating chip. The controlling chip is configured to transmit a control signal, the regulating chip is configured to regulate an outputted voltage from the power chip to a preset voltage according to the control signal. The controlling chip is further configured to convert the preset voltage to a reference voltage.

Abstract: The present disclosure provides a voltage driving method and device for a touch display panel, and a touch display panel, which includes a common electrode extending in a first direction and a plurality of columns of touch electrodes extending parallel to each other in a second direction. The voltage driving method includes: applying a first scanning voltage to two outermost columns of touch electrodes during a first period of a first touch cycle including a plurality of periods, the first scanning voltage being equal to a reference voltage; detecting a first output voltage output by the two outermost columns of touch electrodes during the first period; and adjusting, based on the detected first output voltage, the scanning voltage applied to the two outermost columns of touch electrodes during a first period of a second touch cycle immediately after the first touch cycle, to a second scanning voltage.

Abstract: The present disclosure provides a method and apparatus for driving a display panel, and a display device. The method includes: upon driving an ith row of sub-pixels, scanning a gate line connected to a jth row of sub-pixels, and determining a reference grayscale of each of the jth row of sub-pixels in each candidate connection mode, wherein a plurality of data lines have a plurality of candidate connection modes; determining a target connection mode that minimizes a grayscale variation degree of the jth row of sub-pixels from the plurality of candidate connection modes; connecting the plurality of data lines according to the target connection mode; and disconnecting the plurality of data lines before driving the jth row of sub-pixels through the plurality of data lines.

Abstract: A method for charging pixels and a display panel is provided, the method comprising: turning on thin-film transistor switches of pixels in a current row; inputting a positive polarity signal to one of a first data line and a second data line; inputting a negative polarity signal to the other of the first data line and the second data line at set intervals; turning off the thin-film transistor switches of the pixels in the current row.

Abstract: A display apparatus includes a display panel including a plurality of pixels; a source driver configured to convert RGB image data into an RGB image signal, and output the RGB image signal based on a common voltage to each of the plurality of pixels; and a timing controller configured to output the RGB image data to the source driver, and when it is determined the common voltage is changed, the timing controller may adjust the RGB image data to compensate the change of the common voltage, and output the adjusted RGB image data to the source driver.

Abstract: A pixel matrix driving device and a display device are provided. The pixel matrix driving device includes a pixel matrix, a timing controller and a driving circuit. The pixel matrix includes a plurality of sub-pixels, an i-th column of sub-pixels in the plurality of sub-pixels and an (i+1)-th column of sub-pixels in the plurality of sub-pixels have different polarity inversion positions. The timing controller is configured for obtaining an initial pixel value, and obtaining a first grayscale value and a second grayscale value according to the initial pixel value. The driving circuit is configured for obtaining a first driving voltage according to the first grayscale value, obtaining a second driving voltage according to the second grayscale value, and applying the first driving voltage and the second driving voltage into the pixel matrix. The disclosure can improve the horizontal equidistant horizontal stripes and improve the washout phenomenon of the display panel.

Abstract: An optical device (34, 66, 76) includes an electro-optical layer (48), having an effective local index of refraction at any given location within an active area of the electro-optical layer that is determined by a voltage waveform applied across the electro-optical layer at the location. Conductive electrodes (44, 64, 74, 82, 84) extend over opposing first and second sides of the electro-optical layer. The electrodes include an array of excitation electrodes, which extend along respective, mutually-parallel axes in a predefined direction across the first side of the electro-optical layer, and which includes at least first and second electrodes having different, respective widths in a transverse direction, perpendicular to the axes. Control circuitry (38) is coupled to apply respective control voltage waveforms to the excitation electrodes so as to generate a specified phase modulation profile in the electro-optical layer.

Abstract: An apparatus comprising a liquid crystal material and a controller are described herein. The liquid crystal material is disposed between a first electrode and a second electrode opposite the first electrode. Molecules of the liquid crystal material assume a first orientation during a first state of the liquid crystal material and a second orientation during a second state of the liquid crystal material. The first orientation is different from the second orientation. The controller is coupled to the first electrode and the second electrode to perform operations. The operations include applying a first periodic waveform to the first electrode and a second periodic waveform to the second electrode to generate a drive waveform applied across the liquid crystal material. The operations further include changing a duty cycle of the drive waveform over a first time period to transition the liquid crystal material between the first state and the second state.

Abstract: A shift register unit, a method for driving a shift register unit, a gate drive circuit, and a display device are provided. The shift register unit includes a display circuit, and the display circuit is configured to provide a drive scanning signal to a corresponding gate line in a display phase, and the display circuit includes a first control circuit and a first bias control circuit. The first control circuit is configured to perform noise reduction on an output terminal of the display circuit under control of a level of the first node. The first bias control circuit is configured to transmit a first reference voltage signal provided by the first reference voltage signal terminal to the first node under control of a first clock signal provided by the first clock signal terminal, thereby turning off the first control circuit by controlling the level of the first node in a non-display phase.

Abstract: The invention discloses a pixel structure and a pixel unit. The pixel structure includes a main electrode; and a plurality of branch electrodes connected to the main electrode; wherein the branch electrode includes a first branch electrode and a second branch electrode, an acute intersecting angle between the first branch electrode and the main electrode is a first angle, and an acute intersecting angle between the second branch electrode and the main electrode is a second angle. The invention solves the whitening phenomenon which occurs in the side view by designing the acute intersecting angle between the branch electrode and the main electrode as the first angle and the second angle.

Abstract: A driving method of a display panel, a driving circuitry of a display panel and a display device are provided. The display panel includes Y gate lines, the Y gate lines are divided into a plurality of gate line groups based on a scanning sequence of the Y gate lines, and each gate line group includes at least one gate line; the driving method includes: determining an ith gate line to be scanned; adjusting an original charging duration of a scanning signal corresponding to the ith gate line to an adjustment charging duration, where the adjustment charging duration of every gate line in each gate line group are identical, and the adjustment charging durations of respective gate line groups gradually increase in a direction away from a source driver; and outputting the scanning signal corresponding to the ith gate line to the ith gate line, based on the adjustment charging duration of the ith gate line.

Abstract: There are provided a pixel charging method, a circuit, a display device and a computer storage medium. The method includes: acquiring a gray-scale value of each row of sub-pixels in an image frame of an image to be displayed; determining a charging time of each row of the sub-pixels according to the gray-scale value thereof; and charging each row of the sub-pixels according to the charging time thereof when a display panel displays the image frame. The charging time of each row of sub-pixels is determined according to the gray-scale value of each row of the sub-pixels, so as to reduce a charging rate difference between two rows of sub-pixels which have a relatively larger gray-scale value difference therebetween, and achieve an effect of improving the uniformity of the charging rates of all rows of sub-pixels in the display panel.

Abstract: In accordance with various embodiments, lighting systems features multiple inter-connectable light panels each having multiple light-emitting elements thereon. One or more of the light panels features one or more connectors, and associated conductors, for the transmission of power, communication signals, and/or control signals.

Abstract: A display device includes a display panel, a power supply, a signal controller configured to generate first and second clock signals having a period, a clock signal generator configured to generate a gate clock signal that is raised to a high level voltage in synchronization with the first clock signal, and that falls to a low level voltage in synchronization with the second clock signal, generate a panel separation signal by comparing a voltage of the gate clock signal with a first reference voltage during a falling period during which the gate clock signal falls, and transfer the panel separation signal to the power supply or the signal controller, and a gate driver configured to sequentially apply a gate signal by using the gate clock signal, wherein the power supply or the signal controller is configured to stop outputting depending on the panel separation signal.