Abstract: An inverter of driving a light source for a display device is provided. The inverter includes a temperature sensor sensing a temperature and generating an output voltage based on the sensed temperature, a buffer generating an output signal having a state depending on the output voltage of the temperature sensor, an oscillator generating an oscillating signal having a frequency depending on the state of the output signal of the buffer, and an inverter performing a switching operation in response to the oscillating signal from the oscillator. Therefore, the inverter increases the voltage applied to the light source when the temperature near the light source is lower than a predetermined temperature since the frequency of the oscillating signal is increased.

Abstract: A buffer generating an output signal and including a pull-high module and a pull-low module is disclosed. The pull-high module makes the output signal to have a rising edge. The pull-low module makes the output signal to have a falling edge. The falling edge includes a plurality of falling portions. A slope of a first falling portion of the falling portions is different from a slope of a second falling portion of the falling portions.

Abstract: An electro-optical device displays a right-eye image and a left-eye image for each display period. The driving circuit supplies a gradation potential to each of the pixels according to a specific gradation using image data which corresponds to the unit period in each of a plurality of unit periods in each of the display periods, and sequentially selects the scanning lines in a plurality of lines and supplies a gradation potential to each of the signal lines according to a specific gradation of each of the pixels which corresponds to any of the scanning lines out of the plurality of lines in a selected state in a unit period in each of the display periods. A driving control section executes overdrive of each of the pixels in the driving circuit in each of two or more unit periods which include the unit period in each of the display periods.

Abstract: To provide a display device which can reduce driving frequency of a controller and a driver for inputting a signal to the display device and increase brightness of a screen without increasing the driving frequency. The display device includes: a display screen having a plurality of pixels provided by corresponding to intersection points between scan lines and data lines; a scan line drive circuit which drives the scan lines; a data line drive circuit which drives the data lines; and a display device body having an image display control device which operates the drive circuit so as to sequentially and repeatedly display two or more types of images. The image display control device causes the scan line drive circuit to simultaneously select two or more scan lines for at least one type of image among the two or more types of images sequentially displayed.

Abstract: A liquid crystal display device comprises: a display panel having a pixel array comprising a first group of cells and a second group of cells and configured to share data lines with cells of the first group adjacent in extension direction of the gate lines; a data driving circuit comprising a latch array, wherein the latch array temporally separates first group data to be applied to the liquid crystal cells of the first group and second group data to be applied to the liquid crystal cells of the second group according to data rendering control signals, and outputs the first group data earlier by about ½ horizontal period than the second group data.

Abstract: A liquid crystal panel, a scanning circuit and a method for generating angle waves are provided. A scanning circuit for generating angle waves includes a scanning module and a plurality of angle wave modules. The scanning module has a plurality of scan output ends for outputting scan driving signals respectively in order, wherein the scan driving signal includes a first voltage and a second voltage. The angle wave modules are electrically connected to the scan output ends respectively in order; wherein a second output end of each angle wave module is electrically connected a first output end of next one of the angle wave modules, whereby a part of electrical energy received by the second output end of the angle wave modules is transmitted to the first output end of the next one of the angle wave modules.

Abstract: A liquid crystal display device includes: a plurality of pixel circuits which is arranged in a matrix shape; a plurality of data lines; a selection unit which sequentially selects the plurality of pixel circuits for every group which is fewer in number than the number of rows of the pixel circuits; a control unit which sequentially changes the pixel circuits included in the groups; and a data signal supply unit which outputs a data signal to each data line. Each of the plurality of sequentially selected pixel circuits is connected to each of the different data lines.

Abstract: According to an aspect, a display device includes: a display region in which a plurality of pixels are arranged in a matrix; a plurality of signal lines that extend in a second direction in the display region; a vertical drive circuit that is coupled to first ends of the scanning lines and applies a vertical scanning pulse to the first ends to select each row of the pixels in the display region; a horizontal drive circuit that performs a display operation of supplying an image signal to each of the pixels in the row selected by the vertical drive circuit through the signal lines; and a plurality of switches that are coupled to second ends of the scanning lines respectively. Each of the switches supplies the same potential as that supplied to the first ends by the vertical drive circuit to the second end corresponding thereto in an idle period.

Abstract: In a memory liquid crystal display device, a potential of a storage capacitor line signal (CS) supplied to the CS lines (CSL(i)) are once decreased (?Vcs) while the gate lines (GL(i)) are made simultaneously active (period t4, period t10) in the data holding period (T2), and the potential of the storage capacitor line signal (CS) is made back to its original potential while the gate lines (GL(i)) are made simultaneously inactive and the refresh output control lines (RC(i)) are made active (period t5, period t11). This reduces flicker, thereby allowing for improvement in display quality of the memory liquid crystal display device.

Abstract: A display drive circuit that performs digital driving for displaying an image of each one frame based on luminance data of a plurality of subframes is disclosed. The display drive circuit includes a conversion section that converts the luminance data having a plurality of bits indicating a luminance level of each of the plurality of subframes into data indicating the luminance level for pixels in a number greater than the number of the plurality of subframes, and a storage section that stores the data converted by the conversion section.

Abstract: A liquid crystal display includes a liquid crystal display panel having a pixel array including a first group of liquid crystal cells connected to odd-numbered gate lines and a second group of liquid crystal cells connected to even-numbered gate lines and a data driving circuit including a latch array. Each liquid crystal cell of the second group shares a data line with one liquid crystal cell of the first group adjacent to the liquid crystal cell of the second group in an extension direction of the gate lines. The latch array delays only second group data to be applied to the liquid crystal cells of the second group among digital video data for one horizontal line by about one half horizontal period in response to a data rendering control signal.

Abstract: A display apparatus includes pixels connected to gate lines and data lines, a gate driver configure to drive the gate lines, a data driver including a plurality of data driving parts configured to drive the data lines. The control board includes a processor that outputs an image signal and a control signal and a timing controller that outputs a first control signal to control the gate driver and a second control signal and a data signal to control the data driver in response to the image signal and the control signal.

Abstract: A high gate voltage generator and a display module are provided. The high gate voltage generator includes a pulse width modulation (PWM) signal generating circuit, a boost circuit, and an amplifier circuit. The PWM signal generating circuit is used for outputting a PWM signal. The boost circuit is electrically connected to the PWM signal generating circuit and used for receiving an input voltage to boost the input voltage according to the PWM signal and then outputting a power voltage. The amplifier circuit is electrically connected to the boost circuit and used for receiving a reference voltage to amplify the power voltage and then outputting a high gate voltage. The reference voltage is greater than the high gate voltage and is provided by a backlight module electrically connected to the amplifier circuit.

Abstract: A method of driving a display panel includes applying a common voltage to the display panel, sensing a frequency of the display panel to generate a frequency signal, adjusting a gain of an operational amplifier based on the frequency signal, receiving a feedback common voltage from the display panel, and compensating the common voltage using an input resistor, the operational amplifier and a feedback resistor based on the feedback common voltage to apply the compensated common voltage to the display panel. The operational amplifier includes an inverting input terminal connected to the input resistor, a non-inverting input terminal to which a reference common voltage is applied and an output terminal. The feedback resistor is between the inverting input terminal and the output terminal.

Abstract: By following properties that there is coupled noise, which is coupled from a display panel, within at least one common voltage used on the display panel, the at least one common voltage is fed-back into a pixel electrode driving module, and driving voltages are generated accordingly, so that the generated driving voltages carry noises closes to coupled noises of the display panel. As a result, while the driving voltages carrying noises from the at least one common voltage, the pixel electrode driving module is capable of driving a corresponding pixel electrode with a stable voltage difference, and thereby capable of relieving horizontal crosstalk and raising a display quality of the display panel.

Abstract: A liquid crystal display and a driving method thereof are provided. The liquid crystal display includes a plurality of pixels, a plurality of scan lines, and a plurality of data lines. Each pixel includes a plurality of sub-pixels. Each sub-pixel is coupled to the data line, and includes a switch, a storage capacitor, and a sub-pixel electrode. The switch is coupled to a scan line to receive a scan signal. The switch is turned on by the scan signal to receive a data signal transmitted from the data line. The storage capacitors of the sub-pixels of each pixel are coupled to the scan lines, or the storage capacitor of one of the sub-pixels of each pixel is coupled to a common electrode and the storage capacitors of the other sub-pixels are coupled to the scan lines. The switch and the storage capacitor of each sub-pixel are coupled to different scan lines.

Abstract: The invention relates to a driving method, compensation processor and driver device for liquid crystal display. The driving method includes steps of receiving data signal of a present frame; obtaining an average brightness value of the present frame; comparing the previous frame with the present frame, and when the difference between the average brightness values is larger than or equal to a set threshold, generating at least two back light driver pulse signals of which the duty ratios gradually changing, and outputting them to drive the back lights. The compensation processor includes a data analysis module, a data compensation module, a back light linear filtering module and a pulse generator module. The driver device employs the compensation processor of the present invention.

Abstract: To provide a hold-type display device without a problem of motion blur and a driving method thereof. The length of a period for displaying a blanking image in one frame period is controlled in accordance with a control parameter showing the degree of motion blur, and the level of a signal supplied to a display element is changed in accordance with the length of the period for displaying the blanking image. Accordingly, the hold-type display device without a problem of motion blur and the driving method thereof can be provided.

Abstract: A driving circuit for driving a liquid crystal display device having a plurality of gate lines, data lines and switch elements connected to the gate and data lines includes a data driver for applying a plurality of data signals to the date lines, a gate driver for applying a plurality of gate signals to the gate lines, a timing controller for providing a plurality of control signals to the data and gate drivers, a power supply for generating a power voltage, and a discharging circuit for applying a first signal and a second signal to the gate driver in accordance with the power voltage.

Abstract: A mono domain vertical alignment type liquid crystal display apparatus to be multiplex driven is provided whose display uniformity at a large pretilt angle (near 90°) is improved. Waveform A is applied to a liquid crystal cell of a mono domain vertical alignment type, the waveform A having a duty not lower than 4 and a frame frequency of f. The frame frequency f is determined from a pretilt angle ?p, and is a frequency not lower than 60 Hz at a pretilt angle of 88.5°??p<89.6° or a frequency not lower than [120×(?p?89.6)+60] Hz at a pretilt angle of 89.6°??p?89.9°.

Abstract: A method for driving an active matrix display wherein each image frame is divided into a number of displayed frame portions, each of which is followed by a darker frame portion. The image data in the darker frame portion is removed so as to allow the pixel luminance to diminish. The temporal separation between the displayed frame portion and the following darker frame portion is smaller than a frame time. In a display where the lines are driven repetitively for forming the display image in a plurality of frame times, the image data provided to a pixel, after the luminance in that pixel changes from low to high, is adjusted so that the brightness of the pixel in the preceding frame times appear higher or not lower than that in following frames times.

Abstract: A gamma tab voltage generator includes a plurality of, a data calculator configured to generate a buffer selection information and a buffer combination information based on a current capacity of buffer, a plurality of digital-to-analog converters configured to generate gamma tab voltages based on a gamma tab voltage information, a buffer selector configured to connect input terminals of the buffers selected based on the buffer selection information to output terminals of the digital-to-analog converters, and a buffer combiner configured to connect output terminals of the selected buffers to one another in response to the buffer combination information.

Abstract: At least one embodiment of a liquid crystal display device including: pixels each of which includes a plurality of sub-pixels; and scanning signal lines provided in a display area, the scanning signal lines being divided into groups each of which includes a plurality of scanning signal lines, the groups being sequentially selected, the polarity POL of signal electric potentials being inverted when the selected group is changed from a preceding group to a succeeding group which is selected immediately after the preceding group, a plurality of (for example, two) dummy scanning periods being inserted between a horizontal scanning period corresponding to last horizontal scanning (scanning of G23) in the preceding group and a horizontal scanning period corresponding to first horizontal scanning (scanning of G2) in the succeeding group, and a scanning signal line (for example, G2) which belongs to a group selected after the preceding group being subjected to dummy scanning during each dummy scanning period so as to

Abstract: The present disclosure provides a chamfer circuit in a driving system of a liquid crystal display (LCD) panel and a uniformity regulating system and method. The chamfer circuit comprises a discharging resistor. The discharging resistor is an adjustable resistor, a resistance of the adjustable resistor is adjustable. In the present disclosure, a slope of a chamfered section is changed by regulating the resistance of the discharging resistor to change uniformity of the LCD panel. In this way, the discharging resistance is regulated without replacing the discharging resistor, and the uniformity of the LCD panel is regulated in accordance with each piece of the LCD panel.

Abstract: The present disclosure provides a liquid crystal display (LCD) panel driving method and a driving circuit. The method includes sending the scanning waveform to the LCD panel after the scanning waveform includes a chamfered section by control of a chamfer circuit to drive the LCD panel. The scanning waveform includes at least two chamfered sections having different slopes in each scanning period of the scanning waveform.

Abstract: A driving device drives a liquid crystal display panel in which the number of source lines is by one larger than the number of columns of pixel electrodes and in which the columns of pixel electrodes are arranged between the source lines. The driving device has a configuration in which potential output terminals, in a central region, are not connected to any source line. A voltage follower is connected to an output switching section. Additionally, potential output terminals are connected through switches to input terminals, respectively. The switch connects a first terminal to a second terminal with control signal at a high level and connects the first terminal to a third terminal with at a low level.

Abstract: A method for driving a liquid crystal display (LCD) is disclosed. The LCD includes a common electrode, a pixel electrode, and a liquid crystal layer having a plurality of impurity ions. The method includes: separating the impurity ions toward the common electrode and the pixel electrode to form an internal electric field in the liquid crystal layer; and providing a common voltage for the common electrode, and providing a first compensation voltage and a second compensation voltage for the pixel electrode. The first compensation voltage and the second compensation voltage herein are utilized to compensate the internal electric field so that a difference between the first compensation voltage and the common voltage is equal to a difference between the second compensation voltage and the common voltage. Charge accumulation is formed intentionally, and then the first compensation voltage and the second compensation voltage are provided to correctly display images.

Abstract: At least one embodiment of a liquid crystal display device including a display unit having scan signal lines divided into a plurality of groups which are successively selected. While the scan signal lines belonging to the selected group are successively scanned horizontally, signal potentials of the same polarity are successively supplied to a data signal line. The polarity of the signal potential is reversed between a preceding group and a subsequent group which are selected continuously. A plurality of dummy scan periods are inserted between the horizontal scan period corresponding to the last horizontal scan in the preceding group and the horizontal scan period corresponding to the first horizontal scan in the subsequent group.

Abstract: An overdriving apparatus is provided in the invention. The apparatus includes a receiving module, a storing module, a dynamic information generating module, and an image driving module. The receiving module receives image data relative to an image signal. The storing module is used for storing the image data. Based on the image data, the dynamic information generating module generates dynamic information corresponding to a current image. The image driving module then generates an overdriving signal and/or a standard driving signal, according to the dynamic information and the image data, to drive a display.

Abstract: To provide a display device in which reliability of a driver circuit can be improved by suppressing shift of the threshold voltage of a TFT. The minimum power supply voltage that is optimal for driving a transistor used in the driver circuit is found by actually changing voltage applied to a gate of the transistor. Specifically, voltage that is output from an output circuit included in the driver circuit when a value of power supply voltage applied to a shift register is changed is monitored. Then, a value of the power supply voltage is found such that a value of the voltage output from the output circuit satisfies a value enough to operate a pixel portion, and the driver circuit is operated using the power supply voltage.

Abstract: In one embodiment of the present invention, when a still image is displayed, applied voltages respectively corresponding to a total of n (n being an integer of not less than 4) types of gradation 0 to (n?1) are outputted to pixels. When a moving image is displayed, an applied voltage corresponding to a predetermined gradation m (1?m?(n?2)) is applied to the pixels instead of applied voltages respectively corresponding to gradations of less than the predetermined gradation m. Overdrive driving is performed with respect to a total of n types of gradation.

Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract: A self-detection charge sharing module for a liquid crystal display device is disclosed. The self-detection charge sharing module includes at least one detecting unit, for detecting a plurality of input voltages of a plurality of operational amplifiers driving a plurality of data line sand a plurality of output voltage of the plurality of data line, to generate at least one detecting result, and at least one charge sharing unit, for conducting connection between at least one first data line and at least one second data line among the plurality of data line when the at least one detecting result indicates at least one corresponding first input voltage and at least one corresponding second input voltage among the plurality of input voltage have opposite voltage variation direction and vary toward each other. The at least one first input voltage and the at least one second input voltage maintain respective polarities.

Abstract: A liquid crystal display, applying to the first electrode, a voltage higher and a voltage lower at different timings, detecting a current flowing through the second electrode, designating, as a reference value, the current flowing through the second electrode when the voltage maintained in the liquid crystal element is reset, specifying a first current which is obtained by excluding a charging current due to application of a related higher voltage from currents flowing through the second electrode after the higher voltage is applied to the first electrode, and a second current which is obtained by excluding a charging current due to application of a related lower voltage from currents flowing through the second electrode after the lower voltage is applied to the first electrode, and comparing the first current with the second current, and controlling the first current and the second current based on the comparison result.

Abstract: A control circuit includes a power supply, a control IC, a liquid crystal panel, a driving integrated chip arranged between the control IC and the liquid crystal panel, and a number of voltage adjusting sub-circuits. The driving integrated chip includes a plurality of output ports for outputting a plurality of driving voltages respectively. Each voltage adjusting sub-circuit is arranged between the corresponding output port of the driving integrated chip and the liquid crystal panel for adjusting an initial value the voltage outputted from the corresponding output port before the driving voltage is transferred to the liquid crystal panel. With the voltage adjusting sub-circuits, the driving voltages received by the liquid crystal panel have the same value to avoid the color deviation of the images displayed in the liquid crystal panel. This improves the display effect of the liquid crystal panel under without increasing the layout area.

Abstract: In a display driver, image data are assembled with synchronization information to form a stream of digital data. The stream of digital data is transmitted from a timing controller to a data driver along with a timing signal having phase-delayed pulses obtained from an external clock received by the timing controller. In response to the timing signal, the data driver can extract a synchronizing signal from the synchronization information embedded in the stream of digital data, and use the synchronizing signal for generating an internal clock signal. Encoded image data in the stream of digital data then can be retrieved according to the internal clock signal.

Abstract: A liquid crystal display device which has higher definition and reduced power consumption while its image quality is maintained is provided. A switching transistor of an active matrix liquid crystal display device is formed using a transistor having an extremely low off-state current to reduce the area of a capacitor; the capacitance value of parasitic capacitance formed by the left end of a pixel electrode and a first source line is made to be approximately the same as that of parasitic capacitance formed by the right end of the pixel electrode and a second source line; and video signals having one polarity are input to the first source line, and video signals having the other polarity are input to the second source line.

Abstract: A system and method for driving a three-dimensional liquid crystal display (3D LCD) device, uses a target frequency, where the target frequency is double of a monocular frequency of an input picture of the 3D LCD device, and the monocular frequency is in the range of 62-118 Hz. The system and method converts a frame rate of the input picture of the 3D LCD device into (62 Hz-118 Hz)×2, and monocular frequency through the 3D glasses is in the range of 62 Hz-118 Hz.

Abstract: Method of driving a pixel element having a first capacitive element, a first transistor, and a compound-switch that includes at least one switching transistor and at least one secondary switching element. The method includes (1) setting the bias voltage of the first transistor to a value that is substantially close to a threshold voltage of the first transistor at the end of a first time period after starting changing a voltage across the first capacitive element at the beginning of the first time period, and (2) writing a pixel data into the pixel element to change the bias voltage of the first transistor to a target value that is different from the threshold voltage of the first transistor during a second time period while keeping the compound-switch at conducting state. The first time period is at least three times as long as the second time period.

Abstract: A method for generating a gamma voltage comprising, a first low voltage and a first high voltage having a first voltage range between the first low voltage and the first high voltage are divided into a plurality of gamma voltages of a first polarity during a first interval. A second low voltage and a second high voltage having a second voltage range between the second low voltage and the second high voltage are divided into a plurality of gamma voltages of a second polarity during a second interval.

Abstract: In one embodiment, a liquid crystal display device is disclosed in which a gate driver applies a gate-on pulse so that a second period is longer than a first period. Among gate-on pulses applied before the moment of polarity inversion of a data signal, the last end of the gate-on pulse nearest to the moment of the polarity inversion is earlier than the end time of the horizontal period during which the gate-on pulse is applied. The first period starts at the last end of the gate-on pulse and ends at the end time of the horizontal period during which the gate-on pulse is applied. The second period starts at the moment of the polarity inversion and ends at the moment of the application start of the gate-on pulse nearest to the moment of the polarity inversion among the gate-on pulses applied after the polarity inversion.

Abstract: A gate driving circuit and a display, the gate driving circuit comprises a plurality of shift register connected in cascade. The shift register comprises: a signal outputting circuit (32), a signal inputting circuit (31), an inverting circuit (33) and a logic circuit (33). The signal outputting circuit (32) receives a forward direction clock signal from an external circuit and comprises a clock transistor and a level transistor. The signal outputting circuit outputs the forward direction clock signal when the clock transistor is turned on and outputs a constant-low level signal when the level transistor is turned on. The signal inputting circuit (31) receives an output signal from a previous shift register, and turns on the clock transistor when the received output signal of the previous shift register is valid.

Abstract: A method for driving a liquid crystal display (LCD) includes receiving image data of each display unit of the LCD in every display period to determine gray levels of the display units, controlling a gate driver of the LCD to scan each of the display units at least twice every display period, controlling a source driver of the LCD to generate a switch signal, controlling the source driver to determine the gray levels of one row of the display units when the switch signal is at a first voltage level, and controlling the source driver to drive one row of the display units to a predetermined gray level status when the switch signal is at a second voltage level.

Abstract: A method of driving a pixel element in an active matrix display. The method comprises: (1) driving the semiconductor channel of the at least one switching transistor into a conducting state from a non-conducting state, and maintaining the semiconductor channel of the at least one switching transistor at the conducting state for a first time duration; (2) driving the at least one nonlinear element into a conducting state from a non-conducting state, and maintaining the at least one nonlinear element at the conducting state for a second time duration that is within the first time duration; (3) changing a voltage across the at least one capacitive element while the semiconductor channel of the at least one switching transistor maintains at the conducting state and the at least one nonlinear element maintains at the conducting state.

Abstract: An LCD monitor capable of automatically switching display mode, the corresponding control method and the controller for controlling the LCD monitor are provided. The LCD monitor includes a digital signal receiver, a signal certification unit, an image processor, and an LCD panel. The digital signal receiver receives a digital image signal. The signal certification unit which is coupled to the digital signal receiver determines if the digital image signal conforms to a protocol and generates a control signal. The image processor which is coupled to the digital signal receiver and the signal certification unit determines the display mode of the LCD monitor according to the control signal and processes the digital image signal according to the display mode to generate an output image signal. The LCD panel which is coupled to the image processor displays the image contents of the output image signal.

Abstract: A driving method of a liquid crystal display panel having a source line and a counter electrode, includes driving the counter electrode to a first potential, driving the, counter electrode to a second potential being different from the first potential, setting the counter electrode and the source line to a third potential by short-circuiting the counter electrode and the source line to an interconnection having a potential between the first potential and the second potential, and driving the source line to a potential corresponding to an image data. The setting of the counter electrode and the source line to the third potential occurs in a period of one frame.

Abstract: Disclosed is a gate printed circuit board, a connector-free liquid crystal display (LCD) panel assembly, a driving-signal timing module included in the liquid crystal display (LCD) panel assembly, and a method of driving the liquid crystal display (LCD) panel assembly. According to the present invention, since a separate connector and a gate printed circuit board of a conventional LCD panel is not required for applying a gate-driving signal generated from an external information processing device, a thickness and the number of parts of the LCD device is reduced. Further, when the gate-driving signal is transmitted through the TFT substrate, the voltage Voff for maintaining a thin-film transistor (TFT) in a turned-off state is modified so that users may not recognize the imbalance in brightness.

Abstract: A source driver includes a ladder circuit for outputting multilevel gradation voltages by resistance voltage division, a first decoder for selecting one gradation voltage corresponding to the inputted image data to output the selected gradation voltage, an external power supply for supplying multilevel pre-charging voltages, a second decoder for selecting one pre-charging voltage corresponding to the image data, an operational amplifier for outputting the driving voltage corresponding to the inputted gradation voltage to the source electrode, a pre-charging switch interconnected between the operational amplifier and second decoder, and a controller for controlling the pre-charging switch. The connection between the first decoder and operational amplifier is always kept during the whole sampling period including a pre-charging period, and the controller controls the pre-charging switch to be turned on during the pre-charging period and turned off after the pre-charging period has expired.

Abstract: A shift register circuit includes plural stages of shift registers. Each stage of shift register includes a pull-up circuit, a control signal generator and a voltage-stabilizing circuit. The pull-up circuit is used for charging a first node. The control signal generator is electrically connected with the first node. According to a voltage level of the first node, a corresponding control signal is outputted from an output terminal of the control signal generator. The voltage-stabilizing circuit is electrically connected with the output terminal of the control signal generator for stabilizing the control signal from the control signal generator. Some circuits of some other shift registers are controlled according to the control signal.

Abstract: A gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.