Abstract: A full-color scanning array uses CMOS active pixel cells, or photogates, as photosensors. A set of photogates, each photogate being specifically filtered for one primary color, is associated with a common node. A clearing gate downstream of the common node applies a relatively high potential to a selected photogate, for the purpose of clearing any charge from the photogate. In this way, the integration time for the photogate can be started at a precise time, and the effective exposure time of each photogate can thereby be precisely controlled. Alternately, one of the set of photogates can be repeatedly cleared without a signal being read therefrom, allowing the array to operate in a monochrome mode.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Abstract: In a photoelectric conversion device for reading signals in succession from plural photoelectric converting elements (S11-S33), arranged two-dimensionally on a substrate, by successively scanning drive lines (g1-g3) in the X-direction thereby transferring signals charges along signal lines in the Y-direction, for reading the signals of the photoelectric converting elements in a partial area, only the arbitrarily selected drive lines for the plural photoelectric converting elements are scanned in succession while the remaining drive lines are not driven or are driven simultaneously for transferring the charges at a timing different from the timing of drive of the arbitrarily selected drive lines.

Abstract: A read out circuit for an active pixel sensor array is provided. The read out circuit includes a first circuit, coupled to a pixel of the array, to receive from the pixel information indicative of an intensity of light detected by the pixel and to drive the information to a read out device when the pixel is accessed. The read out circuit further includes a second circuit, coupled to the first circuit, to reset the read out device prior to access to the pixel.

Abstract: A CMOS imager includes a photosensitive device such as a photosensitive device such as a photodiode or photogate having a sense node coupled to an FET located adjacent to the photosensitive region. Another FET, forming a differential input pair of an operational amplifier is located outside of the array of pixels. The operational amplifier is configured for unity gain and a row or column of input FETs is connected in parallel. A correlated double sampler is connected to the output of the operational amplifier for providing a fixed pattern noise free signal.

Abstract: A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein. Linearization of output response is provided.

Abstract: A focal plane array comprising two-dimensionally arranged photodetectors, charge transfer devices, transfer gates and a pixel row selection circuit, the focal plane array being operated in such a manner that the signal charges are read out from the photodetectors to vertical charge transfer device in one horizontal retrace period and the signal charges stored in the vertical charge transfer device are transferred to outside of a photodetector array region, wherein the pixel row selection circuit comprises a shift register and a switching transistor connected between the shift register and the transfer gates; and by combination of driving the shift resister and driving the switching transistor the horizontal line is selected so that a photodetector from which signal charge is to be read out is selected.

Abstract: A charged coupled device is disclosed including an asymmetrical split with independent control over the regions on opposite sides of the split. The charge coupled device is configurable for use in multiline or kinetic spectroscopy, and includes two separate horizontal registers with optional charge dump regions for improving efficiency.

Abstract: The dynamic range of an imaging system that utilizes an array of active pixel sensor cells is substantially increased by reading each cell in the array multiple times during each integration period. Each time a cell is read, the number of photons collected by the cell is saved and the cell is reset if the cell would normally saturate by the end of the integration period. At the end of the integration period, the number of photons collected by each cell is defined by the sum of the values collected during the integration period.

Abstract: A a color linear image sensor which has: a semiconductor substrate on which the color linear image sensor is formed; three lines of photocells provided on the semiconductor substrate; signal charge transfer units disposed adjacent to the respective photocells; and signal charge reading units through which a signal charge in each of the photocells is read out into the signal charge transfer units adjacent to the each of the photocells; wherein the signal charge transfer units which are formed as single-line CCD registers, respectively corresponding to both side photocells of the three lines of photocells are located not to exist between the photocells, and the signal charge transfer units which are formed as CCD registers corresponding to a central photocell of the three lines of photocells are located on both sides of the central photocell.

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: A photosensor formed on an insulating substrate has a transparent top gate electrode arranged on the upper side of a semiconductor layer for photoelectric conversion and a bottom gate electrode arranged on the lower side of the semiconductor layer. If light is applied from the top gate electrode side in a state in which a bottom gate voltage V.sub.BG =+20 V is applied to the bottom gate electrode and a top gate voltage V.sub.TG =-20 V is applied to the top gate electrode, electron-hole pairs are generated in the semiconductor layer and only the holes are held in the semiconductor layer by the effect of the top gate voltage V.sub.TG =-20 V. Therefore, an n-channel is formed in the semiconductor layer and a drain current I.sub.DS flows. It was confirmed that the drain current I.sub.DS will not flow even if illumination light is applied when the bottom gate voltage V.sub.BG is set at 0 V. Therefore, the selection or non-selection state of the photosensor can be controlled by the bottom gate voltage V.sub.TG.

Abstract: In an arrangement of light-sensitive or X-ray sensitive sensors (S.sub.1,1, . . . , S.sub.2048,2048) arranged in a matrix in rows and columns, which sensors produce charge states in dependence upon the amount of incident radiation and each have an electrical switch, for each sensor row a switching line (33.sub.1, . . . , 33.sub.2048) via which the switches (3) can be activated so that the charge states of the sensors of the activated sensor row are read or reset simultaneously via associated read lines (8, 9, 10), there is provided a reset device (30a, 30b) for resetting the charge states of previously read sensor rows, which device activates at least one of the previously read sensor rows, which activates another of the previously read sensor rows after a predetermined number of clock pulses of a reset clock signal (T.sub.32), and which deactivates each activated sensor row a predetermined number of clock pulses after its activation.

Abstract: A photosensitive apparatus comprising a plurality of sets of photodiodes and a plurality of amplifiers, each amplifier being operatively connected to one set of photodiodes. A transfer circuit is associated with each photodiode for loading a charge from the photodiode to a storage node associated therewith. Readout means sequentially unload charges from each storage node in the set of transfer circuits through the amplifier, so that multiple photodiodes may operate through a single amplifier.

Abstract: In the method of driving a solid-state image sensing device, for each vertical blanking (VBL), the signal charges of a first pixel group composed of photosensitive pixels of odd ordinal numbers counted in the vertical direction of the photosensitive region and the signal charges of a second pixel group composed of photosensitive pixels of even ordinal numbers counted in the same way are reversed in the vertical transfer direction, so that the signal charges of the first and second pixel groups can be outputted from the same charge detecting circuit for each field. Further, unnecessary accumulated charges in the pixel groups in the photosensitive region are cleared off in response to an accumulated charge clear pulse.

Abstract: A method and a circuit are disclosed for a low-noise processing of weak optical signals using normal photodiodes and a CCD-array. A shift register and collecting register effect the synchronous phase-correct accumulation over for example 100 periods and so transmit a signal amplified by this factor to a downstream circuit at a clock frequency reduced by the same factor. The invention is applicable for conducting optoelectronic run-time distance measurements.

Abstract: A photosensor formed on an insulating substrate has a transparent top gate electrode arranged on the upper side of a semiconductor layer for photoelectric conversion and a bottom gate electrode arranged on the lower side of the semiconductor layer. If light is applied from the top gate electrode side in a state in which a bottom gate voltage V.sub.BG =+20 V is applied to the bottom gate electrode and a top gate voltage V.sub.TG =-20 V is applied to the top gate electrode, electron-hole pairs are generated in the semiconductor layer and only the holes are held in the semiconductor layer by the effect of the top gate voltage V.sub.TG =-20 V. Therefore, an n-channel is formed in the semiconductor layer and a drain current I.sub.DS flows. It was confirmed that the drain current I.sub.DS will not flow even if illumination light is applied when the bottom gate voltage V.sub.BG is set at 0 V. Therefore, the selection or non-selection state of the photosensor can be controlled by the bottom gate voltage V.sub.TG.

Abstract: A frame interline transfer CCD imager is so adapted that signal charges from the photosensor are read into a vertical transfer unit and are transferred at a high transfer rate from the vertical transfer unit to a storage section. The charges from each photosensor are drained during the high transfer rate transfer so that the photosensors are unable to store the signal charges to prevent the occurrence of blooming.

Abstract: A solid state imaging device includes an image sensor having a two-dimensional matrix of picture elements. A first vertical scanning circuit provides a first vertical scanning signal, while a second vertical scanning circuit provides second and third vertical scanning signals. A switching circuit is coupled with horizonal lines of picture elements in the image sensor on one vertical side of the two-dimensional matrix and serves to switch either the first vertical scanning signal from the first vertical scanning circuit to the horizontal lines of picture elements, or in the alternative, the second and third vertical scanning signals from the second vertical scanning circuit thereto. When selected by the switching circuit, the first vertical scanning signal reads the picture elements in a respective horizontal line and a horizontal scanning circuit scans the picture elements in the selected horizontal line to read image signals from these picture elements.

Abstract: A high speed imaging apparatus comprises an imaging sensor composed of a multiplicity of photoelectric converting elements which are two-dimensionally arrayed, the imaging sensor being sectioned into a plurality of blocks by effecting predetermined splitting in a vertical row direction and in a horizontal column direction and the blocks including photoelectric converting element groups, vertical and horizontal scanning circuit capable of parallel-reading of the photoelectric converting element groups of the respective blocks in vertical and horizontal direction, and a drive circuit for driving the vertical and horizontal scanning circuit so as to sequentially selecting one or plurality of the blocks within said imaging sensor which are then read and scanned.

Abstract: The present invention is directed to a solid state image sensor in which one horizontal line from an image sensor section is selected as a line in which a signal is read out from a pixel, a signal is read out to a vertical signal line by a vertical scanning in which selected horizontal lines are sequentially switched, and pixel the signal of the horizontal line, processed in a correlation double sampling fashion, is read out to a horizontal signal line in a constant order. This solid state image sensor has an electronic shutter function includes an electronic shutter scanning means for resetting a horizontal line spaced apart from a horizontal line currently read out by a shutter time in the vertical scanning direction.

Abstract: A CCD linear sensor. A photosensor row has photosensitive regions. Read-out gate electrodes and shift registers are formed on opposite sides of the photosensor row. A channel separating region is formed along the center of the photosensor row for separating each of the photosensitive region into two photosensitive portions. Charges accumulated in the photosensitive portions are read-out dividedly in both directions through the read-out gate electrodes to the shift registers. In the CCD linear sensor, the length of charge transfer path is reduced, therefore, charge reading-out time can be reduced.

Abstract: The present invention relates to an automatic focusing apparatus for positioning a lens at the optimum focus position. The apparatus includes an image pick up element which can be accessed at any desired line, thus allowing only a predetermined portion of an image pickup plane to be read scanned. This enables plural AF scan operations to be performed at high-speed.

Abstract: A matrix array image sensor integrated circuit chip is provided including horizontal and vertical scanning means with the sensor cells within columns of the array being associated with an analogue charge sense amplifier. The analogue charge sense amplifier includes a first amplifier in the form of an inverting charge integrator which provides a preliminary detection of the charge accumulated in the sensing cell by integrating the charge to produce a voltage which is capacitively stored in a voltage storage means. The sensing cell may then be reset by control logic while it is isolated from the stored voltage which is in turn selectively sampled using a switch to read out through a second amplifier stage to be provided as an output from the integrated circuit chip. A method for operation of the device in processing an image read cycle is also provided.

Abstract: A charge transfer device includes a first input stage converting a first input signal into first signal charge, a first shift register transferring the first signal charge with a first delay amount, a second input stage converting a second input signal into second signal charge and having a first switch for selectively inputting the second signal charge to a second shift register, a third input stage converting a third input signal into third signal charge and having a second switch for selectively inputting the third signal charge to a third shift register, and an adding section for selectively adding one of the second and third signal charge to the first signal charge. The second shift register transfers the second signal charge with a second delay amount and the third shift register transfers the third signal charge with a third delay amount.

Abstract: The present invention relates to a recording/reproducing apparatus which records an effective transmit information signal on a recording medium in a high-efficiency coded form and decodes the high-efficiency coded signal read from the recording medium to recover the original information signal. At the time of recording or dubbing of the recovered information signal on another recording medium, the information signal, a control signal indicating whether or not the information signal has been subjected to high-efficiency coding and decoding processes and a specific signal indicating a specific value used in the high-efficiency coding and decoding processes when the information signal has been subjected to the high-efficiency coding and decoding processes are transmitted, thereby preventing the deterioration of data due to the high-efficiency coding.