Abstract: A signal processing method for an analogue picture signal is proposed. In this case, the analogue picture signal originates from a computing unit (10) in which the signal was generated digitally in accordance with a graphics standard such as, for example, EGA or VGA and was subsequently converted into analogue form. The method consists in subjecting the analogue picture signal to analogue/digital conversion at a first chosen sampling frequency, after which the sampled picture is then investigated for picture disturbances, in order to determine a corrected sampling frequency. Further measures relate to the determination of the optimum sampling phase and the determination of the exact position of the active picture relative to the horizontal and/or vertical synchronization pulses.

Abstract: A method for preparing an intermediate position delivered analog band pass signals includes the steps of sampling analog/digital conversion, frequency shift, and digital filtering. To advantageously ensure an efficient processing of frequency signals of different transmission norms, certain conditions for the sampling frequency and the utility spectral portion are preferably specified.

Abstract: A method and system for capturing analog video data and previewing still video images of the captured analog video data without converting the analog video data into digital image data. The system takes analog video data and converts the data into raw digitized video data. The raw digitized video data is stored in a memory until the data is selected for previewing. Once selected, the raw digitized video data is reconverted into analog video data that presents a still image of the desired data. The system is also able to discard unnecessary portions of the raw digitized video data and store only necessary portions of the raw digitized video data. Preferably, the video capture, preview, and storage technique is used in video printing. When used in video printing, the raw digitized video data is converted into digital image data using a software decoding process.

Abstract: A VGA to analog video converter is useful e.g. for displaying video and/or graphics data from a computer onto a large screen television or television monitor. The RGB video signals output from the personal computer are first converted to digital form. The analog-to-digital converter which does this is clocked by a clock signal generated by a phase-locked loop using the horizontal synchronizing signal from the personal computer. The digital RGB signals are then converted to a YCbCR format. A flicker filter eliminates the flickering appearing on the TV monitor by operating on the luminance (Y) component. The YCbCr signals are encoded into NTSC or PAL Standard, and output in composite analog video or S-VHS format. A color subcarrier synthesizer generates the color subcarrier signal to generate an accurate subcarrier frequency for the video output signals. An analog-to-digital clock phase adjustment is used to ensure that the input RGB signals are sampled at the proper instant by the analog-to-digital converters.

Abstract: An apparatus for correcting a non-linear characteristic in a display device to keep the number of displayable colors as it is and to unify a picture quality for each product. In the apparatus, a bias voltage to be applied to a digital to analog converter converting a digital image signal into an analog image signal is changed in accordance with a logical value of the digital image signal. Accordingly, the apparatus generates an analog image signal in which the non-linear characteristic in the display device is compensated.

Abstract: A method of forming an aggregation of N>1 band-limited time signals, each with a bandwidth of ≦B, which are present as analog and/or digital sampling values, with a respective sampling frequency of fA>2B, is characterized in that the sampling values of all N time signals are offset in time and superimposed on each other, and are jointly input to a low-pass filter (12) with a bandwidth of B′>B, and that a composite signal is tapped off from the output of the low-pass filter (12). This allows the aggregation to be performed in a considerably shorter calculation time, a number of slow and expensive aggregation elements can possibly be saved, and the damping of the signals during processing can be minimized, as well as the corresponding loss of information.

Abstract: The present invention discloses a device and method for generating an auto gain control signal. When a gain of an input signal is very different from a wanted gain, an increase of an integral value is prevented by repeatedly resetting an integrator. Especially, the device can sensitively respond to a fast moving substance on a channel, by reducing a repeated reset period of the integrator. At the same time, it is possible to minimize reduction of the performance of a receiver due to a residual jitter generated by the shortened period. As a result, the receiver has an improved performance in regard to the gain variations of the whole channels.

Abstract: The present invention overcomes the problem of image detail timing jitters in flat panel display devices by compensating for the phase difference between the dot clock derived by the Horizontal-sync signal and the display data. This is done by providing an apparatus and method for detecting the phase difference between the red, green and blue signal transitions and the dot clock signal that has been regenerated from the Horizontal sync signal. The detected phase difference is then applied, in a feedback fashion, to synchronize the dot clock phase with the signal transitions.

Abstract: A video signal processing apparatus comprising an oscillating unit for outputting a signal of a stable frequency, a counting unit for counting the period of a cycle of a signal supplied from the outside based on the signal output by the oscillating unit, a clock number calculating unit for calculating the number of clocks in a line based on a result of counting by the counting unit, a comparing unit for comparing the number of clocks calculated by the clock number calculating unit with a threshold to decide which is larger, a switching unit for deciding the number of clocks in the next operation by switching to the number of clocks calculated by the clock number calculating unit if the calculated number of clocks is larger than the threshold, or deciding the number of clocks in the next operation by holding the number of clocks in a line in the current operation as it is, and a synchronizing signal generating unit for, based on the number of clocks in operation decided by the switching unit and the signal out

Abstract: A video signal capturing apparatus has a converter unit that converts an input video signal into digital video data and a digital video data writing control unit that controls writing of the digital video data converted by the converter unit in a memory. Thereby, digital video data for an external processing apparatus that uses the digital video data stored in the memory is captured. A separator unit separates a horizontal synchronizing signal from the input video signal. Based on the horizontal synchronizing signal thereby separated, a writing instructing unit instructs that the portion of the digital video data corresponding to an image information transmission be written in the memory. Thereby storage of unnecessary data is avoided in contrast with an apparatus that captures all the data including synchronizing signals.

Abstract: A video decoder circuit is provided with automatic AGC bias voltage calibration. The video decoder circuit has an input for receiving a video signal that is capacitively coupled to an analog front-end circuit. The decoder circuit includes a microprocessor-based control circuit coupled to the analog front-end circuit. The control circuit includes a bias circuit, a gain interface circuit for changing the amplitude of the video signal prior to filtering in a filter circuit, an offset circuit for changing the DC-level shift of the video signal, and a switching circuit for switching into a calibration mode by bypassing the filter circuit and connecting the gain interface circuit directly to an analog-to-digital conversion circuit of the analog front-end circuit.

Abstract: An apparatus for processing television signal including an A/D converter which converts a television signal (a luminance signal) into a digital television signal. A sampling circuit samples television signal data outputted from the A/D converter in response to a sampling clock outputted from a VCO included in a PLL, and outputs sampled data. An output of the A/D converter is also applied to a band elimination filter which outputs luminance signal data that a chrominance signal component is completely eliminated. The sampled data and the luminance signal data are compared with each other by a comparator, and an output of the comparator is applied to a low-pass filter included in the PLL during a burst period. An output of the low-pass filter becomes a control voltage signal for the VCO, whereby an oscillation frequency (phase) of the VCO is controlled.

Abstract: A digital AGC circuit is provided which includes an A/D converter, an AGC gate pulse generator and a TOP voltage controller. The A/D converter converts a video signal clamped to a reference level into digital data having a voltage between a predetermined reference voltage and a TOP voltage. The AGC gate pulse generator generates an AGC gate pulse for detecting a pedestal level region of the video signal, according to vertical and horizontal synchronous signals. The TOP voltage controller controls the TOP voltage of the A/D converter on the basis of a sample value extracted from the output of the A/D converter and a sync tip value of a standard signal, while the AGC gate pulse generated by the AGC gate pulse generator is enabled. All circuits but the low pass filter are digital circuits, so a special analog AGC IC is not needed. AGC is performed by controlling the TOP voltage of the A/D converter, thereby accomplishing an accurate AGC.

Abstract: This specification discloses a novel multi-tone display matrix display device.

Abstract: An analog/digital color video apparatus for adjusting attributes of a color image contained in an analog video signal and a digital video signal and visually displaying an attribute-adjusted color image on a display is provided. When an attribute of an analog video signal having a relatively lower definition is adjusted, the analog/digital color video apparatus converts the analog video signal into a digital signal and adjusts the attribute of the digitized video signal. When an attribute of the digital video signal having a relatively higher definition is adjusted, an attribute of a color image contained in the digital video signal is adjusted without a supplementary signal conversion process such as A/D conversion and D/A conversion. Thus, the analog/digital TV prevents quantization noise which can be occurred in the process of adjusting attributes of the color image.

Abstract: An image display device is arranged to convert analog video signals into digital video signals and display the corresponding image to the digital video signals. The image display device provides a variable delaying circuit for delaying an analog video signal of each color or a clock variable delay circuit for delaying a dot clock for generating each color dot clock and supplying each color dot clock as a conversion timing signal of an analog-to-digital converting circuit of the corresponding color. This kind of delay circuit is served to adjust a phase of the analog video signal or the dot clock of each color, thereby suppressing color blur even if the analog video signal contains skews among the colors.

Abstract: In a digital image processing device such as a portable digital camera, an analog decimation circuit is provided as a front end for the digital video imaging circuit so that the data rate is reduced without substantial loss in fidelity so that the power dissipation is minimized. In a decimation circuit, the data rate is reduced by reducing only higher frequency spectral components of a captured image without substantial loss in fidelity of the remaining spectral components of the captured image. The required amount of digital data processing is so substantially reduced that considerable power savings result. A mixture of decimation modes may be effected using the same circuit.

Abstract: A video signal sampling circuit searches the optimum sampling frequency and phase of the sampling clock signal by detecting level changing points in the sampled video signal in the horizontal direction with the sampling frequency varied every predetermined phase. The saturated maximum count of the level changing point provides the optimum sampling frequency and optimum phase of the sampling clock signal. The video signal sampling circuit automatically sets the optimum sampling frequency and phase of the sampling clock signal in accordance with the result of searching. The video display including the video signal sampling circuit is also disclosed.

Abstract: This invention is a method and apparatus for synchronization high quality video like signals. The preferred embodiment is described to synchronize a plurality of mutually unsynchronized video signals as well as passing one or more associated secondary signal with each video signal with a corresponding delay. The selection of one of a plurality of reference signal candidates is shown along with the use of the input signal to provide a fixed delay.

Abstract: A method for the analog/digital conversion and an arrangement for the analog-to-digital conversion of an analog signal, particularly a picture signal, into a digital signal by at least two analog-to-digital converters which are clocked by at least two phase-shifted clock signals and whose output signals are combined to a digital picture signal by a multiplexer is disclosed. In order to achieve an individual adaptation to different characteristics of the analog-to-digital converters, each analog-to-digital converter is preceded by an automatic gain control circuit and a clamping stage, which clamps the picture signal at a given amplitude value, the analog signal being applied to the automatic gain control circuit and the clamping stage.

Abstract: An MPU changes the phase of a sampling clock signal by one step for each frame until the change in the phase reaches 360 degrees. An image quality detector portion sequentially receives a digital image signal to detect a maximum one of data about the absolute value of a difference between adjacent pixels in one frame as an image quality judgement data signal. The MPU detects a maximum one of all image quality judgement data to determine a phase at that time as an optimum phase of the sampling clock signal. The MPU then periodically checks image quality on a screen, and makes a real-time correction to the phase of the sampling clock signal if a temperature drift or the like occurs.

Abstract: A process for correcting the input-output correspondence of an analog-to-digital converter includes calculating the equation of the actual input-output correspondence, for known input values, during programmed conversion suspension periods. A comparison with the ideal conversion line subsequently makes it possible to calculate the necessary offset and gain corrections. The process is applied to the digital conversion of a plurality of component video signals.

Abstract: An advanced low cost adaptive frame grabber is described. Its main area of application is in fingerprint identification and verification systems, but it could successfully be used in other biometric identification systems, such as facial, iris or eye identification and/or verification systems. The invented framegrabber is also very suitable for all applications in other areas, like medical electronics, car electronics etc., where automatic image enhancement and/or transformation from grey scale to line art is required. The adaptive framegrabber automatically estimates the dynamic range of the acquired image and sets up a proper offset and measurement range for a video analog to digital converter (ADC). It could also be operated in two different modes, in one the image is acquired as a full grey scale image, and in the other--as a line art (black and white) image. Full controls over the image size and resolution are provided.

Abstract: An image data signal processor, that includes a clamp circuit for clamping a DC level of an image data signal to a predetermined level to produce a clamped image data signal, an A/D converter for A/D-converting the clamped image data signal into a digital image data signal based on a lower reference voltage and an upper reference voltage, wherein the predetermined level is a minimum level of the A/D converter, and a reference voltage generating section for generating the lower and upper reference voltages from the digital image data signal to send to the A/D converter.

Abstract: A digital median filter is made using a successive approximation A/D converter circuit, which is arranged to produce an output based on majority weighting.

Abstract: An A/D converter samples an analog video signal, having a frequency corresponding to various types of image supply apparatus, and converts the signal into a digital signal. A sampling clock signal supply circuit supplies a sampling clock signal to the A/D converter, and comprises an edge detection circuit for adjusting the phase of the sampling clock signal. The edge detection circuit subjects the video signal and a delayed video signal to subtraction processing to generate edge pulses. A processor selects a sampling clock signal of a desired phase based on edge information determined by these edge pulses. The present device can also adjust a threshold voltage that is input to the comparator, and the phase of the sampling clock signal based on a digital signal, and supply a dedicated video signal for phase adjustment from a personal computer.

Abstract: Signals from sixteen video cameras are selectively captured using three video decoding circuits. Each decoding circuit is selectively connectable to each camera. Each of two A/D converters is selectively connectable to each of the three decoding circuits. Two video field buffers are provided to store, respectively, the digital video signals generated by the two A/D converters.

Abstract: A method for digitizing intermediate frequency (IF) video signals, of acceptable cost, in which the signal from a tuning device is pre-filtered and amplified. This pre-processed signal is fed to a sample and hold circuit whose bandwidth covers the range up to at least the maximum intermediate frequency, and the sampled signals output from the sample and hold circuit are fed to an analog-to-digital converter whose dynamic resolution is sufficient only up to about half of the sampling frequency. The invention is applicable to the processing of digital IF video signals.

Abstract: A video decoder is provided wherein digitized samples of an input video signal are produced at a fixed sampling rate and, from such digitized samples, a fixed number of re-sampled digitized samples are produced for each detected sync pulse included in the video signal. The re-sampled digitized samples are stored in a buffer memory and are retrieved from such buffer memory at a rate synchronized to the sync pulse. With such an arrangement, the analog to digital converter operates at a fixed sampling rate, and overflow situations are avoided.

Abstract: To drive a liquid crystal panel without producing flickering or noise on a screen, an adder circuit 26 adds the noise component of the analog signal detected in a filter 24 to a reference voltage from a power supply 16, and a phase adjustment circuit 28 adjusts the phase of the reference voltage to which the noise component was added. A circuit 12 holds the analog signal and outputs it to comparators 14.sub.1 to 14.sub.n. The reference voltage from the circuit 28 is divided in resistors 18.sub.1 to 18.sub.n+1 and output to comparators 14.sub.1 to 14.sub.n as threshold voltages TV.sub.1 to TV.sub.n. The comparator 14 compares the input analog signal to the voltage TV, and outputs a predetermined signal to an encoder 20 if the analog signal is greater than the voltage TV. The encoder 20 converts the signal from the comparator 14 to a digital signal and applies it to the electrode of a liquid crystal panel.

Abstract: In a video frame grabber for digitizing analog video signals which have a pure analog video signal component and a synchronisation signal component, the synchronisation signals are digitized along with the pure analog video signals. Video gain and offset, sync gain, and sync threshold can be adjusted electronically. A variable time delay can be imposed on the sampling clock signals and on horizontal reference signals. Optimal values can be determined for the various parameters.

Abstract: An image reading apparatus such as a color copying apparatus has a plurality of sensing CCD chips for converting an image of an object into an electrical signal, each sensing CCD chip having a plurality of sensing elements. The apparatus also has a circuit for converting the electrical signal into digital data. A first adjusting circuit is provided for conducting either an operation for obtaining level matching of the electrical signal converted by the sensing chips, or an operation for controlling the gain of the electrical signal converted by the sensing chips.

Abstract: The present invention is an image scanner adapted to be used for scanning a color image which includes an image sensor which converts the scanned color image into three analog voltage signals, a clock generator which provides a clock for the image sensor outputting the three analog voltage signals in response to the clock, three amplifying switches electrically connected to the image sensor through three respective independent signal paths and respectively having three disablers thereon for respectively enabling/disabling the amplifying switches by utilizing an impedance thereof in order to respectively amplify the three analog voltage signals and transmit one of the amplified voltage signals therethrough at a time, an analog-to-digital converter electrically connected to the three amplifying switches which respectively converts the three analog voltage signals into digital signals and a data-processing device electrically connected to the analog-to-digital converter which receives and stores the digital sign

Abstract: A high speed image density converting apparatus includes an amplifier for amplifying an analog video signal, an A/D converter for converting an output of the amplifier into a digital video signal, and capable of setting a reference voltage, a memory for storing an output image of the A/D converter, an arithmetic device for calculating a reference signal value on the basis of the data stored in the memory, and a D/A converter for converting the reference signal issued from the arithmetic device into an analog signal to be supplied as reference voltage to the A/D converter.

Abstract: In a video frame grabber for digitizing analog video signals which have a pure analog video signal component and a synchronisation signal component, the synchronisation signals are digitized along with the pure analog video signals. Video gain and offset, sync gain, and sync threshold can be adjusted electronically. A variable time delay can be imposed on the sampling clock signals and on horizontal reference signals. Optimal values can be determined for the various parameters.

Abstract: The disclosure is an analog-to-digital converter of half-flash type providing for the multiplexing of two analog input signals and therefore requiring only one converter module. It includes a coarse comparator block used to determine the most significant bits of the converted signals and also determining the voltage range for two fine comparator blocks that determine the least significant bits of the converted signals, wherein each of the input signals is connected to a fine comparator block and said coarse comparator block compares alternatively the first and second input signals with a reference voltage. The analog-to-digital converter can be advantageously used for processing television signals.

Abstract: An effective video interval detector detects an effective video interval of a digital video signal from an A/D converter, and outputs differential data indicative of the difference between the detected effective video interval and a required video data interval. A video signal supply interval controller produces frequency-dividing ratio control data depending on the differential data supplied thereto and supplies the frequency-dividing ratio control data to a programmable frequency divider to vary its frequency-dividing ratio. An output signal frequency from a voltage-controlled oscillator is now controlled to eliminate the difference between the effective video interval and the required video data interval.

Abstract: A video data display controlling method and system in which an image in each image area or in each partial image area of each image area to be displayed on a display screen and designated by a user is displayed at a display quality differentiated from other areas not designated. A video data display control unit stores display state data of each displayed image in a display state management table. The video data display control unit changes the display specification or attribute of each image so as to display an image having a high user interest degree with a high display quality and display an image having a low user interest with a low display quality, and transfers the changed display specification to a display specification management table of a video data input unit. A video data input unit controls a video data compressing unit to compress digital video data in accordance with the changed display specification or attribute.

Abstract: An adaptive threshold for converting an analog video signal to a binary video signal. This video system employs two identical array sensors. These sensors are operated synchronously and each has its own lens. The lens of the primary array sensor is focused for a sharp image. The analog output of this primary array sensor is the primary video signal. A secondary array sensor is implemented with its lens intentionally set to some degree of defocus. This degree of defocus defines the adaptive threshold function, independent of the primary video. The analog output of this secondary array sensor is the adaptive threshold signal.

Abstract: The apparatus and method describes herein shows a system of digitizing analog or digital electronic or optical signals with very high single bit serial digital data streams which digitizing is suitable to automatically adapt the transmission of multiple types of analog and digital signals. The system is especially well suited for allowing the coupling and transmission of signals.

Abstract: Digital signal receivers for detecting BPSK modulation of a suppressed carrier transmitted through the same channel as an analog television signal are described, in which the detected BPSK is digitized with an oversampling analog-to-digital converter prior to digital comb filtering for separating the BPSK from interfering analog television signal remnants. This is done to get an increased number of bits resolution from a relatively inexpensive flash converter so that the BPSK, which is of relatively low amplitude compared to maximally interfering analog television signal remnants, is not overwhelmed by quantizing noise. The oversampling analog-to-digital converter can be of sigma-delta type.

Abstract: A high frame rate camera includes;a multi-channel sensor array for producing a plurality of parallel analog image signals representative of a sensed image;a plurality of analog-to-digital converters (ADC) for converting each of the parallel analog image signals to parallel digital image signals, wherein each of the ADCs has a fine gain parameter which is a function of a top ladder potential and also has a fine offset parameter which is a function of a bottom ladder potential; anda control for controlling the fine gain and offset parameters of each of the ADCs by means of fine gain and offset control signals which are a function of desired average output black and gray levels of the image signal.

Abstract: A method and apparatus for interfacing digital and analog consumer electronic devices with digital and analog broadcast signals. The broadcast signals are received by electronic devices which tune the signals and provide them to set back boxes. The set back boxes process the signals and provide a plurality of signals to a plurality of electronic devices. Analog devices are provided with composite video signals, luminance video signals, chrominance video signals, and at least one audio signal while digital devices are provided with a digital video and audio signal. The processing performed by the set back boxes includes signal descrambling and decryption for analog and digital signals, error correction for digital signals, and intermediate frequency signal processing for analog signals. In addition, to interface digital signals, including high definition television (HDTV) signals, with analog electronic devices, the set back box decompresses the digital signal and converts it to an analog signal.

Abstract: The nonlinear, deflection waveform used improve registration in a three picture tube projection television system is produced using interpolation of stored data setting points by first performing a reduced number of high-order interpolation calculations using the setting points and then performing low-order interpolation calculations either between two calculated high-order interpolated data points or between one of the calculated high-order interpolated data points and one of the setting points. This results in reducing the work load on the central processing unit in the registration system. In addition, a reduced bit-size requirement for the interpolation portion of the registration is obtained by storing registration data of a first bit size and then adding bits below the original LSB for the interpolation calculation prior to performing the digital to analog conversion.

Abstract: An image processing apparatus includes an analog image signal clamp and an A/D converter that converts the analog image signal into an m bit digital signal. The clamp is controlled in accordance with an n+1 (m>n) bit digital image signal converted by the A/D converter and an n bit digital image signal portion of the m bit digital image signal is processed.

Abstract: In a DAC-output circuit of a TV set, an output judging part lowers a multiplying factor of sub-data as user data come close to zero, to converge the output onto zero in accordance with the turning down of the user data.

Abstract: A high resolution digital phase detector adapted to receive a threshold value and a sequence of digital samples of a substantially linear portion of an analog video signal. A first output signal is provided when a digital sample is detected as having crossed the threshold value. An interpolation is done between the value of the digital sample to first cross the threshold value and the immediately preceding digital sample on the opposite side of the threshold value. In such manner, the time of the crossing within the sample interval is resolved to a subpixel level. A second output signal represents a fractional phase error between the actual crossing and a desired crossing point within the sample interval. The first and second signals are added in a phase locked loop to adjust the output of a voltage controlled oscillator to be synchronized to the incoming analog video signal in both integer and subpixel phase.

Abstract: Digital data having a symbol rate that is a multiple of horizontal scan rate are buried in broadcast television signals. In a digital signal receiver the data are separated from composite video signal by quadrature video detection followed by comb filtering. The comb filtering is most economically realized by digital sampling at symbol rates. The regeneration of clocking signals at symbol rate, and at multiples of symbol rate where oversampling analog-to-digital conversion (ADC) techniques are employed, is done using a controlled oscillator with automatic frequency and phase control (AFPC) responding to the horizontal synchronizing pulses transmitted in the broadcast television signals. The horizontal synchronizing pulses are usually much larger than noise, so the controlled oscillator frequency and phase is rapidly adjusted following energization or channel change of the digital signal receiver.

Abstract: An image signal inputting and outputting apparatus has a memory device for temporarily storing image signals. In addition, the image signal inputting and outputting apparatus includes an A/D converter for converting analog image signals to digital image signals. The apparatus further includes a memory controller for writing the digital image signals into the memory device and reading out the image signals written in the memory device, and a controller for enabling the A/D converter to hold blanking level data converted by the A/D converter after the A/D converter converts effective signals of the image signals.

Abstract: An image signal processor for processing a received image signal. The received image signal can be at least one of an analog image signal and a digital image signal. The processor converts the analog image signal into first digital image data and converts the digital image signal to second digital image data. The processor selects at least one of the first and second digital image data as input image data. The input image data is then decode-processed based upon a selected at least one of a plurality of processing programs. The selected at least one processing program corresponds to the selected at least one of the first and second digital image data.