Having Spring Member Patents (Class 361/769)
  • Patent number: 6994570
    Abstract: An interposer includes an array of buttons on a carrier having a proximity to each other that allows contact between two adjacent buttons to occur when at least one of the two adjacent buttons is axially compressed above a predetermined threshold. The chip package includes a chip having a first surface and a second surface, a printed circuit board having a first surface and a second surface, and an interposer having an array of buttons between the chip and the printed circuit board. The first surfaces are closer to each other than the second surfaces.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: February 7, 2006
    Assignee: International Business Machines Corporation
    Inventor: Young Hoon Kwark
  • Patent number: 6975518
    Abstract: An electronic assembly includes one or more conductive clamps (302, 304, FIG. 3), which are used to supply current to an integrated circuit (IC) package (308). The conductive clamps are attached to a printed circuit (PC) board (312), which supplies the current to the IC package over one clamp, and receives returned current from the IC package over another clamp. Each clamp contacts a contact pad (330) on the surface of the PC board, and contacts another contact pad (334) on the top surface of the IC package. Vias (338, 339) and conductive planes (340, 342) within the package then carry current to and from an IC (e.g., IC 306) connected to the package. In another embodiment, the clamp (904, FIG. 9) holds a conductive structure (902) in place between the PC board contact pad (908) and the IC package contact pad (914), and current is carried primarily over the conductive structure, rather than over the clamp.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: Kristopher Frutschy, Glenn E. Stewart, Farzaneh Yahyaei-Moayyed, Geoffrey L. Reid
  • Patent number: 6967848
    Abstract: Adapter for contacting chip cards with a connection of a data processing unit standardized according to a PCMCIA standard, including a plug-in card-like housing which has an insertion slot opening on a front end into a mounting channel for mounting a chip card and a connector panel arranged on an opposite front end, and a printed circuit electrically connected with the connector panel which extends parallel to the mounting channel and which is provided with contact elements for contacting the chip card, where the printed circuit has a length shortened in relation to the mounting channel in the direction of extension of the mounting channel and is provided with an apparatus for positioning the printed circuit and for guiding the chip card in the mounting channel on the front end facing the insertion slot.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: November 22, 2005
    Assignee: STOCKO Contact GmbH & Co. KG
    Inventors: Dieter Klatt, Arnd Bäcker, Walter Breuer
  • Patent number: 6937479
    Abstract: A sensor isolation system including a sensor, a package for the sensor, and a compliant interposer disposed between the sensor and the package and interconnecting the sensor to the package to isolate the sensor from thermal and mechanical stresses and yet at the same time providing a physical interconnect between the sensor and the package.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: August 30, 2005
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Richard S. Anderson, David S. Hanson, Frederick J. Kasparian, Thomas F. Marinis, Joseph W. Soucy
  • Patent number: 6917525
    Abstract: Several embodiments of enhanced integrated circuit probe card and package assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: July 12, 2005
    Assignee: NanoNexus, Inc.
    Inventors: Sammy Mok, Fu Chiung Chong, Frank John Swiatowiec, Syamal Kumar Lahiri, Joseph Michael Haemer
  • Patent number: 6914198
    Abstract: Disclosed is a device comprising a circuit having an active side and a non-active side, a package enclosing the active side of the circuit and not enclosing a portion of the non-active side of the circuit, and a lead having a first end connected to the active side of the circuit via a lead-over-chip connection, and having a second end extending from the package. Also disclosed is a device comprising a circuit and a lead formed from a flexible conductor, with the lead having a first end connected to the circuit.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: July 5, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Warren M. Farnworth, Alan G. Wood, J. Michael Brooks, Eugene H. Cloud
  • Patent number: 6909055
    Abstract: A device comprising a circuit, a lead having a first end connected to the circuit and having a second end, and a deformable structure connected to the second end of the lead. The invention may be embodied on a circuit board, so that the circuit board includes a substrate and a deformable structure connected to said substrate.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: June 21, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Warren M. Farnworth, Alan G. Wood, J. Michael Brooks, Eugene H. Cloud
  • Patent number: 6891730
    Abstract: Miniaturized circuit housing to encapsulate and provide external contacts for at least one integrated circuit, in particular of the flip-chip or wafer-level-package type, with a housing floor, the lower surface of which bears housing contact elements for making external contact and the upper surface of which is electrically connected to circuit contact elements on the lower surface of the circuit, wherein a housing lid is provided, in particular opposite the housing floor, which presses the circuit with the circuit contact element resiliently against the upper surface of the housing floor, and between the circuit contact elements and the housing floor there is no connection that fixes their materials permanently together.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: May 10, 2005
    Assignee: F & K Delvotec Bondtechnik GmbH
    Inventor: Farhad Farassat
  • Patent number: 6821129
    Abstract: The present invention provides a connection device for stabilizing contact between the external connectors (spherical contactors) of electrical parts and spiral contactors. As shown in FIG. 5A, the directions of the windings of adjacent spiral contactors 20 are opposite to each other. Further, as shown in FIG. 5B, when the directions of the windings of adjacent spiral contactors 20 are opposite to each other and the positions of forming the starting ends of the windings of adjacent spiral contactors 20 are formed in a difference of 180° between them, tensile stresses between adjacent spiral contactors 20 can cancel each other out. By doing so, since distortion generated in a substrate on which the spiral contactors 20 are provided can be minimized, contact between the spherical contactors and the spiral contactors 20 can be stabilized.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: November 23, 2004
    Assignee: ALPS Electric Co., Ltd.
    Inventor: Junji Tsuchiya
  • Patent number: 6816386
    Abstract: A compact card connector having reduced width and thickness is provided for receiving an information card whereby the information card has a narrow step-like recess along one of its side edges and a sliding identifier mechanism provided in a concave cut in the step. The card connector includes a frame that receives the information card, and an identifier detecting means for detecting a sliding position of the identifier. The identifier detecting means includes a suitably placed fixed contact member and a movable contact member which are mounted on the frame, with part of the movable contact member forming a projection for detecting the sliding position of the identifier, whereby the projection lies in an area within the housing space through which the step-like recess of the card is to pass. As the information card is inserted into the housing space, the projection touches an upper surface of the step-like recess and/or that of the identifier and works in the concave cut in the step.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: November 9, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventors: Wataru Oguchi, Toru Wagatsuma, Yoshimasa Kuroda
  • Publication number: 20040179343
    Abstract: One embodiment of the present invention is a structure useful for testing circuits that includes: (a) a flexible substrate having contactors on a first side and pads on a second side; (b) a rigid substrate having vias aligned with the pads on the second side of the flexible substrate; (c) an adhesive layer comprised of a compliant adhesive material having vias aligned with the pads on the second side of the flexible substrate; the adhesive layer being affixed to the flexible substrate and the rigid substrate; (d) a card; (e) electrical connectors that are retained in the vias of the rigid substrate and the adhesive layer, which electrical connectors have first and second retractable ends, wherein the first retractable ends contact pads on the substrate, and the second retractable ends contact pads on the card; and (f) a clamp that is adapted to fit over the substrate and the adhesive layer, the clamp having an opening to provide access to the contactors, wherein the clamp is connected to the card.
    Type: Application
    Filed: April 16, 2003
    Publication date: September 16, 2004
    Applicant: Nexcleon, Inc.
    Inventors: Konstantine N. Karavakis, Tom T. Nguyen
  • Patent number: 6790684
    Abstract: A semiconductor device wafer-on-support wafer package comprising a plurality of segmentable chip-scale packages and method of constructing, burning-in, and testing same are disclosed. The wafer-on-wafer package can be burned-in and tested at the wafer level prior to segmenting, or singulating, the wafer-on-wafer package into a plurality of individual chip-scale packages. The device wafer includes a plurality of unsingulated semiconductor dice having a plurality of die bond pads being respectively bonded to a plurality of electrically conductive die bond pad connect elements provided on a first surface of the support wafer.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: September 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 6785148
    Abstract: A socket for mounting a processor and/or a board has a substrate with a built in socket. The socket has conductive, elastically deformable terminals. The socket may be mounted to a processor and a board without using conventional surface mount technology, instead providing a mechanical contact mechanism between the socket and the board or processor. An adhesive layer may also be used to connect the socket to a processor and/or a board.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Kenzo Ishida, Shuji Inoue, Kinya Ichikawa, Kenji Takahashi
  • Patent number: 6765803
    Abstract: A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: July 20, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Larry D. Kinsman, Walter L. Moden
  • Patent number: 6703640
    Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element. The spring element also includes conductive material to increase the thermal and electrical conductivity of the spring element.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: March 9, 2004
    Assignee: Micron Technology, Inc.
    Inventors: David R. Hembree, Salman Akram, Derek Gochnour
  • Publication number: 20040022039
    Abstract: In one embodiment, a contactor (200) is provided. The contactor (200) comprises a device side (210), a test circuit board side (155), and a thickness (110). The device side (210) is in communication with at least three electrical contact points (140, 141, 142) of the device (170). The test circuit board side (155) includes a fourth electrical contact point (193) in electrical communication with the circuit board (150). The contactor (200) also includes a first electrical pathway (220) between the first electrical contact point (140) and the second electrical contact point (142). The first electrical pathway (220) bypasses the circuit board (150). The contactor (200) further includes a second electrical pathway (270) between the third electrical contact point (142) and the fourth electrical contact point (193).
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Inventors: Alfred E. Ortiz, Joseph Collins
  • Patent number: 6674650
    Abstract: A card retention assembly for retaining one or more expansion cards within the chassis of an electronic device such as a computer system, server, photocopier, facsimile machine, printer, or the like includes a card retention assembly that engages the mounting bracket securing tab of an expansion card received in the chassis. In this manner, the card retention assembly at least partially restrains the tab for securing the expansion card in the chassis.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: January 6, 2004
    Assignee: Gateway, Inc.
    Inventors: David R. Davis, Paul Hooper, Jorge A. Moriel, John J. Daly, Allan L. Klink, Dirk Cosner
  • Patent number: 6618261
    Abstract: A sensor mount assembly including a housing, fastener and a lever mechanism. The housing contains a sensor having two electrical leads and includes an integral flange adapted to receive a fastener. The fastener includes a body and a head. The body is received in the flange to secure the housing to a mount. The lever mechanism is proximate the flange and includes a contact block and a conductor. The contact block is acted upon by the fastener head to move the lever mechanism and, hence the conductor, between a first position and a second position. The first position corresponds to an unmounted sensor and creates a short circuit condition between the two electrical leads. The second position corresponds to a properly mounted sensor and creates an open circuit between the two electrical leads such that the electrical circuit path of the overall system includes the sensor within the housing.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: September 9, 2003
    Assignee: Ford Global Technologies, LLC
    Inventors: Scott Howard Gaboury, Steven Yellin Schondorf, David James Tippy, Paul Kevin Kula, Rene A. Najor, Janak Chitalia
  • Patent number: 6617522
    Abstract: A connector, and an associated method, for connecting an electrical circuit component to a substrate, such as a printed circuit board. The connector is formed of one of more pin members formed of an electrically-conductive material which exhibits physical-memory characteristics. The pin member is initially configured into a memory configuration and thereafter reconfigured into an alternate reconfiguration. The alternate configuration is selected to facilitate mounting of the circuit component upon the substrate. Thereafter, the pin member is heated to beyond a deformation threshold temperature. When at such temperature, the pin member becomes reconfigured into the memory configuration. Through appropriate selection of the memory configuration, heating of the pin member causes connection of the circuit component with the substrate.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: September 9, 2003
    Assignee: Nokia Corporation
    Inventor: Cristian Tabacutu
  • Patent number: 6583845
    Abstract: A liquid crystal display having dummy pads that are capable of fortifying a bonding force between a tape carrier package and a liquid crystal panel. In the liquid crystal display, the tape carrier package has first and second dummy pads to which signals are not applied. The first dummy pad has a larger width than the second dummy pad. The liquid crystal panel has third and fourth dummy pads corresponding to the first and second dummy pads, respectively.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: June 24, 2003
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: Nag Su Chung, Ju Sung Cho
  • Patent number: 6574114
    Abstract: A compliant interconnect assembly to electrically connect a first electronic device to a second electronic device comprises a contact set including an electrically insulating flexible film having at least one conductive contact suspended therein. The interconnect assembly also includes a compressible interposer as an electrically insulating elastomer sheet matrix for at least one electrically conducting elastic column to provide a localized conductive path through the thickness of the elastomer sheet. The electrically conducting elastic column comprises a central pillar of conductive spheroidal particles having a first average particle size. The central pillar has a first end opposite a second end. At least the first end has a particulate cap bonded to it including particles having a second average particle size that is less than the first average particle size.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: June 3, 2003
    Assignee: 3M Innovative Properties Company
    Inventors: Steven R. Brindle, Frank E. Bumb, Jr., John S. Burg, Kwang-Ho Chu, Alexander R. Mathews, Ronald K. Revell
  • Patent number: 6549418
    Abstract: An integrated circuit device module comprises a printed circuit board having opposed sides, the printed circuit board comprising a portion carrying an area contact array on one of the sides of the printed circuit board. The module comprises an integrated circuit device having opposed, top and bottom surfaces, the bottom surface of the integrated circuit device comprising an area contact array for electrical communication with the area contact array on the printed circuit board.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: April 15, 2003
    Assignee: Hewlett Packard Development Company, L.P.
    Inventor: Jeffrey L. Deeney
  • Patent number: 6545226
    Abstract: The details of a printed wiring board (PWB) sub-assembly and the method of producing the same are described. The sub-assembly comprises a printed circuit board electrically joined through a plurality of connections to one or more area array devices, such as modules or printed wiring boards. The sub-assembly can serve as a part of an original assembly. The sub-assembly can function as an after market item that can be readily substituted as a replacement for a failed component wherein the dimensional space between the printed circuit board and one or both of the area array devices must provide sufficient clearance for surface mounted devices.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: April 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: William Louis Brodsky, Benson Chan, Michael Anthony Gaynes, Voya Rista Markovich
  • Patent number: 6538214
    Abstract: An interposer includes a substrate having opposing surfaces. Conductive terminals are disposed on both surfaces, and conductive terminals on one surface are electrically connected to conductive terminals on the opposing surface. Elongate, springable, conducive interconnect elements are fixed to conductive terminals on both surfaces.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: March 25, 2003
    Assignee: FormFactor, Inc.
    Inventor: Igor Y. Khandros
  • Patent number: 6535395
    Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble the converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: March 18, 2003
    Assignee: Intel Corporation
    Inventors: Joe A. Harrison, Edward R. Stanford, Thomas G. Ruttan
  • Patent number: 6512679
    Abstract: The present invention relates to a variable insertion force circuit pack latching system comprising a latch assembly mounted on the front of a circuit pack and adapted to couple to a trough block mounted on a bay frame. The trough block has a hook-shaped tongue adapted to conversely couple to the latch assembly to secure the circuit pack in the installed position.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: January 28, 2003
    Assignee: Nortel Networks Limited
    Inventors: Simon Shearman, Richard J. Glover, Youssef Nakhoul
  • Publication number: 20020196614
    Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
    Type: Application
    Filed: July 23, 2002
    Publication date: December 26, 2002
    Applicant: INCEP Technologies, Inc.
    Inventors: Joseph T. DiBene, David H. Hartke, James J. Hjerpe Kaskade, Carl E. Hoge
  • Patent number: 6462954
    Abstract: A connector of a modular machine board disposed on an inner edge of a back board of a display apparatus of an electronic device contacts with joint points of the electronic device, such that metal resilient pieces of said connector are assured to tightly contact with said joint points by means of the resilience of resilient component. As a result, even under vibration, the resilient component can regulate the up-and-down position of said connector along with vibration force to enable the metal resilient pieces to maintain a tight contact at the joint points of the electronic device.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: October 8, 2002
    Assignee: Inventec Corporation
    Inventors: Ping-Huang Kuo, Sung-Ming Song
  • Patent number: 6442044
    Abstract: A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: August 27, 2002
    Assignee: MicronTechnology, Inc.
    Inventors: Warren M. Farnworth, Larry D. Kinsman, Walter L. Moden
  • Patent number: 6404646
    Abstract: A PC board support is disclosed to include a hollow support shell adapted to support a PC board above a frame, a spring mounted inside the support shell, the support shell having a top opening, a top neck, and a retainer head at the top of the top neck, and a slide supported on the spring inside the support shell and moved along a vertical sliding groove at the retainer head and top neck of the support shell in and out of the top opening to unlock/lock the PC board.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: June 11, 2002
    Assignee: Enlight Corporation
    Inventors: Hsiang-Hsiang Tsai, Chao-Kun Chan
  • Patent number: 6392899
    Abstract: A system for delivering power to a processor enables a DC-to-DC converter substrate to be secured to the processor carrier in the Z-axis direction. The ability to assemble converter to the processor in this way facilitates assembly compared to systems in which the converter is plugged in to the processor carrier in the direction substantially parallel to the surface of the motherboard.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: May 21, 2002
    Assignee: Intel Corporation
    Inventors: Joe A. Harrison, Bram Leader
  • Patent number: 6388885
    Abstract: A user-friendly controller provides a special dynamic interconnect which reliably connects terminals of electronic device, such as solenoids, to a circuit board to enhance vehicle performance and help obtain a smoother more comfortable ride. The special interconnect comprises a coil spring contact. The coiled spring contact can have an enlarged head which can be soldered to a contact on the circuit board. The central portion of the spring contact provides a terminal-receiving opening to slidably receive the terminal of the electronic device. The smaller end portion of the spring contact can compressively engage and dynamically contact the terminal of the electronic device. A cover can be provided to environmentally protect and cover the circuitry and circuit board. The cover can have chambers for receiving and engaging the spring contacts.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: May 14, 2002
    Assignee: Motorola, Inc.
    Inventors: Andrew D. Alexander, Heather L. Havlicsek, Kevin C. Loewe, Donald J. Zito
  • Patent number: 6381164
    Abstract: The present invention provides a low profile, high density electronic package for high speed, high performance semiconductors, such as memory devices. It includes a plurality of modules having high speed, impedance-controlled transmission line buses, short interconnections between modules and, optionally, driver line terminators built into one of the modules, for maintaining high electrical performance. Suitable applications include microprocessor data buses and memory buses such as RAMBUS and DDR. The modules may be formed on conventional printed circuit cards with unpacked or packed memory chips attached directly to the memory module. Thermal control structures may be included to maintain the high density modules within a reliable range of operating temperatures.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: April 30, 2002
    Assignee: High Connection Density, Inc.
    Inventors: Zhineng Fan, Ai D. Le, Che-Yu Li
  • Patent number: 6377466
    Abstract: A header containing a semiconductor die, method of manufacture thereof and electronic device employing the same. In one embodiment, the header includes first and second contacts, and an intermediate body. The intermediate body includes an insulated section interposed between the first and second contacts and has a cavity therein. The intermediate body also includes a semiconductor die, located within the cavity, adapted to condition a signal passing through at least a portion of the header.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 23, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Shiaw-Jong Steve Chen, Roger J. Hooey
  • Patent number: 6365975
    Abstract: A semiconductor chip is provided with a dielectric element having conductive features interconnecting electronic elements within the chip with one another. The conductive features replace internal conductors, and can provide enhanced signal propagation between elements of the chip. The conductive features on the dielectric element are connected to contacts on the chip by deformable conductive elements such as flexible leads so that the dielectric element remains movable with respect to the chip. The dielectric element may have a coefficient of expansion different from that of the chip itself.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: April 2, 2002
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith
  • Patent number: 6330164
    Abstract: The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: December 11, 2001
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, David V. Pedersen, Benjamin N. Eldridge, Richard S. Roy, Gaetan Mathieu
  • Publication number: 20010032738
    Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
    Type: Application
    Filed: February 16, 2001
    Publication date: October 25, 2001
    Inventors: Joseph Ted Dibene, David Hartke, Kaskade James Hjerpe, Carl E. Hoge
  • Patent number: 6255722
    Abstract: A semiconductor device package is provided which can accommodate currents larger than those of similarly sized standard device packages such as the “TO-247” package. Higher currents are accommodated by allowing a larger semiconductor die to be mounted on the device's lead frame than can be mounted on a similarly sized standard package. An improved mold clamping area is also provided which reduces the area from which damaging moisture can enter the molded package and increases the distance required for moisture to contact the die. Clip arrangements are also provided to mount the device package to a circuit board or heat sink, thereby allowing the increased operating temperatures associated with the increased operating currents to be efficiently dissipated.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: July 3, 2001
    Assignee: International Rectifier Corp.
    Inventors: Peter R. Ewer, Mark Steers
  • Patent number: 6252175
    Abstract: An electronic assembly comprising an electronic substrate and a plurality of conductive interconnection elements. The substrate has a first side having a plurality of terminals. Each interconnection element has a base secured to a respective one of the terminals, a contact region distant from the electronic substrate, and an elongate freestanding section which can bend when pressure is applied to the contact region.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: June 26, 2001
    Inventor: Igor Y. Khandros
  • Patent number: 6249440
    Abstract: The contact arrangement is a connector block for detachably fastening an electrical component, particularly an integrated circuit having a plurality of terminal contacts disposed in a ball grid array (BGA), in a column grid array (CGA), in a land grid array (LGA) or of the flip-chip type to a printed circuit board. In a support part, a number of contact pins are disposed in a grid in bores. The contact pins project from the bore on the side facing the printed circuit board and are surface-mounted together with contact areas of the printed circuit board. A free end region of each bore is intended for guiding the substantially dome-shaped terminal contacts. Between the end of a contact pin and a terminal contact there is a space bridged for establishing an electrical connection with a contact element, for example an axially compressible coil spring. By means of several holding-down elements disposed peripherally to the integrated circuit, the integrated circuit is pressed down upon the support part.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: June 19, 2001
    Assignee: E-TEC AG
    Inventor: Hugo Affolter
  • Patent number: 6232149
    Abstract: Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: May 15, 2001
    Assignee: FormFactor, Inc.
    Inventors: Thomas H. Dozier, II, Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen, Michael A. Stadt
  • Patent number: 6215670
    Abstract: An electronic assembly. The electronic assembly includes a first substrate which has a first set of contact pads and a second substrate which has a second set of contact pads. A plurality of elongate, springable interconnection elements are located between the first substrate and the second substrate. Each of the plurality of elongate, springable interconnect elements is free standing and has a portion permanently attached to a respective contact pad of the first set of contact pads and has a second portion contacting a respective contact pad of the second set of contact pads. The first and the second substrates are brought into a fixed relationship relative to one another.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: April 10, 2001
    Assignee: FormFactor, Inc.
    Inventor: Igor Y. Khandros
  • Patent number: 6201293
    Abstract: The present invention relates to electro optical devices with a reduced filter thinning on the edge pixels and a method for reducing the thinning of filter layers on the pixels closest to the edge of an electro optical device such as a photosensitive chip, as would be used, for example, in a full-color digital copier or scanner. A semiconductor wafer includes a main surface defining a plurality of chip areas and tab regions separated by grooves, wherein the chip areas include inner photosites, outer photosites and bonding pads. A plurality of dams are deposited over the main surface in the tab regions, and a clear layer is deposited over the main surface exclusive of the bonding pads. Alternatively, a clear layer is deposited over the main surface exclusive of the bonding pads, and a plurality of tabs is then deposited in the tab regions on the main surface.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: March 13, 2001
    Assignee: Xerox Corporation
    Inventors: Brian T. Ormond, Josef E. Jedlicka, Thomas Grimsley, Paul A. Hosier
  • Patent number: 6198636
    Abstract: A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: March 6, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Larry D. Kinsman, Walter L. Moden
  • Patent number: 6156587
    Abstract: First, a CCD package is attached to a plane of a flexible substrate. A reference plane, which is parallel to an image forming plane of a solid state imaging device chip, is formed at the top of the CCD package. The reference plane is brought into contact with a reference plane of an optical unit, and a leaf spring presses the CCD package so that the CCD package can be fixed to the optical unit.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: December 5, 2000
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Yasunobu Kayanuma, Masaaki Orimoto, Takeshi Misawa
  • Patent number: 6128190
    Abstract: An aluminum heat sink bridge (1), mounted overlying a transistor unit (5) on a circuit board (12), has affixed to its underside, along two lateral edges, a pair of resilient plastic or rubber members (4), which, when the bridge is screwed down into place, exert continuous vertical pressure on the collector tab (8) and the base tab (7) keeping them in electrical contact with their underlying electrical contact points on the circuit board (12) while permitting horizontal movement of the tabs due to variations in temperature. One embodiment of the invention has resilient members extending the entire length of the bridge to exert vertical pressure on grounding tabs (9) extending laterally from the ends of the transistor unit.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: October 3, 2000
    Assignee: Telefonaktiebolaget L M Ericsson
    Inventors: Bengt Yngve Hardin, Nils Martin Schoon
  • Patent number: 6088238
    Abstract: A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: July 11, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Larry D. Kinsman, Walter L. Moden
  • Patent number: 6071756
    Abstract: A method for fabricating a printed-circuit board includes the steps of loading components onto the printed circuit board, and placing a pin array over the components. Each pin is free to move "downward," and each component has at least one pin pressing on it to hold the component in place. Each component also preferably has a pin on each side of it, to hold it against lateral movement. The pin support arrangement is dimensioned so that a gap or space exists between the support and the component side of the board. Heat is applied to the gap, and flows through the interstices between the pins to heat the solder on the upper side of the board to fuse the solder and make the desired connections.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: June 6, 2000
    Assignee: Lockheed Martin Corporation
    Inventors: John Colin Sines, David Reed Benedict
  • Patent number: 6049466
    Abstract: There is disclosed herein an electronic circuit assembly, comprising: (1) a plastic molded substrate 10 having a first surface 12 with a mounting pad 14 disposed thereon; (2) a reinforcing member 20 having a first member portion 22 and a second member portion 24, wherein the first portion 22 is embedded within the substrate 10 beneath the first surface 12 thereof proximate the mounting pad 14 and wherein the second portion 24 is oriented generally parallel with and at a first predetermined distance h.sub.1 above the mounting pad 14; (3) an electronic surface mount component 18 having a termination 16 thereon, the component 18 being oriented such that the termination 16 is disposed at a second predetermined distance h.sub.2 above the second member portion 24; and (4) a solder joint 30 connecting the component termination 16 with the mounting pad 14 and the second member portion 24.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: April 11, 2000
    Assignee: Ford Motor Company
    Inventor: Vivek Amir Jairazbhoy
  • Patent number: 6046910
    Abstract: A microelectronic assembly and a method for manufacturing the assembly include an integrated circuit component attached to a substrate via polymeric bodies. The integrated circuit component has bond pads that are bonded to corresponding conductive members. The substrate contains terminals associated with conductive traces. The conductive members rest against the respective terminals to form slidable electrical contacts. The slidable electrical contacts permit the transfer of electrical energy between the integrated circuit component and the conductive traces of the substrate. The polymeric bodies preferably comprise elastomers that are spaced from the conductive members, rather than underfilling the integrated circuit component.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: April 4, 2000
    Assignee: Motorola, Inc.
    Inventors: Sanjar Ghaem, Cindy Melton