Abstract: To provide a technique that can improve the reliability of coupling between a package with a PA module and a mounting board in mounting the package over the mounting board. The width of a back conductor pattern is made smaller than the width of each of back terminals. Specifically, for example, the back terminals are arranged in the X direction. The back terminals arranged in parallel to the X direction are coupled together by the back conductor pattern. At this time, the coupling direction (coupling line direction) of the back conductor pattern is the X direction. Taking into consideration the Y direction orthogonal to (intersecting) the X direction, the width of the back conductor pattern in the Y direction is made smaller than the width of each of the back terminals in the Y direction.

Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.

Abstract: Three-dimensional structure (40) of the present invention includes first module board (28), second module board (37), and substrate joining member (10) that unifies board (28) and board (37) into one body, thereby electrically connecting these two elements together. The unification is done by molding the outer wall of housing (12) of substrate joining member (10) with resin (29). Substrate joining member (10) used in the three-dimensional structure (40) includes multiple lead terminals (14) made of conductive material, and a frame-shaped and insulating housing (12) to which frame the lead terminals (14) are fixed vertically in a predetermined array. Housing (12) includes projections (18) on at least two outer wall faces of its frame shape.

Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second reference layer, and a second signal layer. An integrated circuit mounted on the first signal layer includes a power supply terminal connected to a first power supply via. The second signal layer includes a filter and a power supply wire. The filter includes a power terminal connected to the first power supply via, and a ground terminal connected to the second reference layer. The first power supply via is connected to the first reference layer through the power supply wire and a second power supply via. A void defined in the second reference layer is at least partially vertically overlapping with the power supply wire, and enables the first reference layer to function as a reference plane for the power supply wire, to increase impedance of the power supply wire.

Abstract: A method of manufacturing a multilayer printed circuit board, including providing a substrate, embedding an electronic component having a die pad on a surface of the component into the substrate such that the component has the surface and pad exposed from a surface of the substrate, forming a metallic layer including metallic film layers such that the surface of the substrate and the pad and surface of the component are covered with the metallic layer, providing a resist on the metallic layer such that a portion of the metallic layer on the pad is exposed from the resist, forming a thickening metallic layer on the portion of the metallic layer exposed, removing the resist from the substrate and surface of the component, and etching to remove the metallic layer such that a mediate layer including the portion of the metallic layer is formed between the pad and the thickening layer.

Abstract: An obfuscated radio frequency circuit may include a metallization layer, and a dielectric layer under the metallization layer. The dielectric layer may be made up of a plurality of dielectric substrates having differing dielectric constants to obfuscate functions of the circuit.

Abstract: A printed wiring board and a method for manufacturing the same are provided. The printed wiring board includes a resin insulation layer having a first surface and a second surface opposite the first surface, and includes an opening for a first via conductor. An electronic-component mounting pad is formed on the first surface of the resin insulation layer. The electronic-component mounting pad includes a portion embedded in the resin insulation layer and a portion protruding from the resin insulation layer. The protruding portion covers the embedded portion and a portion of the first surface of the resin insulation layer that surrounds the embedded portion. A first conductive circuit is formed on the second surface of the resin insulation layer. A first via conductor is formed in the opening of the resin insulation layer and connects the electronic-component mounting pad and the first conductive circuit.

Abstract: An electromagnetic bandgap structure and a printed circuit board including it as well as a method of manufacturing thereof that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. The electromagnetic bandgap structure in accordance with an embodiment of the present invention can include: a first metal layer; a first dielectric layer, stacked on the first metal layer; a metal plate, stacked on the first dielectric layer; a second dielectric layer, stacked on the metal plate and the first dielectric layer; a second metal layer, stacked on the second dielectric layer; and a via, directed from the metal plate to the first metal layer and the second metal layer. The via can be connected to the first metal layer and is not connected the second metal layer.

Abstract: A versatile multi-layer electronic part built-in board compatible with different external circuits to be connected thereto is provided. Sensors are connected to a connector through connection lines that are connected to electronic parts. The electronic parts are directly connected to the connector and can be mounted on the top layer, the bottom layer or both the top and bottom layers of the multi-layer electronic part built-in board. When the sensor to be connected, for example, is changed to another having a different characteristic, an electronic part mounted on the top and bottom layers correspondingly to the sensor can be changed.

Abstract: A signal transmission device is installed on a motherboard and is electrically connected to a signal control unit and a display output interface. The signal transmission device includes a signal receiving port, a signal output port, and a printed circuit connecting port. The signal receiving port is used for receiving a signal transmitted from the signal control unit. The signal output port is used for single output of the signal to the display output interface. The printed circuit connecting port is used for transmitting the signal from the signal receiving port to the signal output port. Thus, the signal transmission device may be used for single signal output so as to replace a switch integrated circuit of selective signal output. In such a manner, related circuit redesign and manufacturing cost may be reduced accordingly when the motherboard signal output design is changed from selective signal output to single signal output.

Abstract: A multilayer circuit board having a security cell having security-related electronic components disposed thereon. The security cell is covered by a circuit path arrangement having circuit path segments disposed close to one another, and by an insulation layer. Penetration and thus manipulation of the security-related components is thus largely prevented.

Abstract: A wired circuit board for electrically connecting a suspension board with circuit comprising a metal supporting layer, an insulating base layer, a conductive layer, and an insulating cover layer, and an external circuit, includes a first wired circuit board electrically connected with the suspension board with circuit; and a second wired circuit board for electrically connecting with the external circuit. The first wired circuit board and the second wired circuit board are electrically connected through a preamplifier. The first wired circuit board includes a first metal supporting layer; a first insulating base layer; a first conductive layer and a first insulating cover layer.

Abstract: A power source terminal and a ground terminal for a semiconductor integrated circuit are connected to a conductor pattern through a capacitor. The conductor pattern is connected, through a filter, to a plane conductor connected to neither a ground plane nor a power source plane. Thus, a common mode noise arising from between the power source and the ground is caused to flow into the plane conductor. This reduces the common mode noise flowing in the ground and the power source of the printed wiring board, which relatively act as antennas.

Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than 4 and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.

Abstract: A printed wiring board includes a mounting portion on which a dual core processor including two processor cores in a single chip can be mounted, power supply lines, ground lines, and a first layered capacitor and a second layered capacitor that are independently provided for each of the processor cores, respectively. Accordingly, even when the electric potentials of the processor cores instantaneously drop, an instantaneous drop of the electric potential can be suppressed by action of the layered capacitors corresponding to the processor cores, respectively. In addition, even when the voltage of one of the processor cores varies, the variation in the voltage does not affect the other processor core, and thus malfunctioning does not occur.

Abstract: According to one embodiment, there is provided a printed-wiring board, includes a first base member including a component mounting face, a first electronic component with a through-electrode mounted on the component mounting face, a second base member stacked on the first base member via an insulating layer covering the first electronic component, a hole part provided in the second base member and communicating with the through-electrode of the first electronic component, and a second electronic component mounted on the second base member and circuit-connected directly to the through-electrode via the hole part.

Abstract: A method of manufacturing a flexible printed circuit board having an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.

Abstract: A radio-frequency package includes a radio-frequency device, a multilayer dielectric substrate, and an electromagnetic shield member. The multilayer dielectric substrate includes an internal conductor pad, a first signal via-hole connected to the internal conductor pad, an external conductor pad, a second signal via-hole connected to the external conductor pad, and an inner-layer signal line that connects between the first signal via-hole and the second signal via-hole. The internal conductor pad includes a leading-end open line having a length of substantially a quarter of a wavelength of a radio-frequency signal used in the radio-frequency device.

Abstract: The invention provides a multilayer printed wiring board including: a power supply wiring layer and a ground wiring layer provided so as to oppose each other via an insulation layer; mounted integrated circuits; and decoupling capacitors mounted in proximity to the integrated circuits and connected between the power supply wiring layer and the ground wiring layer to absorb noise from the integrated circuits. The power supply wiring layer includes through holes for connecting the decoupling capacitors to the power supply wiring layer and has a polygonal form formed by straight lines which link some of the through holes.

Abstract: A printed circuit board (PCB) includes a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, a first pad set of terminal pads and a second pad set of terminal pads formed on the substrate, and a first group of conductive connection members and a second group of conductive connection members formed in the substrate. The first group of the via holes are surrounded by the first pad set of the terminal pads and the second group of the via holes are surrounded by the second pad set of the terminal pads. The first and the second groups of conductive connection members fill up the first and second groups of the via holes. The first group of the conductive connection members are connected to the first pad set of the terminal pads and the second group of the conductive connection members are connected to the second pad set of the terminal pads.

Abstract: A printed circuit board has a core substrate including a resin substrate having an opening, a capacitor formed in the opening and having a first electrode structure having a portion facing to the upper surface of the core substrate and a second electrode structure having a portion facing to the lower surface of the core substrate, an upper insulating layer formed over the upper surface of the core substrate and having a conductive circuit formed over the upper insulating layer and a via hole electrically connecting the portion of the first electrode structure and the conductive circuit of the upper insulating layer, and a lower insulating layer formed over the lower surface of the core substrate and having a conductive circuit formed over the lower insulating layer and a via hole electrically connecting the portion of the second electrode structure and the conductive circuit of the lower insulating layer.

Abstract: A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract: There is provided a multi-layer printed wiring board that can perform impedance control, concurrently maintaining the flexibility of a flexible portion with one or more signal lines. Such a multi-layer printed wiring board includes a plurality of rigid board units; and a flexible board unit, connecting outer layers or inner layers of the plurality of rigid board units and extending over the outer layers or the inner layers of the plurality of rigid board units. The flexible board unit includes a signal layer sending signals between the plurality of rigid board units; ground layers sandwiching the signal layer; and intermediate layers each interposed between the signal layer and one of the ground layers.

Abstract: A semiconductor device includes an upper circuit board which has a plurality of upper-layer wirings including a plurality of first upper-layer wirings, and has a plurality of first and second lower-layer wirings. A first semiconductor structure body is provided on an upper side of the upper circuit board and is electrically connected to the first upper-layer wirings. A lower circuit board which is provided on a peripheral part of a lower side of the upper circuit board, the lower circuit board including a plurality of external connection wirings that are electrically connected to the second lower-layer wirings, and an opening portion which exposes the first lower-layer wirings. A second semiconductor structure body which is disposed in the opening portion of the lower circuit board, second semiconductor structure body including a plurality of external connection electrodes that are electrically connected to the first lower-layer wirings of the upper circuit board.

Abstract: There is provided a circuit substrate to be mounted in an electronic apparatus, and the circuit substrate has a power supply and a GND. The GND of the circuit substrate is electrically connected to GNDs of other components of the electronic apparatus through connecting parts. The circuit substrate has a part or circuit that implements a low impedance in an intended frequency range between the peripheral conductor of the connecting part opening to be used for the connection and the power supply of the circuit substrate.

Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.

Abstract: An apparatus includes a substrate which includes an electronic component mounted on the substrate, the electronic component for processing a pair of signals, the substrate including a first wire for transmitting one of the signals, the first wire being formed on a first layer of the substrate, and a second wire for transmitting another one of the signals, the second wire being formed on a second layer of the substrate in a first region under the electronic component and being formed on a third layer in a second region of an other part of the first region.

Abstract: The invention relates to a multilayer printed circuit board structure comprising a stack of plurality of electrically insulating and/or electroconductive layers and at least one passive or active electrical component arranged inside the stack of layers, the component extending laterally only in part of the surface extension of the stack of layers. The invention also relates to a passive or active electrical component mounted on the stack, to an associated wiring, and to a corresponding production method. According to the invention, the insert is embedded between two electrically insulating liquid resin layers or prepreg layers extending over the entire surface and covering the insert on both sides, the insert being surrounded by a resin material that is liquefied by compression or lamination of the structure. The invention structure can be used in printed circuit board technology.

Abstract: Disclosed herein is a printed circuit board having an RF module power stage circuit embedded therein. Specifically, this invention relates to a printed circuit board having an RF module power stage circuit embedded therein, in which a terminal pad for a resistor, a bead, or an inductor is defined or formed on a power supply plane of a multilayered wired board to connect the resistor, the bead, or the inductor to the power supply plane, and the resistor, the bead, or the inductor is connected in parallel with a decoupling capacitor by using a via hole or by embedding the resistor, the bead or the inductor perpendicular to the power supply plane, thus decreasing the size of the RF module and improving the performance thereof.

Abstract: In accordance with a first embodiment, the present invention provides a circuit substrate comprising a first surface; a second surface; a first via having a first end near said first surface and a second end near said second surface; a second via having a first end near said first surface and a second end near said second surface; a first conductive element electrically coupling said first end of said first via and said first end of said second via; a second conductive element electrically coupling said second end of said first via and said second end of said second via; an input signal line coupled to said first via; and an output signal line coupled to said second via.

Abstract: A manufacturing method of a circuit board is provided. A metal core is provided. A conductive layer is formed on each of some carriers. The carriers and dielectric layers are laminated at both sides of the metal core to form a stacked structure. Each of the dielectric layers is located between the corresponding carrier and the metal core, and a portion of the conductive layer is embedded in the corresponding dielectric layer. Then, the carriers are removed. A blind via and/or a through via are/is formed in the stacked structure to connect the corresponding conductive layer and the metal core and/or connect the conductive layers at both sides of the metal core, wherein the through via penetrates the metal core. The conductive layer on a surface of the dielectric layer is removed.

Abstract: A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board.

Abstract: A wiring board has a base substrate, a conductive pattern formed on the base substrate, an insulation layer formed on the conductive pattern and the base substrate and including a resin-impregnated inorganic cloth, a conductive pattern formed on the insulating layer, a via formed in the insulation layer and connecting the conductive pattern formed on the base substrate and the conductive pattern formed on the insulating layer, and a through-hole connected to the conductive pattern formed on the base substrate, penetrating through the base substrate and having a hole diameter in a range of 10 ?m to 150 ?m.

Abstract: A wiring board and method of forming a wiring board. The wiring board includes a first substrate and a second substrate having a smaller mounting area than a mounting area of the first substrate. A base substrate is laminated between the first substrate and the second substrate such that the first substrate extends beyond at least one edge of the second substrate. At least one of the base substrate, the first substrate or the second substrate comprises pliable resin, and at least one other of the base substrate, the first substrate or the second substrate comprises an inorganic filler.

Abstract: Disclosed are an electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit. The electromagnetic bandgap structure in which a first metal layer, a first dielectric layer, a second dielectric layer and a second metal layer are stacked can include a first metal plate, formed between the first dielectric layer and the second dielectric layer; a second metal plate, formed on a same planar surface as the first metal plate, accommodated into a hole which is formed in the first metal plate and electrically connected to the first metal plate through a metal line; and a via, connecting the second metal plate to any one of the first metal layer and the second metal layer. With the present invention, the electromagnetic bandgap structure can be not only miniaturized but also have a low bandgap frequency.

Abstract: Substrate structure embodiments generally have first and second sides and are configured to form at least one opening that communicates between the first and second sides. A circuit path is carried on the first side and extended over the opening wherein the circuit path has a near side facing the substrate and has a far side facing away from the substrate. A circuit element has at least one bonding pad and is inserted into the opening after which the conductive bump is arranged to join the pad to the path. In another embodiment, the bump joins the pad to the near side of the path. In another embodiment, the path defines a hole and the bump fills the hole. In yet another system embodiment, the opening comprises a recess and associated vias. These embodiments may also have a second conductive circuit path carried on the first side and having a near side facing the substrate and a far side facing away from the substrate.

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

Abstract: A circuit module includes an electronic component, a ceramic multilayer substrate and a resin wiring substrate. The ceramic multilayer substrate is provided with a wiring layer disposed on top thereof and a cavity in which the electronic component is mounted, wherein a space between the electronic component and the cavity is filled with a thermosetting resin and a surface of the filled cavity is planarized. The resin wiring substrate has an insulating adhesive layer disposed at one side thereof and provided with at least one opening filled with a conductive resin. The ceramic multilayer substrate and the resin wiring substrate are bonded by the insulating adhesive layer, and the wiring layer on the ceramic multilayer substrate is electrically connected with the conductive resin.

Abstract: A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between an IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: Signal line conductors passing through vertical vias in an insulative substrate for supporting and interconnecting integrated circuit chips are provided with shielding conductors in adjacent vias that link respective power and ground planes. The shielding conductors' presence in positions around a signal via is made possible through the employment of power plane and ground plane conductive grids that are laid out in rhomboid patterns. The power plane and ground plane grids possess a left-right mirror relation to one another and are displaced to place the rhomboid's corners to avoid overlapping any of the grid lines.

Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.

Abstract: A multilayer printed circuit board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein a electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.

Abstract: An object of the present invention is to provide a wiring module that enables dense mounting and a reduction in wiring distance. The wiring module in accordance with the present invention includes a base material, a plurality of electronic circuit parts, insulating portions, and conductive portions connected to the electronic circuit parts, the plurality of electronic circuit parts, the insulating portions, and the conductive portions being integrally held on the base material. Wires are composed of a stack of the conductive portions and extend in a direction crossing a surface of the base material and in a direction crossing a direction perpendicular to the base material surface to electrically connect the plurality of electronic circuit parts together.

Abstract: An electronic device is provided. The electronic device includes: a circuit board having a surface on which a hollow is formed; an electronic component placed into the hollow; a pattern wiring which is formed on a bottom surface of the hollow and whose tip is provided at a position corresponding to a signal electrode of the electronic component; a signal wire connecting a tip of the pattern wiring and the signal electrode of the electronic component; two in-hollow ground patterns formed so as to sandwich the tip of the pattern wiring therebetween on the bottom surface of the hollow; and two or more ground wires that connect two ground electrodes provided on the electronic component so as to sandwich the signal electrode therebetween to the corresponding in-hollow ground patterns, respectively.

Abstract: A wiring substrate includes a first insulation layer, a connection terminal, a second insulation layer, a via, and a wiring pattern. The connection terminal is disposed in the first insulation layer so as to be exposed from a first main surface of the first insulation layer, and is electrically connected with a semiconductor chip. The second insulation layer is disposed on a second main surface of the first insulation layer situated on the opposite side from the first main surface. The via is disposed in the second insulation layer, and is electrically connected with the connection terminal. The via is separated from the connection terminal. The wiring pattern is disposed on the second main surface of the first insulation layer and electrically connects the connection terminal and the via.

Abstract: A DC-DC converter comprising a soft-magnetic, multi-layer substrate provided with a laminated coil constituted by connecting pluralities of conductor lines, and a semiconductor integrated circuit device comprising a switching device and a control circuit, which are mounted on the soft-magnetic, multi-layer substrate; the semiconductor integrated circuit device comprising an input terminal, an output terminal, a first control terminal for controlling the ON/OFF of the switching device, a second control terminal for variably controlling output voltage, and pluralities of ground terminals; the soft-magnetic, multi-layer substrate comprising first external terminals formed on a first main surface, first connecting wires formed on the first main surface and/or on nearby layers, second connecting wires formed between the side surface of the multi-layer substrate and a periphery of the laminated coil, and second external terminals formed on a second main surface; and terminals of the semiconductor integrated circuit

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.