Delay Based Upon Propagation Delay Time Patents (Class 370/519)
  • Patent number: 7573914
    Abstract: By equipping receiving devices in a network with synchronizable clocks it is possible to periodically send an “impulse” signal that is received by all of the clocks at the same (or relatively the same) instant of time. The accuracy of the impulse clock need not be high, only that its signal reach all the clocks approximately at the same time. In one embodiment, a transmitting device, upon receipt of the synchronizing impulse signal, sends a packet of data bearing the sending device's epoch time-stamp to a receiving device. The data packet makes its way through the network element to the receiving device and the time-stamp is used by the receiving device to calculate the difference between the epoch time of the receiver and the epoch time of the sender. Effectively, this procedure removes the unknown network element transit times from the equation and allows the devices to operate in a synchronized manner.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: August 11, 2009
    Assignee: Agilent Technologies, Inc.
    Inventors: Slawomir K. Ilnicki, Jefferson B. Burch, Martin Curran-Gray
  • Patent number: 7565677
    Abstract: A data carousel contains multiple data files having a particular arrangement. These files are cyclically broadcast to a number of receivers of the data files. A procedure modifies the arrangement of data files based on information obtained from receivers of the data files.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: July 21, 2009
    Assignee: Microsoft Corporation
    Inventors: Regis J. Crinon, Martin Taillefer
  • Patent number: 7542487
    Abstract: A method to manage the secure download of data (102) to a very large number of network connected client devices (104, 110, 112, 114, 116, 118, 1120, 122) distributed within large geographic areas. The method provides adaptive data throttling and makes optimal use of network data bandwidth. The method can be advantageously applied for managing simultaneous data downloading to millions of network connected remote devices (104, 110, 112, 114, 116, 118, 1120, 122) via private networks, public networks and the Internet (124). A close-loop download regulation algorithm achieves the highest download capacity for the files without exceeding the maximum network capacity and without degrading the transactional and operational traffic performance between the server and the connected client devices.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: June 2, 2009
    Assignee: Mudalla Technology, Inc.
    Inventors: Jean-Marie Gatto, Thierry Brunet De Courssou
  • Patent number: 7535931
    Abstract: A two-way time transfer protocol includes: sending a signal from a first node including a first clock and a first time interval counter coupled to the first clock over a transport physical layer coupled to the first node to a second node coupled to the transport physical layer, the second node including a second clock and a second time interval counter coupled to the second clock; then sending a last second node time interval counter value from the second time interval counter of the second node over the transport physical layer to the first node; and then comparing at the first node a last first node time interval counter value to the last second node time interval counter value. A first-way path latency from the first node to the second node is substantially equal to a second-way path latency from the second node to the first node, and all of a first node transmit delay, a first node receive delay, a second node transmit delay and a second node receive delay are substantially constant.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: May 19, 2009
    Assignee: Symmetricom, Inc.
    Inventors: George P. Zampetti, Robert P. Hamilton
  • Patent number: 7526000
    Abstract: Jitter is compensated on data packets by clock time derived time stamping upon transmission of the data packets. This results in transmission time stamps. The jitter is compensated based on a comparison between the transmission time stamps and generated reception time stamps of the data packets, whereby the reception time stamps are derived from the same clock time as whereof the transmission time stamps are derived. The comparison provides time delay information which is used for calculating a required minimum and maximum buffer size, for absorbing the practically experienced jitter at the receiver end of the transmission medium. The method is also suited for real time applications, such as MPEG, DVB and DSS.
    Type: Grant
    Filed: July 4, 2003
    Date of Patent: April 28, 2009
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Wilhelmus Jacobus Van Gestel
  • Patent number: 7515616
    Abstract: A packet data transmission method of the HSDPA system includes collecting information on the quality of physical channels, a status of the MAC buffer, the priority level of data, the delay of data, and the like, determining the transmission order of data and the size of a data block to be transmitted based on the collected information, and transmitting the data block through the physical layer according to the order of transmissions. Since the HSDPA scheduler takes into account the delay of data, the quality of real-time services can be improved.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: April 7, 2009
    Assignee: LG Electronics Inc.
    Inventors: Seung June Yi, Woon Young Yeo, So Young Lee
  • Patent number: 7492754
    Abstract: A novel and improved method and apparatus, in a WCDMA communication system, for informing a mobile station of a downlink data frame time offset by determining the downlink data frame time offset, and transmitting the downlink data frame time offset via an Active Set Update message transmitted from a cell to mobile station. Once an Active Set Update message is received, the data frame time offset information is provided to a timing block which may determine data frame boundary of each downlink signal. Timing block may then adjust the PN sequence timing corresponding to the downlink signal associated with the data frame time offset such that corresponding data symbols in each data frame are correctly soft combined in a combiner.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: February 17, 2009
    Assignee: QUALCOMM Incorporated
    Inventors: Daisuke Terasawa, Francesco Grilli, Serge D Willenegger
  • Patent number: 7483448
    Abstract: A method and system for network terminal clock synchronization includes determining a respective round trip delay time from a master terminal to each slave terminal and offsetting the clock of each slave terminal by an amount proportional to the respective determined round trip delay time such that the master terminal and each of the slave terminals have substantially the same point of reference in time. The method and system further include, in response to a trigger signal, determining a respective offset between the master clock of the master terminal and the clocks of each of the slave terminals and offsetting the clocks of each of the slave terminals by an amount proportional to the determined respective offset to synchronize the clocks of each of the slave terminals to the master clock of the master terminal.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: January 27, 2009
    Assignee: Alcatel-Lucent USA Inc.
    Inventors: Rajan Bhandari, Miguel Dajer, Mahendra Tailor
  • Patent number: 7483443
    Abstract: Methods and systems for dynamically adjusting the length of delay before playback as a function of the amount of transmission jitter is disclosed, whereby a target error rate is received, error rates at different delays are tracked and current delay is adjusted as a function of tracked error rates.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: January 27, 2009
    Assignee: Microsoft Corporation
    Inventors: Paul E. Newson, Roderick M Toll
  • Patent number: 7477712
    Abstract: Systems and methods for implanting synchronous data transfer between clock domains are disclosed. An exemplary system may comprise an adaptable data path having an input for receiving a signal from a first clock domain and an output in a second clock domain. A controller is operatively associated with the adaptable data path. The controller is responsive to operating parameters to configure the adaptable data path to align a logical clock pulse on the signal received from the first clock domain with the same logical clock pulse in the second clock domain based on a measured delay between the first and second clock domains.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: January 13, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Timothy C. Fischer, Samuel Naffziger, Benjamin J. Patella
  • Patent number: 7460561
    Abstract: In a discrete tone system, a base station receives a transmission burst from a remote unit being installed that includes delay compensation pilot tones that are uniformly spread throughout the transmission bandwidth. The arrival time transmission burst is not synchronized with the other remote units transmitting to the base station. The base station measures the phase delay of each tone and calculates the delay of the remote unit from the slope of the line of phase angle versus tone frequency. The base station transmits a signal to the remote unit that includes the magnitude and direction of the delay, which allows the remote unit to adapt the timing of its transmission to be synchronized with the other remote units.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: December 2, 2008
    Assignee: Clearwire Corporation
    Inventor: Elliott Hoole
  • Patent number: 7461026
    Abstract: A fair exchange is disclosed to reduce potential inequities in an electronic trading environment. Market data is sent from a host system to client devices through one or more synchronized local communication servers such that the data can be displayed simultaneously or nearly simultaneously at each client device. Market data sent to client devices might include price information. Likewise, a host system may transaction data sent from client devices via the local communication servers. The ordering of transaction data is based, at least in part, on when the local communication servers received the transaction data from the client devices. Transaction data sent to a host system might include order information.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: December 2, 2008
    Assignee: Trading Technologies International, Inc.
    Inventor: Jens-Uwe Schluetter
  • Patent number: 7457973
    Abstract: A new system and method is described, utilizing a scheduler based on a transmission time calculation and prioritizing algorithm. The system utilizes a Schedule Information Vector (SIV) protocol for saving power in wireless local area networks. The system comprises an access point having a priority queue, one or more stations, an SIV frame comprising an association ID for identifying one of the stations and a scheduled wake-up time for the identified station. An algorithm is employed for calculating the transmission time of downlink data for the stations. The access point originates and transmits to the one or more stations the SIV frame of the scheduled wake-up times. The current data to be transmitted to each station is accessed by the algorithm to determine the total transmission time to each station.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: November 25, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Yonghe Liu
  • Patent number: 7418012
    Abstract: The invention relates to a method and device for the time-synchronised relaying of signals, whereby various signals from at least one signal source are relayed over various signal paths to at least one signal receiver, with time markers overlaid on the various signals. The delays occurring in the various signal paths are determined, a minimum total delay is calculated from the determined delays and information as to the minimal total delay is inserted in the various signals in the form of time-markers. A time-synchronous relaying of the signals is guaranteed in each signal path by means of an individual signal delay, the delay value of which corresponds to the difference between the minimal total delay and the delay caused by signal processing imposed on the signal in each signal path.
    Type: Grant
    Filed: June 23, 2001
    Date of Patent: August 26, 2008
    Assignee: Grundig Multimedia B.V.
    Inventor: Hans-Jürgen Busch
  • Patent number: 7415039
    Abstract: It is objected to simplify a procedure concerning bandwidth acquisition. Bandwidth acquiring means 809 of a second transmitting apparatus 814 acquires a bandwidth which was used by a first transmitting apparatus 806 by using a propagation delay identifier804 read from first transmitting apparatus 806 and a maximum transmission data size 805 after stopping transmission of first transmitting apparatus 806. Each apparatus is composed so that transmission is started using this bandwidth and because returning and re-acquisition are not accompanied when the transmission is switched, necessary procedure can be simplified. Further, it is possible to effectively use the bandwidth by using a propagation delay identifier.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: August 19, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidetoshi Takeda, Hiroyuki Iitsuka, Takuya Nishimura, Masazumi Yamada
  • Patent number: 7415002
    Abstract: A device that synchronizes circuits over asynchronous links is disclosed. Some embodiments of the invention include a device that comprises a plurality of circuits. One of the plurality of circuits is designated as a “master” circuit. The master circuit is configured to send a first synchronization signal to one or more of the plurality of circuits, and each circuit that receives the first synchronization signal is configured to responsively send a second synchronization signal to one or more of the plurality of circuits.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: August 19, 2008
    Assignee: Brocade Communications, Inc.
    Inventors: Kreg A. Martin, Ronald K. Kreuzenstein, John M. Terry
  • Patent number: 7408873
    Abstract: Systems and methods for round-trip-delay adjustment in a multipoint-to-point orthogonal frequency division multiplexing (OFDM) system are provided. In one embodiment, a method for multipoint-to-point communication comprises: receiving at a host a plurality of upstream symbols transmitted from a plurality of remote units, the upstream symbols transmitted on a plurality of orthogonal carriers modulated using an inverse Fourier transform; and determining respective round trip path delay values associated with each of at least two of the plurality of remote units.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: August 5, 2008
    Assignee: ADC Telecommunications Inc.
    Inventors: Michael J. Geile, Jeffrey Brede
  • Publication number: 20080181259
    Abstract: A method and system for dynamically adjusting packet size to decrease a delay of a streaming data transmission. A measurement is obtained by a measuring computing unit (i.e., data transmission server or client computing unit). The first measurement is either (1) a delay of a streaming data transmission being sent from the data transmission server to the client computing unit via a plurality of packets or (2) a frequency of damaged packets of the plurality of packets. The damaged packets contribute to the delay of the streaming data transmission. The packet size is adjusted by the data transmission server. The packet size adjusting includes utilizing the measurement and facilitating a reduction of the streaming data transmission delay. The delay results from noise on one or more communication link segments used by the streaming data transmission.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventors: Dmitry Andreev, Galina Grunin, Gregory Vilshansky
  • Publication number: 20080181260
    Abstract: Described are the architecture of such a system, algorithms for time synchronization during a multiway conferencing session, methods to fight with network imperfections such as jitter to improve synchronization, methods of introducing buffering delays to create handicaps for players with faster connections, methods which help players with synchronization (such as a synchronized metronome during a music conferencing session), methods for synchronized recording and live delivery of synchronized data to the audience watching the distributed interaction live over the Internet.
    Type: Application
    Filed: January 31, 2008
    Publication date: July 31, 2008
    Inventors: Stanislav Vonog, Nikolay Surin, Timur Iskhodzhanov, Vadim Shtayura
  • Patent number: 7406105
    Abstract: A system and method that facilitates multiple systems of communicating devices, i.e., a master device and one or more implantable slave devices, to coexist on a common, e.g., RF, communication channel having a limited temporal bandwidth while maintaining the required update rate between each master device and its associated slave devices. In embodiments of the present invention, master devices periodically transmit one or more beacon messages that are suitable for identification by other such master devices at a communication range greater than the communication range that may cause interference between systems and thus enabling one or more systems to cause the position of its frame periods to be interleaved with the frame periods of other such systems in anticipation of systems moving in closer proximity and actually interfering with each other.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: July 29, 2008
    Assignee: Alfred E. Mann Foundation for Scientific Research
    Inventors: Gregory J. DelMain, Dan Folkman, Paul DeRocco, Lawrence J. Karr
  • Patent number: 7403799
    Abstract: In a base station providing a large-distance service area (large area) such as a mobile communication system WLL of the CDMA method, the time required for performing call search (path search) is reduced so as to reduce the call connection time. When performing a path search in the base station (8), a predetermined offset value from a reference time is set so that path search is performed only in a doughnut-shaped service area (30). Thus, there is no need of performing path search in the vicinity of the base station (8) and search is performed only in the doughnut-shaped service area (30). Thus, it is possible to reduce the path search time and reduce the call connection time.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: July 22, 2008
    Assignee: NEC Corporation
    Inventor: Masaki Kono
  • Patent number: 7388887
    Abstract: Real-time communication of multimedia data over heterogeneous networks that may include constant delay networks, variable delay networks that have a common reckoning of time, and variable delay networks that do not have a common reckoning of time. If there are any variable delay networks in which there is no common reckoning of time in the heterogeneous networks, a common reckoning of time is established in each of those networks. Then, a constant delay network is emulated for each variable delay network using the specific common time reckoning present in each variable delay network.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: June 17, 2008
    Assignee: Microsoft Corporation
    Inventors: Donald M. Gray, III, Anand Valavi, Robert G. Atkinson, Tom Blank
  • Publication number: 20080112440
    Abstract: A method and apparatus for transmitting packets in a wireless communication system (100). The method and apparatus determining a delay period from among the various delay times at each of a plurality of access nodes (106-110) wherein the delay time is the time it takes for a node to receive a data packet from a source (102) through a network (104). During transmission of data from the source, the nodes receive data packets and from the data packets, the wall clock time is determined. The packets are transmitted from the nodes at a time equivalent to the wall clock time and the delay period so that the packets are synchronously transmitted from the multiple nodes.
    Type: Application
    Filed: November 10, 2006
    Publication date: May 15, 2008
    Applicant: Motorola, Inc.
    Inventors: Anand S. Bedekar, Rajeev Agrawal
  • Publication number: 20080095198
    Abstract: A node (22) of a telecommunications network (2) receives, over a transmission chain (24) subject to packet jitter, packets of a connection involving a client device (26). The node (22) comprises a packet buffer (38) configured to store the packets received over the transmission chain prior to transmission of the packets to the client device (26). The node (22) further comprises a client-conscious scheduler (40) which is configured to schedule the transmission of the packets from the packet buffer (38) over a channel (32) to the client device (26) in accordance with a timing consideration of the client device (26). In an example embodiment, the timing consideration of the client device (26) which is taken into account by the scheduler (40) is avoidance of drain of a playout buffer of the client device.
    Type: Application
    Filed: March 13, 2007
    Publication date: April 24, 2008
    Applicant: Telefonaktiebolaget LM Ericcson (publ)
    Inventors: Stefan Wager, Janne Peisa, Mats Sagfors, Johan Torsner, Per Synnergren
  • Patent number: 7362715
    Abstract: Disclosed is a mobile communication system including a network constituted of at least one switching center and a plurality of base stations, and a mobile station which communicates with the base stations simultaneously. The system permits varying transmission delay between the switching center and the base stations according to the type of services available to the mobile station. The object of the present invention is to propose a communication which permits varying transmission delay according to the type of service currently employed, and to promptly recover a synchronization state even if an out-of-sync state happens. To attain the object, a memory means (mobile switching center processor 32) stores transmission delay characteristics corresponding to services which are available to the mobile station.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: April 22, 2008
    Assignee: NTT Mobile Comunications Network, Inc.
    Inventors: Tomoyuki Ohtani, Motoshi Tamura, Takaaki Satoh, Hiroki Morikawa, Fumiaki Ishino
  • Publication number: 20080080568
    Abstract: Techniques for mitigating effects of differing latencies associated with real time data streams in multimedia communication networks. For example, a technique for mitigating a latency differential between a first media path and a second media path, over which a first device and a second device are able to communicate, includes the following steps. A training phase is performed to determine a latency differential between the first media path and the second media path. Prior to the first device switching a media stream, being communicated to the second device, from the first media path to the second media path, the first device synchronizes the media stream based on the determined latency differential such that a latency associated with the switched media stream is made to be substantially consistent with a latency of the second media path.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Simon Derek Hughes, Jim Patrick Douglas
  • Patent number: 7324457
    Abstract: A method and apparatus are disclosed for compensating for optical transmission delays in a synchronous mobile communication system. A Base Station Transceiver Subsystem (BTS) includes a Main Unit (MU) for processing a mobile communication signal and a plurality of Remote Units (RUs) connected to the MU by Synchronous Digital Hierarchy (SDH) transmission, for performing radio processing for communication with a Mobile Station (MS). The method comprises the steps of sequentially forming a loop on an optical transmission line to each of the RUs for optical transmission delay compensation test between the MU and each of the RUs; once a loop for the optical transmission delay compensation test is formed, transmitting a test SDH frame to a corresponding RU, and measuring a delay time until the test SDH frame is fed back; and transmitting data to the corresponding RU after compensating the transmission time by the measured delay time.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Pyo Lee, Kwang-Hee Han, Jeong-Deog Seo
  • Publication number: 20070274348
    Abstract: In a communication system comprising a link layer device connectable to one or more physical layer devices, the link layer device is configured using an efficient shared architecture for processing data associated with a plurality of links including at least one ingress link and at least one egress link. The link layer device comprises an ingress data clock processor configured to generate an ingress clock signal for processing data associated with said at least one ingress link, an egress data clock processor configured to generate an egress clock signal for processing data associated with said at least one egress link, and a control and configuration unit shared by the ingress data clock processor and the egress data clock processor. Another aspect of the invention relates to a buffer adaptive processor that in an illustrative embodiment limits clock variability in the presence of cell delay variation or cell loss.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 29, 2007
    Inventors: Robert Friedman, Hong Wan
  • Patent number: 7301896
    Abstract: A redundant changeover apparatus causing no frame synchronization loss even upon occurrence of changeover between working system and protection system. In case of an in-apparatus synchronization system, when two input signals which are mutually asynchronous in phase are changed over by a changeover switch, a changeover switch, a clock extractor, a PLL circuit, and a clock changing portion transmit signals with clocks before the changeover being gradually changed to clocks after the changeover. Alternatively, in case of an in-apparatus synchronize system, data are separated from clocks so that the data are once changed to data with reference clocks, and then for the data, clocks before the changeover are gradually changed to clocks after the changeover.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: November 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Minoru Tateno, Hideaki Koyano, Masato Kobayashi, Yasushi Yoshino, Tatsuru Iwaoka, Kazumaro Takaiwa, Akio Takayasu
  • Patent number: 7292609
    Abstract: The N peaks are selected from a delay profile in order starting from the highest peak involved in the delay profile, the path level and path timing are determined for each of the selected peaks, and the identical paths individually responsible for different delay profiles are detected by comparing the path timings calculated for the preceding time and the path timings calculated for the present time. Based of the path levels calculated for the preceding time and the path levels calculated for the present time, averaged path levels are computed on a path-by-path basis for the present time, a predetermined threshold is applied to the computed average path levels, and the paths to be allocated to the fingers are selected. Of the path timings that have been obtained for respective selected paths, the latest path timings are allocated to the fingers as synchronization timings.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: November 6, 2007
    Assignee: NEC Corporation
    Inventor: Satoshi Oura
  • Patent number: 7289451
    Abstract: The available delay budget for a full-duplex communication is distributed between the links depending on their activity, present and near history. By keeping track on if a link in a full-duplex communication system is active or inactive, i.e. Knowing the information value of the transferred data, coding procedures having larger coding delays than normally accepted can be used for active links, if the opposite link simultaneously is inactive. Since the user sensibility for delays is as largest at the moment a link becomes active, coding procedures having smaller coding delays than normally used are assigned at the moment a link becomes active. The coding delay is subsequently increased. Preferably, the round-trip delay is controlled to be kept smaller than a requested maximum value.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: October 30, 2007
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Stefan Bruhn
  • Patent number: 7280550
    Abstract: In a ring topology digital network propagation delay is reduced A master node transmits a clock signal into the network in one direction. Each slave node propagates the signal to the next slave node without regeneration until the signal is received by the master node. The amount of time the signal takes to travel around the ring, is measured and is the total ring propagation delay. The master node then transmits a clock signal in both directions to the first slave node which measures the difference in their arrival times and transmits the difference to the master node. The process is repeated for each other slave node. Based upon each difference the master node computes the propagation delay for each ring segment. The master node transmits to each slave node the corresponding ring segment propagation delay and each slave node adjusts the phase of the node's clock.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: October 9, 2007
    Assignee: Cirrus Logic, Inc.
    Inventor: Gerrit Eimbertus Rosenboom
  • Patent number: 7277458
    Abstract: An apparatus and method are disclosed for acquiring by a mobile terminal a pseudo-random noise (PN) sequence of a pilot signal received from a base station by means of a searcher, designating a phase of the acquired PN sequence as a reference phase to track the phase of the acquired PN sequence, and measuring an energy difference between an early path and a late path for the reference phase in a mobile communication system. In the apparatus and method, a first energy measurer measures a first energy value from a PN sequence with the reference phase, and a second energy measurer alternately measures energy values of the early path and the late path for the reference phase and outputs a second energy value.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: October 2, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Kwon Cho, Sang-Min Bae
  • Patent number: 7274715
    Abstract: A method and apparatus is described for the automatic delay compensation in space diversity radio transmissions. The method includes the steps of: a) receiving a first analog signal and a second analog signal, a possible delay being between the first and second signals; b) sampling the first and the second analog signals to obtain a first digital signal and a second digital signal, respectively; c) sending the digital signals to respective equalizers, and the steps of d) digitally delaying one of the first digital signal and the second digital signal by a period equal to an integral multiple of the sampling period, and e) recoverying, at the equalization phase, the residual difference between the imposed delay and the actual one.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: September 25, 2007
    Assignee: Alcatel
    Inventors: Massimo Brioschi, Roberto Pellizzoni, Roberto Valtolina, Arnaldo Spalvieri
  • Patent number: 7245637
    Abstract: In some embodiments, a method includes detecting a tone in each data frame of a sequence of telephony signal data frames. A first data frame of the sequence of telephony signal data frames may be transmitted immediately after detecting the tone therein. Transmission of a last one or last ones of the sequence of telephony signal data frames may be deferred. It may then be determined whether the tone is present in a next data frame that immediately follows the sequence of telephony signal data frames. If it is determined that the tone is not present in the next data frame, the last one or ones of the sequence of data frames and the next data frame may be transmitted. If it is determined that the tone is present in the next data frame, a respective replacement data frame may be transmitted in place of each one of the last one or last ones of the sequence of data frames and in place of the next data frame.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: July 17, 2007
    Assignee: Intel Corporation
    Inventors: Siu H. Lam, Kai X. Miao
  • Patent number: 7197093
    Abstract: A digital signal of which input data has been segmented as block each having a predetermined data amount and highly efficiently encoded along with an adjacent block is decoded, edited, and then highly efficiently encoded. A delay that takes place in such signal processes is compensated. Thus, part of a digital signal that has been highly efficiently encoded digital signal can be edited.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: March 27, 2007
    Assignee: Sony Corporation
    Inventor: Tomohiro Koyata
  • Patent number: 7187685
    Abstract: A multi-module switching system comprising at least two switching modules adapted for receiving data packets from at least one input adapter and transmitting the data packets to at least one output adapter, each of the switching modules including a shared buffer for buffering a portion of a data packet received from an input adapter and transmitting the portion to an output adapter. One of the switching modules is a master module receiving a portion of a data packet containing a packet header and sending control information contained therein serially to each other switching module as a slave module.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: March 6, 2007
    Assignee: International Business Machines Corporation
    Inventor: Daniel Wind
  • Patent number: 7177652
    Abstract: A wireless device for use in an ad hoc network is provided. The wireless device includes a transceiver, a global positioning system, and a controller. The transceiver is capable of receiving positional information from a plurality of remote users. The global positioning system is capable of generating positional information regarding the wireless device. The controller selects a first portion of the plurality of remote users to be within a pro active region of the ad hoc network based upon the positional information, and then maintains information on the remote users selected to be within the pro active region.
    Type: Grant
    Filed: July 11, 2000
    Date of Patent: February 13, 2007
    Assignee: Motorola, Inc.
    Inventors: Stephen A Hopper, Jack A Gipson
  • Patent number: 7174474
    Abstract: A distributed multi-axis motion control system comprises a multicast communications network having several node components. Each of the node components includes a clock and an actuator. The actuators are part of a motor system and a pattern profile table of the motor system is generated. The pattern profile table is translated into a separate single-direction-of-motion pattern table to separately direct the motion of each of the actuators of the node components. A grandmaster clock generates synchronization signals which are transmitted through the network at a sync interval and which synchronize the clocks. Time-bombs are generated at an interval which is a whole number multiple of the sync interval. The time-bombs cause concurrent execution of the first and subsequent steps from the single-direction-of-motion pattern tables to produce synchronized multi-axis motion of the motor system.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: February 6, 2007
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventor: Moon Leong Low
  • Patent number: 7170901
    Abstract: A device and method of controlling a de-jitter buffer, and specifically the nominal delay thereof. The nominal delay is adjusted based on delay information associated with a network in which the de-jitter buffer is located. The nominal delay is maintained between a minimum and maximum nominal delay, and is adjusted based on the probability that a packet will arrive outside a predetermined delay interval.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: January 30, 2007
    Assignee: LSI Logic Corporation
    Inventor: Ran Katzur
  • Patent number: 7164662
    Abstract: Network delay is determined in order to synchronize a clock in a mobile station with a reference clock. Tone are generated that represent a sequence of bits in a synchronization flag. The tones are sampled beginning at a selected sample start time. The sampled tones are demodulated to identify the bit values in the synchronization flag. The demodulator is synchronized with the sampled tones in the synchronization flag by shifting the sample start time until the samples generate an optimum synchronization value. A reference time is then identified according to the optimum sample start time.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: January 16, 2007
    Assignee: Airbiquity, Inc.
    Inventors: Dan A. Preston, Joseph D. Preston, Robert Leyendecker, Wayne Eatherly, Rod L. Proctor
  • Patent number: 7143301
    Abstract: A motion control system and method that includes a central controller configured to generate first and second demand control signals to be used to define actuation motion of respective first and second actuators. The central controller is in communication with first and second nodes by way of a data network, each node including at least a respective actuator configured to implement at an actuator time a motion or force-related effort based upon the respective demand control signal. Each node also includes a memory configured to store at least one respective propagation delay parameter related to a signal propagation delay between the central controller and the node. A timing mechanism establishes timing at each node based on the respective propagation delay parameter so that the actuator time at the nodes occurs simultaneously. Strictly cyclic and/or full-duplex high-speed communication can be supported. The network can be wired in a ring or as a tree and with twisted pair cabling or fiber.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: November 28, 2006
    Assignee: Motion Engineering, Inc.
    Inventors: Robert Pearce, David Cline
  • Patent number: 7139258
    Abstract: An apparatus and method for a time division multiple access (TDMA) network backbone comprising a plurality of nodes interconnected by links. Each node has receive antennas and transmit antennas for communicating radio frequency (RF) bursts, and a node control for communicating node information. The receive antennas are operated in accordance with TDMA receiving slots and the transmit antennas are operated in accordance with TDMA transmit slots. A timing reference subsystem provides timing signals for the nodes for efficiently utilizing the transmission links formed between given nodes.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: November 21, 2006
    Assignee: The Boeing Company
    Inventor: Brian Jay Tillotson
  • Patent number: 7110484
    Abstract: A changeover arrangement for the clock signals of parallel transmission connections of an assured data transmission link, wherein a clock signal is sent for the transmission paths by parallel outdoor units (OU) located in succession to a common indoor unit (IU), the clock signal is received by a corresponding set of second outdoor units, where phase locked loop signals are used to achieve the lock to the signal, and subsequent to which a second IU receives information of the mode of the phase lock. In addition, when errors are caused in the employed connection, the receiving unit selects a transmission path that has fewer errors based on mode information obtained from the outdoor unit.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: September 19, 2006
    Assignee: Nokia Corporation
    Inventors: Harri Lahti, Marko Torvinen
  • Patent number: 7110423
    Abstract: A source synchronous clocking synchronizes data and clock signals transmitted between an ATM layer and a link layer. The source synchronous clocking includes a source clock domain in a first layer which includes a register having a first input for receiving a data signal, a second input for receiving a clock signal, and an output; and a buffer having an input for receiving the clock signal and an output, the buffer generating a delay that is substantially equivalent to a delay through the register. The source synchronous clocking further includes a destination clock domain in a second layer which includes a register having a first input and a second input, the first input of the register of the destination clock domain being coupled to the output of the register in the source clock domain.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: September 19, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Jay Sethuram, Richard J. Weber, Joshi S. Chandra
  • Patent number: 7099354
    Abstract: A reference frequency is distributed through a packet-based network to remote elements in a system. Timing packets are periodically sent from a master timing element, to be received by at least one peripheral timing element. Echo messages are sent to the master timing element by each peripheral timing element after a unique delay, in response to the reception of a timing packet. Loopback delay measurements are included in each timing packet for each peripheral timing element. Each peripheral timing element locks a loop using only timing packets which incur a minimum loopback delay.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: August 29, 2006
    Assignee: Radioframe Networks, Inc.
    Inventor: Pierce V. Keating
  • Patent number: 7089440
    Abstract: A data processing system includes first, second, and third agents connected to a shared bus. The third agent is able to receive information via the shared bus from the first agent or from the second agent. The third agent includes a skew compensation circuit to determine signal skew in signal received via the shared bus and to compensate for the skew by adding delay into selected signals of the bus. The skew compensation circuit determines whether the first agent or the second agent is the sender of information received by the third agent via the shared bus. The skew compensation circuit alters the skew compensation based on the identity of the sender such that the delay into the bus signals is specific to the corresponding sender.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: August 8, 2006
    Assignee: International Business Machines Corporation
    Inventor: Leon Li-Heng Wu
  • Patent number: 7054205
    Abstract: A circuit and method is provided for determining the delay of an integrated circuit common associated with chip-to-chip variations in the manufacturing process, changes in operating voltage, and fluctuations in temperature. A clock signal is inverted, thus generating an inverted clock signal which is then delayed multiple times, resulting in several delayed versions of the inverted clock signal, with each version being delayed a different length of time. The logical state of each delayed version of the inverted clock signal is then stored. That stored logical state provides an indication as to the magnitude of the delay of the integrated circuit which may then be used to tune critical signals of the integrated circuit to avoid timing problems resulting from variations in IC propagation delay.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: May 30, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Douglas C. Buhler, John Howard Cook, III
  • Patent number: 7050467
    Abstract: A digital-to-phase or digital-to-time-shift converter (100) includes a delay line (106), a multiplexor (108) and synchronization circuit (110). In the converter (100) the clock edges of a reference signal are shifted in response to the value of a multi-bit digital word, IN (104). The synchronization circuit (110) gates the output of the multiplexor (108) such that a pulse appears at the synchronization circuit's (110) output port (114) only when the circuit is gated by a signal at input TRIG (112). The synchronization circuit (110) creates a time aperture for the multiplexor output.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: May 23, 2006
    Assignee: Motorola, Inc.
    Inventor: Frederick L. Martin
  • Patent number: 7031329
    Abstract: A method of synchronizing nodes of a telecommunication network in which a master node is coupled to a Primary Reference Clock (PRC) and a plurality of slave nodes are each arranged to synchronize their internal clocks to the PRC using data received on incoming data links. The method includes propagating Synchronization Status Messages through the network from the master node, with each node through which a message passes incorporating into the message its own identity, thereby generating in each message a node path which has been followed by the message. For each incoming link of each node, the path or path length of a Synchronization Status Message received on that link is registered as an attribute for that link.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: April 18, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Mikko Antero Lipsanen