Pattern Mask Patents (Class 378/35)
  • Patent number: 6963071
    Abstract: Numerous embodiments of a debris mitigation device are disclosed. One embodiment of the claimed subject matter may comprise a debris mitigation device for use in photolithography processes. In one embodiment, the debris mitigation device comprises a foil trap device. The foil trap device, in this embodiment, comprises a plurality of electrically conductive elements and one or more mounting devices, where the plurality of electrically conductive elements are coupled to the one or more mounting devices in such as way as to provide a space between one or more adjacent elements. In this embodiment, the elements are foil elements, and adjacent foil elements carry alternating potentials.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: November 8, 2005
    Assignee: Intel Corporation
    Inventor: Robert Bristol
  • Patent number: 6957411
    Abstract: Some embodiments of the invention provide a method of routing nets in a region of an integrated-circuit (“IC”) layout. The method selects a net that has several routable elements. It then defines a route for the net. To define the route, the method uses a wiring model that specifies preferred non-Manhattan wiring directions. It also uses a manufacturing grid as the only grid for constraining the location of interconnect lines for connecting the net's routable elements.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: October 18, 2005
    Assignee: Cadence Design Systems, Inc.
    Inventors: Steven Teig, Andrew Caldwell, Etienne Jacques
  • Patent number: 6953643
    Abstract: Mask Shaping using temporal and spatial Coherence for Ultra High Resolution Lithographic imaging and printing refers to methods and apparatus that can be adopted to print near-ideal images of basic shapes when the shapes are asymmetrical. Ultra High Resolution Lithography refers to proximity printing of clear mask fetures when they are demagnified by bias. In this lithography, optical components, including lenses and mirrors, are not used between the mask and wafer. When a clear mask feature is asymmetric and the mask-wafer gap is set so that the Critical Condition is maintained for the shortest print dimension, then undesirable features typically appear in other longer dimensions consistent with Fresnel diffraction. The undesirable featurs impede illumination uniformity for controlled printing in exposed areas. Such features, including Bright Spots and Ripple, are counteracted by the Mask Shaping that is designed to optimize printing with temporal and spatial coherence near the Critical Condition.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: October 11, 2005
    Inventor: Antony J Bourdillon
  • Patent number: 6953751
    Abstract: A micro device comprising a SU-8 photoresist layer adhered to a thin layer of, for example, silicon nitride, silicon oxide, metal, and diamond. The SU-8 layer is clamped on the thin layer by using an under-etching technique.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: October 11, 2005
    Assignee: NanoWorld AG
    Inventors: Manfred Detterbeck, Stefan Lutter, Mathieu Burri, Theo Hartmann, Terunobu Akiyama
  • Patent number: 6947519
    Abstract: An X-ray exposure apparatus extracts exposure X-rays from light called synchrotron radiation from a synchrotron radiation source by an optical path including an X-ray mirror and performs exposure using the extracted X-rays. The X-ray mirror contains a material having an absorption edge in at least one of a wavelength range of less than 0.45 nm and a wavelength range exceeding 0.7 nm, thereby implementing exposure using the X-ray in the range of 0.45 nm to 0.7 nm. The X-ray mirror contains at least one material selected from the group consisting of iron, cobalt, nickel, copper, manganese, chromium, and their alloys, nitrides, carbides, and borides.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: September 20, 2005
    Assignees: Canon Kabushiki Kaisha, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Itoga, Shunichi Uzawa, Yutaka Watanabe, Toyoki Kitayama
  • Patent number: 6934929
    Abstract: The invention provides a method for OPC modeling. The procedure for tuning a model involves collecting cross-section images and critical dimension measurements through a matrix of focus and exposure settings. These images would then run through a pattern recognition system to capture top critical dimensions, bottom critical dimensions, resist loss, profile and the diffusion effects through focus and exposure.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: August 23, 2005
    Assignee: LSI Logic Corporation
    Inventors: Travis Brist, George Bailey
  • Patent number: 6931619
    Abstract: The invention relates to a method of improving control over the dimensions of a patterned photoresist, which enables better control of the critical dimensions of a photomask or reticle which is fabricated using the patterned photoresist. In addition, the method may be used to enable improved control over the dimensions of a semiconductor device fabricated using a patterned photoresist. In particular, a patterned photoresist is treated with an etchant plasma to reshape the surface of the patterned photoresist, where reshaping includes the removal of “t”-topping at the upper surface of the patterned resist, the removal of standing waves present on patterned surfaces, and the removal of feet which may be present at the base of the patterned photoresist, where the photoresist contacts an underlying layer such as an ARC layer.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 16, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Alex Buxbaum, Melvin W. Montgomery
  • Patent number: 6924489
    Abstract: This invention relates to a device for reducing the impact of undesired distortions when studying a sample in an electron microscope, wherein said sample is arranged to be mounted on a micro-positioning device, characterised in that said micro-positioning device is connected with a control device, being arranged to control said micro-positioning device so as to compensate for measurement errors due to undesired distortions.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: August 2, 2005
    Assignee: Nanofactory Instruments AB
    Inventors: Håkan Olin, Drister Svensson, Fredrik Althoff, Andrey Danilov, Paul Bengtsson, Martin Hospers
  • Patent number: 6901133
    Abstract: The pattern dimensions of an X-ray absorber are made approximately 1.5 times (approximately 75 nm) a pattern half pitch (L/2=50 nm). Thereby, a high quality optical image can be obtained since the contrast in regard to X-rays of wavelengths shorter than approximately 8 ? to 9 ? is improved vis-à-vis the contrast of a 50 nm line and space periodic mask pattern. As a result, an X-ray exposure method produces a high resolution, and a semiconductor device manufactured by this X-ray exposure method as well as an X-ray mask, X-ray exposure unit and resist material.
    Type: Grant
    Filed: September 11, 2002
    Date of Patent: May 31, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Watanabe, Kenji Itoga
  • Patent number: 6898011
    Abstract: Methods are disclosed for manufacturing multi-layer film reflection mirrors, in which a desirable shape accuracy of a reflected wavefront can be obtained after locally scraping the multi-layer film. In an exemplary method, a multi-layer film (comprising respective alternating layers of at least two types of substances having different respective refractive indices) is superposedly formed on the surface of a mirror substrate. The multi-layer film has a constant period length, and the multi-layer film on the substrate is locally scraped to correct a phase of a reflected wavefront from the reflective surface of the mirror. The multi-layer film has an internal stress of 50 MPa or smaller. Alternatively or in addition, a compensating adjustment in a film formed on a reverse surface of the substrate can be made to cancel the stress perturbation caused by scraping of the multi-layer film on the obverse surface of the substrate.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: May 24, 2005
    Assignee: Nikon Corporation
    Inventors: Noriaki Kandaka, Masaki Yamamoto
  • Patent number: 6898781
    Abstract: A method including determining a first flare convolution based on a feature density of projected structures on a substrate layout, determining a second flare convolution based on a mask for a given substrate layout, determining a system flare variation by summing the first flare convolution and the second flare convolution, and determining a critical dimension variation based on the system flare variation.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: May 24, 2005
    Assignee: Intel Corporation
    Inventors: Vivek K. Singh, John Ernst Bjorkholm, Francisco A. Leon
  • Patent number: 6898779
    Abstract: A method of forming a pattern of elements is shown. In one embodiment, the method is used to create a reticle. In another embodiment, the method is used to further form a number of elements on a surface of a semiconductor wafer. A pattern on a reticle is first generated using a medium such as computer software to interconnect a number of active areas on the wafer. The pattern is then modified according to a number of rules to create a pattern where substantially all spaces between planned elements exhibit a desired gap width. Layers of elements such as trace lines can be better covered with an ILD in a simplified deposition process as a result of the novel pattern formation described herein.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 24, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Werner Juengling
  • Patent number: 6898267
    Abstract: In an x-ray absorber in accordance with the present invention, reduced transmittance of the x-ray absorber is suppressed while phase shift amount in the vicinity of ?-radians is achieved. For this purpose, a material is used that has a high transmittance per film thickness and contains an element with a high phase shift amount and an element with a low transmittance, as a material composition that forms the x-ray absorber. In other words, the transmittance of the x-ray absorber is mainly determined by the element with a low transmittance, and phase shift falling short of ?-radians is compensated with the element with a high transmittance and a high phase shift.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 24, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Watanabe, Kouji Kise, Hideki Yabe
  • Patent number: 6892375
    Abstract: Disclosed are data processing method, apparatus, and computer readable medium for generating data about mask, reticle, etc., for making exposure, and exposing method, apparatus and computer readable medium for performing exposure during manufacture of LSI, semiconductor device, magnetic device, liquid crystal, etc. When generating revision exposure data from design data, the correction position of revision data is designated and data processing of only designated correction portion is performed. Positional information of correction portion is added to header or footer section of revision exposure data.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 10, 2005
    Assignee: Fujitsu Limited
    Inventor: Shigeru Kimura
  • Patent number: 6884550
    Abstract: A semiconductor device manufacturing method and a semiconductor device manufacturing mask both of which make it possible to suppress a semiconductor-device global step and simply manufacture a highly-reliable semiconductor device. Square dummy patterns each having one side of, for example, 0.25 ?m or less are inserted into an area other than an actual pattern lying within a semiconductor device manufacturing mask to thereby uniformize a pattern density, enable etching processing without changing conditions set for every semiconductor device manufacturing mask and prevent an increase in global step of a post-CMP interlayer insulating film.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: April 26, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takeshi Morita
  • Patent number: 6885116
    Abstract: A moving coil linear motor positioning stage with a concentric aperture is disclosed. The present invention relates to positioning an element or device such as an optic or lens. The apparatus is ideal for moving an optic coaxial with a light beam. The present invention uses a voice coil motor with a cylindrical moving coil and a cylindrical permanent magnet assembly with a radial gap. The moving coil and magnet assemblies have clear apertures concentric with the apparatus and the axis of motion. A pair of planar flexures guides the moving coil. A position-sensing device is used to sense the position of the moving coil to enable fine position control.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: April 26, 2005
    Inventors: Jeffrey G. Knirck, Paul A. Swanson
  • Patent number: 6875544
    Abstract: A method for the fabrication of three-dimensional microstructures by deep X-ray lithography (DXRL) comprises a masking process that uses a patterned mask with inclined mask holes and off-normal exposures with a DXRL beam aligned with the inclined mask holes. Microstructural features that are oriented in different directions can be obtained by using multiple off-normal exposures through additional mask holes having different orientations. Various methods can be used to block the non-aligned mask holes from the beam when using multiple exposures. A method for fabricating a precision 3D X-ray mask comprises forming an intermediate mask and a master mask on a common support membrane.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: April 5, 2005
    Assignee: Sandia Corporation
    Inventors: William C. Sweatt, Todd R. Christenson
  • Patent number: 6872495
    Abstract: A method for fabricating a lithographic reflection mask in particular for patterning of semiconductor wafers, is described, and can be used for extremely small feature sizes below 100 nm. In known lithographic methods with EUV radiation (extreme ultraviolet), for the mask fabrication, a multilayer reflection layer is applied to a substrate. An absorber layer is deposited after the multilayer layer is patterned above the multilayer layer or is completely introduced into the latter. In the case of the method according to the invention, in contrast, the absorber layer is applied between the substrate and the reflection layer and/or on the side areas of the reflection layer. This has the advantage of reducing CD changes due to shadowing of structures lying above the reflection layer. Further advantages are, inter alia, smaller structure displacements and reduced asymmetrical intensity profiles of the reflected beams of radiation.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventor: Siegfried Schwarzl
  • Patent number: 6851103
    Abstract: A method of generating a mask of use in printing a target pattern on a substrate. The method includes the steps of (a) determining a maximum width of features to be imaged on the substrate utilizing phase-structures formed in the mask; (b) identifying all features contained in the target pattern having a width which is equal to or less than the maximum width; (c) extracting all features having a width which is equal to or less than the maximum width from the target pattern; (d) forming phase-structures in the mask corresponding to all features identified in step (b); and (e) forming opaque structures in the mask for all features remaining in target pattern after performing step (c).
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: February 1, 2005
    Assignee: ASML Masktools, B.V.
    Inventors: Doug Van Den Broeke, Jang Fung Chen, Thomas Laidig, Kurt E. Wampler, Stephen Hsu
  • Patent number: 6845145
    Abstract: The present invention is directed to the production of high quality semi-conductor devices created at speeds and in sizes that far exceed current x-ray lithography capabilities.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: January 18, 2005
    Assignee: SAL, Inc.
    Inventors: Robert Allen Selzer, Franz Ludwig Rauch, Heinz Siegert, Klaus Simon, William Rudolf Friml, Joe Baker Gagnon, Robert Harrison Macklin
  • Patent number: 6841787
    Abstract: A high resolution and high data rate spot grid array printer system is provided, wherein an image representative of patterns to be recorded on a reticle or on a layer of a semiconductor die is formed by scanning a substrate with electron beams. Embodiments include a printer comprising an optical radiation source for irradiating a photon-electron converter with a plurality of substantially parallel optical beams, the optical beams being individually modulated to correspond to an image to be recorded on the substrate. The photon-electron converter produces an intermediate image composed of an array of electron beams corresponding to the modulated optical beams. A de-magnifier is interposed between the photon-electron converter and the substrate, for reducing the size of the intermediate image. A movable stage introduces a relative movement between the substrate and the photon-electron converter, such that the substrate is scanned by the electron beams.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: January 11, 2005
    Assignee: Applied Materials, Inc.
    Inventor: Gilad Almogy
  • Publication number: 20040268290
    Abstract: A method for reducing a number of shapes, and a computer readable program code adapted to perform said method. The method forms first and second shape patterns. The second shape pattern includes the first shape pattern and error shapes. The error shapes are extracted from the second shape pattern. At least one environment shape corresponding to each error shape is derived from a subset of the error shapes. For example, each error shape in the subset may be expanded to form a corresponding expanded shape, and at least one environment shape corresponding to each expanded shape may be formed by removing all portions of the expanded shape common to the second shape pattern. The environment shape reflects a local geometric environment of its corresponding error shape. A subset of the environment shapes are deleted such that only unique environment shapes satisfying a selection criterion remain.
    Type: Application
    Filed: June 24, 2003
    Publication date: December 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph B. Allen, Timothy G. Dunham, Valarmathi C. Shanmugam
  • Patent number: 6835508
    Abstract: In order to increase the rigidity of a membrane mask that can be used for ion projection lithography, a second wafer made of the material of the membrane layer is provided in addition to a first wafer. The second wafer is patterned in the same way as the first wafer to form a second carrying ring and is fitted on the membrane layer in a mirror-inverted manner with respect to the first wafer so that the membrane area is arranged between the first and second carrying rings in a centered manner in the direction perpendicular to the membrane plane.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: December 28, 2004
    Assignees: Infineon Technologies AG, IMS-Ionen Mikrofabrikations Systeme Ges.m.b.H.
    Inventors: Jörg Butschke, Albrecht Ehrmann, Ernst Haugeneder, Frank-Michael Kamm, Florian Letzkus, Hans Löschner, Reinhard Springer
  • Patent number: 6836530
    Abstract: There is provided an illumination system for wavelengths of ≦100 nm, having an object plane and a field plane. The illumination system includes a grating element having a plurality of gratings, and a diaphragm. The diaphragm is arranged after the grating element in a beam path from the object plane to the field plane.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: December 28, 2004
    Assignees: Carl Zeiss SMT AG, ASML Netherlands B.V.
    Inventors: Wolfgang Singer, Markus Weiss, Bernd Kleemann, Karlfried Osterried, Johannes Wangler, Frank Melzer, Andreas Heisler, Vadim Yevgenyevich Banine
  • Publication number: 20040246458
    Abstract: A linear motor having a high driving force, high efficiency and low normal force comprises two opposed magnet tracks and an armature comprising three open coil sets. The linear motor may be used to drive a stage, such as, for example, a mask or wafer stage, in a lithographic apparatus.
    Type: Application
    Filed: March 11, 2004
    Publication date: December 9, 2004
    Applicant: ASML Netherlands B.V.
    Inventors: Sven Antoin Johan Hol, Johan Cornelis Compter, Erik Roelof Loopstra, Patricia Vreugdewater
  • Publication number: 20040234870
    Abstract: This invention relates to a mask blank for use in EUV lithography and a method for its production.
    Type: Application
    Filed: April 16, 2004
    Publication date: November 25, 2004
    Inventors: Lutz Aschke, Markus Renno, Mario Schiffler, Frank Sobel, Hans Becker
  • Publication number: 20040234871
    Abstract: A method and apparatus for controlling an intensity distribution of a radiation beam directed to a microlithographic substrate. The method can include directing a radiation beam from a radiation source along the radiation path, with the radiation beam having a first distribution of intensity as the function of location in a plane generally transverse to the radiation path. The radiation beam impinges on an adaptive structure positioned in the radiation path and an intensity distribution of the radiation beam is changed from the first distribution to a second distribution by changing a state of the first portion of the adaptive structure relative to a second portion of the adaptive structure. For example, the transmissivity of the first portion, or inclination of the first portion can be changed relative to the second portion. The radiation is then directed away from the adaptive structure to impinge on the microlithographic substrate.
    Type: Application
    Filed: June 16, 2004
    Publication date: November 25, 2004
    Inventors: Ulrich C. Boettiger, Scott L. Light
  • Publication number: 20040234869
    Abstract: A focus monitor on an alternating phase shift mask may include sub-wavelength features which have a depth corresponding to an etch depth of primary features on the mask (e.g., a 180° etch depth), but which produce an effective phase shift of about 60° to 120°.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Inventor: Edita Tejnil
  • Patent number: 6818357
    Abstract: A photolithographic mask is used in a photolithography imaging system for patterning a semiconductor wafer. The photolithographic mask includes a substrate, and an absorber on the substrate. The absorber is selectively etched to form mask features. In one implementation, the mask includes a thin layer on the substrate, a thickness and material of the thin layer producing a phase correction that offsets a phase error such that a common process window of the mask is maintained above a threshold level. In another implementation, the mask includes a multilayer reflector and portions of the multilayer reflector are etched adjacent to features of the mask. In a further implementation, an index of refraction of the absorber matches or nearly matches an index of refraction of the atmosphere at which the photolithography imaging occurs.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: November 16, 2004
    Assignee: Intel Corporation
    Inventor: Pei-Yang Yan
  • Publication number: 20040223131
    Abstract: The present invention is directed to a chucking system to modulate substrates so as to properly shape and position the same with respect to a wafer upon which a pattern is to be formed with the substrate.
    Type: Application
    Filed: June 9, 2004
    Publication date: November 11, 2004
    Applicant: MOLECULAR IMPRINTS, INC.
    Inventors: Byung J. Choi, Ronald D. Voisin, Sidlgata V. Sreenivasan, Michael P.C. Watts, Daniel Babbs, Mario J. Meissl, Hillman Bailey, Norman E. Schumaker
  • Patent number: 6816253
    Abstract: The invention discloses a substrate holder (8) that is configured to receive a substrate (20) and can be utilized to determine the thickness deviation of a substrate from the standard thickness of a specific substrate type. The substrate holder (8) comprises a one-piece frame having a flat upper surface (42). An opening (30) that defines a peripheral rim (32) is provided in the substrate holder (8). Receiving elements (34) on which spheres are provided are shaped onto the peripheral rim (32) of the opening (30). A substrate (20) placed into the substrate holder (8) thus comes to rest on the upper surfaces of the spheres. The support elements (34) are arranged on the peripheral rim of the opening (30) in such a way that they lie at the vertices of an equilateral triangle.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: November 9, 2004
    Assignee: Leica Microsystems Semiconductor GmbH
    Inventors: Carola Blaesing-Bangert, Ulrich Kaczynski
  • Publication number: 20040218166
    Abstract: The present invention relates to a Lorentz actuator in the context of a lithographic projection apparatus. The present invention improves the thermal performance of a Lorentz actuator over the prior art by employing a plurality of coils, separated by separation layers of high thermal conductivity material in good thermal contact with a cooling element. In this way, heat flows more quickly from hotspot regions near the center of the coils into the cooling element. According to an embodiment of the invention, the cooling element is arranged to be in line with the separation layers so as to optimize the thermal connection between these two members. It is found that splitting a parent coil into two coils provides a practical balance between improved thermal performance and undesirable increases in volume and complexity.
    Type: Application
    Filed: March 11, 2004
    Publication date: November 4, 2004
    Applicant: ASML Netherlands B.V.
    Inventors: Patricia Vreugdewater, Sven Antoin Johan Hol, Henrikus Herman Marie Cox
  • Publication number: 20040219437
    Abstract: An invention of lithography process using an improved reflection mask is provided for extreme ultraviolet (EUV) lithography. In the process an incident EUV is transmitted onto the reflection mask at a grazing incident angle. Therefore a reflected EUV develops a pattern image to a photo resist layer on the surface of the wafer, wherein the shape of the pattern image is dependent on the shape of a plurality of reflective regions on the surface of the reflection mask. Specially, the improved reflection mask is more easily fabricated. The surface roughness and the defects of the reflection mask are also more easily controlled. The improved EUV lithography process is more efficiently and cheap.
    Type: Application
    Filed: May 1, 2003
    Publication date: November 4, 2004
    Inventor: Benjamin Szu-Min Lin
  • Patent number: 6812161
    Abstract: A method of texturing a surface of a substrate, includes providing a substrate, and distributing separate particles of an overlayer material in a substantially random pattern over at least a part of a surface of the substrate. The substantially random pattern of separate particles is used as a mask for a subsequent processing of the substrate.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: November 2, 2004
    Assignee: IMEC VZW
    Inventors: Paul Heremans, Maarten Kuijk, Reiner Windisch, Gustaaf Borghs
  • Patent number: 6810104
    Abstract: The present invention describes a method for fabricating an x-ray mask tool which is a contact lithographic mask which can provide an x-ray exposure dose which is adjustable from point-to-point. The tool is useful in the preparation of LIGA plating molds made from PMMA, or similar materials. In particular the tool is useful for providing an ability to apply a graded, or “stepped” x-ray exposure dose across a photosensitive substrate. By controlling the x-ray radiation dose from point-to-point, it is possible to control the development process for removing exposed portions of the substrate; adjusting it such that each of these portions develops at a more or less uniformly rate regardless of feature size or feature density distribution.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: October 26, 2004
    Assignee: Sandia National Laboratories
    Inventor: Alfredo M. Morales
  • Publication number: 20040209171
    Abstract: An exposure pattern or mask inspection and manufacture method and an exposure pattern or mask are provided which can perform comparison inspection of the exposure pattern or mask with ease and at a high precision. A mask pattern portion for exposing a predetermined pattern by an exposure beam is inspected by disposing a plurality of dummy inspection patterns having the same pattern as at least a part of the mask pattern portion, inside and/or outside an area of the mask pattern portion and comparing at least the portion of the mask pattern portion with the dummy inspection pattern portion or portions.
    Type: Application
    Filed: February 19, 2004
    Publication date: October 21, 2004
    Inventor: Hironori Ibusuki
  • Publication number: 20040209175
    Abstract: To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.
    Type: Application
    Filed: May 12, 2004
    Publication date: October 21, 2004
    Inventors: Shigeru Moriya, Shinji Omori
  • Patent number: 6806006
    Abstract: The current invention provides a method and apparatus that minimizes the destructive effects of non-reflected energy during lithography. More specifically, a cooling system is located within the mask. In one example, a cooling module is integrated into the EUV mask. The cooling module may be thermoelectric. The EUV mask comprises a substrate structure as a base for a reticle, a cooling layer, which is formed on the substrate structure and a planarizing layer deposited on the cooling layer. In another example, a cooling channel is formed within the mask.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: October 19, 2004
    Assignees: International Business Machines Corporation, Photronics, Inc.
    Inventors: Michael J. Lercel, Dhirendra Prasad Mathur
  • Patent number: 6804323
    Abstract: A method of correcting a magnification of a mask pattern formed on a mask substrate. The method includes applying forces to four pressurizing points of an outer periphery of an approximately ring-shaped frame, which supports the mask substrate and has a rectangular window, on substantially extended lines of two diagonal lines of the rectangular window, and adjusting at least an angle, to the extended lines, of a vector of the forces applied to each of the pressurizing points.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: October 12, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Moriya, Takeshi Miyachi, Shinichi Hara, Toshinobu Tokita
  • Publication number: 20040197675
    Abstract: In a stencil mask, a conductive thin film has first openings in it. An insulating film is formed in the region of the conductive thin film excluding the first openings. A conductive support is formed on the insulating film. A second opening goes through the conductive support and insulating film and reaches the surface of the conductive thin film. A conducting member is formed in the second opening. The conducting member connects the conductive support and conductive thin film electrically.
    Type: Application
    Filed: December 23, 2003
    Publication date: October 7, 2004
    Inventors: Takeshi Shibata, Kyoichi Suguro
  • Patent number: 6801313
    Abstract: The present invention relates to an overlay mark used for the measurement of the overlay accuracy between layered patterns and alignment at the time of exposure; which has a grooved pattern surrounding a mark pattern that is formed by engraving a groove or an indent in a prescribed position on a layer where a circuit pattern is formed so as to protect this mark pattern from being deformed by thermal expansion or contraction of this layer. The present invention enables to form a multi-layered circuit pattern with a high accuracy and a high yield in production, even in the formation of a minute and densely-spaced circuit pattern.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: October 5, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Kazuki Yokota
  • Patent number: 6798862
    Abstract: The present invention describes a method for fabricating an x-ray mask tool which can achieve pattern features having lateral dimension of less than 1 micron. The process uses a thin photoresist and a standard lithographic mask to transfer an trace image pattern in the surface of a silicon wafer by exposing and developing the resist. The exposed portion of the silicon substrate is then anisotropically etched to provide an etched image of the trace image pattern consisting of a series of channels in the silicon having a high depth-to-width aspect ratio. These channels are then filled by depositing a metal such as gold to provide an inverse image of the trace image and thereby providing a robust x-ray mask tool.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: September 28, 2004
    Assignee: Sandia National Laboratories
    Inventors: Alfredo M. Morales, Dawn M. Skala
  • Patent number: 6794660
    Abstract: A stage assembly (10) for moving and positioning a device (26) includes a guide base (12), a stage (14), a stage bearing assembly (18), a control system (22), and a Y mover (68). The stage (14) retains the device (26). The stage bearing assembly (18) supports the stage (14) spaced apart from the guide base (12). More specifically, the stage bearing assembly (18) generates an electrostatic force that urges the stage (14) towards the guide base (12). The housing mover (68) moves the stage (14) relative to the guide base (12). The Y mover (68) includes a plurality of magnets and a conductor. The magnets have a magnet length (86) and the conductors have a conductor length (88). Preferably, the magnet length (86) is at least as long as the conductor length (88) plus an X stroke (87) of the stage assembly (10). This design allows the Y mover (68) to provide a force along the Y axis over the range of the positions of the Y mover (68).
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 21, 2004
    Assignee: Nikon Corporation
    Inventor: Douglas C. Watson
  • Patent number: 6795955
    Abstract: One embodiment of the invention provides a system for speeding up processing of a layout of an integrated circuit that has been divided into cells. The system operates by determining if a target cell in the layout is identical to a preceding cell for which there exists a previously calculated solution by comparing an identifier created from the target cell with an identifier created from the preceding cell. If the target cell is identical to a preceding cell, the system uses the previously calculated solution as a solution for the target cell. Otherwise, if the target cell is not identical to the preceding cell, the system processes the target cell to produce the solution for the target cell. Note that this approach can also be used for a number of different processes, such as distributed fracturing or optical proximity correction.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: September 21, 2004
    Assignee: Numerical Technologies
    Inventors: Kevin D. MacLean, Roger W. Sturgeon
  • Publication number: 20040175630
    Abstract: A patterned reflective semiconductor mask (10) uses a multiple layer ARC (24, 26, 28) overlying an absorber stack (22) that overlies a reflective substrate (12, 14). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer (30) is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.
    Type: Application
    Filed: March 3, 2003
    Publication date: September 9, 2004
    Inventors: James R. Wasson, Pawitter Mangat
  • Publication number: 20040175631
    Abstract: Photomask repair and fabrication with use of direct-write nanolithography, including use of scanning probe microscopic tips for deposition of ink materials including sol-gel and metallic inks. Additive methods can be combined with substractive methods. Holes can be filled with nanostructures. Height of the nanostructure filling the hole can be controlled without losing control of the lateral dimensions of the nanostructure. Chrome-on-Glass masks can be used and fabricated, as well as more advanced masks including masks for nanoimprint nanolithography.
    Type: Application
    Filed: October 21, 2003
    Publication date: September 9, 2004
    Applicant: NanoInk, Inc.
    Inventors: Percy Van Crocker, Sylvain Cruchon-Dupeyrat, Linette Demers, Robert Elghanian, Sandeep Disawal, Nabil Amro, Hua Zhang
  • Publication number: 20040175633
    Abstract: A reflective mask blank has a substrate (1) and a reflective multilayer film (3) formed on the substrate to reflect exposure light. The substrate has a base pattern (2) formed by a predetermined irregularity. On a surface of the reflective multilayer film formed on the base pattern, a step portion corresponding to the base pattern is formed as a programmed defect.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 9, 2004
    Applicant: HOYA CORPORATION
    Inventors: Tsutomo Shoki, Ryo Ohkubo, Takeru Kinoshita
  • Publication number: 20040166420
    Abstract: The invention relates to the manufacture of a substrate which is particularly suitable for EUV micro-lithography and comprises a base layer of low coefficient of thermal expansion (CTE) onto which at least one cover layer made of a semiconductor material is applied. Preferably, the cover layer is a silicon layer, preferably applied by ion beam sputtering. By an additional ion beam figuring treatment substrates of extremely accurate shape and extremely low roughness can be prepared.
    Type: Application
    Filed: January 7, 2004
    Publication date: August 26, 2004
    Inventors: Lutz Aschke, Markus Schweizer, Jochen Alkemper, Axel Schindler, Frank Frost, Thomas Haensel, Renate Fechner
  • Publication number: 20040166421
    Abstract: Disclosed is a photomask for near-field exposure, including: a substrate; and a membrane portion supported by the substrate and having on one side thereof a shielding membrane that has a micro aperture, in which the photomask has such a structure as to relieve stress that is generated in the border between the membrane portion and the substrate when the membrane portion is sagged.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 26, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventors: Takako Yamaguchi, Ryo Kuroda
  • Publication number: 20040165165
    Abstract: An extreme ultraviolet (EUV) AIM tool for both the EUV actinic lithography and high-resolution imaging or inspection is described. This tool can be extended to lithography nodes beyond the 32 nanometer (nm) node covering other short wavelength radiation such as soft X-rays. The metrology tool is preferably based on an imaging optic referred to as an Achromatic Fresnel Optic (AFO). The AFO is a transmissive optic that includes a diffractive Fresnel zone plate lens component and a dispersion-correcting refractive lens component. It retains all of the imaging properties of a Fresnel zone plate lens, including a demonstrated resolution capability of better than 25 nanometers and freedom from image distortion. It overcomes the chromatic aberration of the Fresnel zone plate lens and has a larger usable spectral bandwidth.
    Type: Application
    Filed: October 10, 2003
    Publication date: August 26, 2004
    Applicant: Xradia, Inc.
    Inventors: Wenbing Yun, Yuxin Wang