Abstract: A system and method for processing a plurality of channels, for example audio channels, in parallel is provided. For example, a plurality of telephony channels are processed in order to detect and respond to call progress tones. The channels may be processed according to a common transform algorithm. Advantageously, a massively parallel architecture is employed, in which operations on many channels are synchronized, to achieve a high efficiency parallel processing environment. The parallel processor may be situated on a data bus, separate from a main general purpose processor, or integrated with the processor in a common board or integrated device. All, or a portion of a speech processing algorithm may also be performed in a massively parallel manner.

Abstract: A system and method for processing a plurality of channels, for example audio channels, in parallel is provided. For example, a plurality of telephony channels are processed in order to detect and respond to call progress tones. The channels may be processed according to a common transform algorithm. Advantageously, a massively parallel architecture is employed, in which operations on many channels are synchronized, to achieve a high efficiency parallel processing environment. The parallel processor may be situated on a data bus, separate from a main general purpose processor, or integrated with the processor in a common board or integrated device. All, or a portion of a speech processing algorithm may also be performed in a massively parallel manner.

Abstract: A dial pulse detection system 20 has an analogue input buffer 22, an analogue to digital converter (ADC) 24, a processor 25, and an output buffer 26. Processor 25 operates on the digitally encoded samples produced by ADC 24 from the received signal to achieve detection of the dial pulse signalling data in the received signal. This detection process involves a training process and a recognition process. The training process extracts amplitude and timing characteristics of a first part of the received signal from a dialling instrument. These characteristics are then used to form a template for recognition of subsequent dialled digits. Detected digits are then made available at output buffer 26. Processor 25 includes a facility for sending an error signal to the user to indicate that dialled digits have not been correctly received.

Abstract: A pulse receiver for connection in a telephone circuit including two coils connected between a voltage potential and ground further including an external impedance that is alternately connected between the coils. The pulse receiver includes a first impedance connected in series with the first coil and a second impedance equivalent to the first impedance connected in series with the second coil and an input circuit connected across the first impedance for detecting the connection of the external impedance of the telephone circuit. Switching circuitry is provided that is connected to the input circuitry and alters a first output node pair from a normally closed state to an open state and alters a second output pair from a normally open state to a closed state in response to a signal received from the input circuitry indicative of the detection of the external impedance connection.