Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/25)
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Patent number: 7741134Abstract: A light source and method for fabricating the same are disclosed. The light source includes a substrate and a light emitting structure. The substrate has a first surface and a second surface, the second surface including a curved, convex surface with respect to the first surface of the substrate. The light emitting structure includes a first layer of a material of a first conductivity type overlying the first surface, an active layer overlying the first layer, the active layer generating light when holes and electrons recombine therein, and a second layer includes a material of a second conductivity type overlying the active layer and a second surface opposite to the first surface. A mirror layer overlies the light emitting structure.Type: GrantFiled: September 15, 2008Date of Patent: June 22, 2010Assignee: Bridgelux, Inc.Inventor: Ghulam Hasnain
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Patent number: 7732232Abstract: Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module.Type: GrantFiled: October 1, 2007Date of Patent: June 8, 2010Assignee: Nanosolar, Inc.Inventors: James R. Sheats, Sam Kao, Gregory A. Miller, Martin R. Roscheisen
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Patent number: 7732234Abstract: A method of fabricating a package with a light emitting device includes depositing a first metallization to form a conductive pad on which the light emitting device is to be mounted and to form one or more feed-through interconnections extending through a semiconductor material that supports the conductive pad. Subsequently, a second metallization is deposited to form a reflective surface for reflecting light, emitted by the light emitting device, through a lid of the package. Deposition of the second metallization is de-coupled from deposition of the first metallization.Type: GrantFiled: February 15, 2007Date of Patent: June 8, 2010Assignee: Hymite A/SInventors: Christoffer Graae Greisen, Matthias Heschel, Lior Shiv, Steen Weichel
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Patent number: 7732829Abstract: A submount for an optoelectronic device includes a substrate, a first top pad on a top surface of the substrate, a first bottom pad on a bottom surface of the substrate and a first wrap-around contact in a sidewall recess of the substrate, in which the first wrap-around contact is coupled electrically to the first top pad and to the first bottom pad. Alternatively, or in addition, the submount includes a device mounting pad on the top surface of the substrate, a wire-bond pad on the top surface of the substrate, a contact pad on the bottom surface of the substrate and a feedthrough contact which extends through the substrate and electrically couples the wire-bond pad to the contact pad.Type: GrantFiled: February 5, 2008Date of Patent: June 8, 2010Assignee: Hymite A/SInventor: Thomas Murphy
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Patent number: 7732229Abstract: Methods and devices are provided for absorber layers formed on foil substrate. In one embodiment, a method of manufacturing photovoltaic devices may be comprised of providing a substrate comprising of at least one electrically conductive aluminum foil substrate, at least one electrically conductive diffusion barrier layer, and at least one electrically conductive electrode layer above the diffusion barrier layer. The diffusion barrier layer may prevent chemical interaction between the aluminum foil substrate and the electrode layer. An absorber layer may be formed on the substrate. In one embodiment, the absorber layer may be a non-silicon absorber layer. In another embodiment, the absorber layer may be an amorphous silicon (doped or undoped) absorber layer. Optionally, the absorber layer may be based on organic and/or inorganic materials.Type: GrantFiled: June 28, 2006Date of Patent: June 8, 2010Assignee: Nanosolar, Inc.Inventors: Craig Leidholm, Brent Bollman, James R. Sheats, Sam Kao, Martin R. Roscheisen
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Patent number: 7723746Abstract: A polarized light emitting diode (LED) includes a marker indicating a polarization direction. A package for the LED also includes a marker indicating the polarization direction. The markers on the LED and package are used for mutual alignment, wherein the LED is attached in a favorable orientation with respect to a package, so that the polarization direction of emitted light from the package is apparent. The marker is placed on the LED before die separation and the marker is placed on the package before alignment. The marker on the LED comprises a photolithographic pattern, an asymmetric die shape, a notch on the die, or a scratch on the die, while the marker on the package comprises an electrode shape or pattern, an asymmetric package shape, a notch on the package, or a scratch on the package. Finally, the LED or package may be installed in an external circuit or system that also indicates the polarization direction.Type: GrantFiled: November 17, 2008Date of Patent: May 25, 2010Assignees: The Regents of the University of California, Japan Science and Technology AgencyInventors: Hisashi Masui, Shuji Nakamura, Steven P. DenBaars
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Patent number: 7723146Abstract: An integrated circuit package system is provided including providing a wafer including image sensor systems having interconnects connected thereto and encapsulating the image sensor systems and interconnects in a transparent encapsulant. The system includes removing a portion of the transparent encapsulant to expose portions of the interconnects and singulating the wafer to form image sensor devices including at least one of the image sensor systems and a number of the interconnects.Type: GrantFiled: January 4, 2006Date of Patent: May 25, 2010Assignee: Stats Chippac Ltd.Inventors: Seng Guan Chow, Heap Hoe Kuan
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Patent number: 7718451Abstract: A method for patterned metallization of a plastic-containing body, which comprises the steps of producing the body via a two-component injection-molding process with at least two plastics, one of which is non-metallizable, and metallizing the body in such a way that a metallized region and a non-metallized region are formed, wherein the non-metallized region is determined by the non-metallizable plastic. A method for the patterned metallization of a plastic-containing body in particular a package body for an optoelectronic device is also provided.Type: GrantFiled: July 23, 2007Date of Patent: May 18, 2010Assignee: Osram Opto Semiconductor GmbHInventors: Thomas Höfer, Herbert Brunner, Frank Möllmer, Günter Waitl, Rainer Sewald, Markus Zeiler
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Patent number: 7704761Abstract: Disclosed is a manufacturing method of a light emitting diode. The manufacturing method comprises the steps of preparing a substrate and mounting light emitting chips on the substrate. An intermediate plate is positioned on the substrate. The intermediate plate has through-holes for receiving the light emitting chips and grooves for connecting the through-holes to one another on its upper surface. A transfer molding process is performed with a transparent molding material by using the grooves as runners to form first molding portions filling the through-holes. Thereafter, the intermediate plate is removed, and the substrate is separated into individual light emitting diodes. Accordingly, it is possible to provide a light emitting diode in which the first molding portion formed through a transfer molding process is positioned within a region encompassed by cut surfaces of the substrate.Type: GrantFiled: August 17, 2006Date of Patent: April 27, 2010Assignee: Seoul Semiconductor Co., Ltd.Inventors: Sang Min Lee, Hyuck Jung Choi, Won Il Kim
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Publication number: 20100099206Abstract: A manufacturing method of a thin film transistor array substrate is provided. In the method, a substrate having a display region and a sensing region is provided. At least a display thin film transistor is formed in the display region, a first sensing electrode is formed in the sensing region, and an inter-layer dielectric layer is disposed on the substrate, covers the display thin film transistor, and exposes the first sensing electrode. A patterned photo sensitive dielectric layer is then formed on the first sensing electrode. A patterned transparent conductive layer is subsequently formed on the substrate, wherein the patterned transparent conductive layer includes a pixel electrode coupled to the corresponding display thin film transistor and includes a second sensing electrode located on the patterned photo sensitive dielectric layer. A manufacturing method of a liquid crystal display panel adopting the aforementioned thin film transistor array substrate is also provided.Type: ApplicationFiled: December 22, 2009Publication date: April 22, 2010Applicant: AU OPTRONICS CORPORATIONInventors: An-Thung Cho, Chia-Tien Peng, Yuan-Jun Hsu, Ching-Chieh Shih, Chien-Sen Weng, Kun-Chih Lin, Hang-Wei Tseug, Ming-Huang Chuang
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Publication number: 20100096640Abstract: Optical analysis system fluidically self-assembled using shape-coded freestanding optoelectronic components and a template having shape-coded recessed binding sites connected by an embedded interconnect network. Also includes methods of manufacture and use for optical analyses.Type: ApplicationFiled: July 2, 2009Publication date: April 22, 2010Applicant: WASHINGTON, UNIVERSITY OFInventors: Samuel Kim, Babak Amirparviz, Deirdre Meldrum, Ehsan Saeedi
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Patent number: 7700385Abstract: A method of manufacturing an electro-optical device, the electro-optical device having an electro-optical element formed by laminating a first electrode, an electro-optical layer, and a second electrode in sequence on a base body, the method of manufacturing the electro-optical device, including the steps of: forming an ultraviolet absorbing layer on the substrate by a vapor deposition method so as to cover the electro-optical element; and forming a gas barrier layer by a vapor deposition method using plasma so as to cover the ultraviolet absorbing layer.Type: GrantFiled: January 30, 2007Date of Patent: April 20, 2010Assignee: Seiko Epson CorporationInventor: Kenji Hayashi
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Publication number: 20100093117Abstract: A method for making a liquid crystal display screen is provided. The method includes the following steps. A touch panel and a thin film transistor panel are provided, and the touch panel includes at least one TP carbon nanotube layer. The thin film transistor panel includes a plurality of thin film transistors; each of the thin film transistors comprises a TFT carbon nanotube layer. A first polarizer is applied on a surface of the touch panel. Additionally, a liquid crystal layer is provided to be placed between the first polarizer and the thin film transistor panel.Type: ApplicationFiled: September 3, 2009Publication date: April 15, 2010Applicants: Tsinghua University, HON HAI Precision Industry CO., LTD.Inventors: Kai-Li Jiang, Liang Liu, Shou-Shan Fan, Ga-Lane Chen, Jia-Shyong Cheng, Jeah-Sheng Wu
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Patent number: 7696003Abstract: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, a substrate, and at least one bond wire. The substrate has a reduced-thickness base adjacent terminals of the microelectronic component and a body having a contact surface spaced farther from the microelectronic component than a bond pad surface of the base. The bond wire couples the microelectronic component to a bond pad carried by the bond pad surface and has a maximum height outwardly from the microelectronic component that is no greater than the height of the contact surface from the microelectronic component.Type: GrantFiled: March 12, 2008Date of Patent: April 13, 2010Assignee: Micron Technology, Inc.Inventors: Eric Swee Seng Tan, Edmund Kwok Chung Low
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Patent number: 7691652Abstract: An encapsulated calorimetric flow meter according to the present invention comprises an integrated circuit (104) mounted on a lead frame (102). The integrated circuit has a channel (105) provided in its lower face, the channel being aligned with two holes (103) provided in the lead frame, the holes coinciding with the ends of the channel (105). There are further slots (111) in the lead frame (102) alongside the integrated circuit to thermally isolate it from the rest of the lead frame (102), which acts as a heat sink to keep the entry and exit fluid at ambient temperature. The flow meter is manufactured by mounting the integrated circuit (104) on to a suitable lead frame (102). The assembly of integrated circuit (104) and lead frame (102) is then inverted and blobs of gel (112, 114) are then deposited onto the lead frame (102) covering the holes (103). The assembly is then inserted into a mould (100) and encapsulated within a suitable mould compound.Type: GrantFiled: April 2, 2004Date of Patent: April 6, 2010Assignee: Melexis NVInventor: Appolonius Jacobus Van Der Wiel
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Publication number: 20100078655Abstract: The present invention comprises a first substrate with a die formed on a die metal pad, a first and a second wiring circuits formed on the surfaces of the first substrate. A second substrate has a die opening window for receiving the die, a third wiring circuit is formed on top surface of the second substrate and a fourth wiring circuit on bottom surface of the second substrate. An adhesive material is filled into the gap between back side of the die and top surface of the first substrate and between the side wall of the die and the side wall of the die receiving through hole and the bottom side of the second substrate. During the formation, laser is introduced to cut the backside of the first substrate and an opening hole is formed in the first substrate to expose a part of the backside of the Au or Au/Ag metal layer of chip/die.Type: ApplicationFiled: December 2, 2009Publication date: April 1, 2010Inventor: Wen-Kun Yang
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Patent number: 7682850Abstract: A white light LED for use in backlighting or otherwise illuminating an LCD is described where the white light LED comprises a blue LED over which is affixed a preformed red phosphor platelet and a preformed green phosphor platelet. In one embodiment, to form a platelet, a controlled amount of phosphor powder is placed in a mold and heated under pressure to sinter the grains together. The platelet can be made very smooth on all surfaces. A UV LED may also be used in conjunction with red, green, and blue phosphor plates. The LED dies vary in color and brightness and are binned in accordance with their light output characteristics. Phosphor plates with different characteristics are matched to the binned LEDs to create white light LEDs with a consistent white point for use in backlights for liquid crystal displays.Type: GrantFiled: March 17, 2006Date of Patent: March 23, 2010Assignee: Philips Lumileds Lighting Company, LLCInventors: Gerard Harbers, Serge Bierhuizen, Mark Pugh
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Publication number: 20100065834Abstract: An integrated organic photovoltaic and electroluminescent device includes an organic light emitting diode and an organic photovoltaic. The OLED and the OPV share a common substrate building layer.Type: ApplicationFiled: September 15, 2009Publication date: March 18, 2010Inventor: Troy D. Hammond
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Patent number: 7678591Abstract: For producing semiconductor chips by thin-film technology, an active layer (2) that has been grown on a substrate, with contact layers on the back side that have a base layer (3), is reinforced by a reinforcement layer (4). Next, an auxiliary carrier layer (5) is applied, which makes the further processing of the active layer (2) possible. The reinforcement layer (4) and the auxiliary carrier layer (5) replace the mechanical carriers used in conventional methods.Type: GrantFiled: July 18, 2001Date of Patent: March 16, 2010Assignee: Osram GmbHInventor: Stefan Illek
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Patent number: 7679167Abstract: A package module for an image sensor device is disclosed. The package module comprises a device chip disposed between lower and upper substrates. A first conductive layer is over a first sidewall of the lower substrate and insulated from the device chip. A first protective layer is on the first conductive layer and exposes a portion of the first conductive layer over the first sidewall of the lower substrate. A first pad is on the bottom surface of the lower substrate and is electrically connected to the first conductive layer. The invention also discloses an electronic assembly for an image sensor device and a fabrication method thereof.Type: GrantFiled: February 16, 2007Date of Patent: March 16, 2010Assignee: Visera Technologies Company, LimitedInventors: Teng-Sheng Chen, Pai-Chun Peter Zung, Tzu-Han Lin, Shin-Chang Shiung
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Patent number: 7678667Abstract: A method of bonding an integrated circuit to a substrate is provided. The integrated circuit is one of a plurality of integrated circuits, each having a respective frontside releasably attached to a film frame tape supported by a wafer film frame. The method comprises the steps of: (a) positioning a substrate at a backside of the integrated circuit; (c) positioning a bonding tool on a zone of the film frame tape, the zone being aligned with the integrated circuit; and (c) applying a bonding force from the bonding tool, through the film frame tape and the integrated circuit, onto the substrate.Type: GrantFiled: June 20, 2007Date of Patent: March 16, 2010Assignee: Silverbrook Research Pty LtdInventors: Roger Mervyn Lloyd Foote, Kia Silverbrook
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Publication number: 20100061211Abstract: An optical pickup (10) includes a light emitting element (11), a holding member (14), a light receiving element (18), and a base (13). The holding member (14) is fixed to the base (13) by a combined bonding portion (17). The combined bonding portion (17) is sandwiched between the holding member (14) and the base (13) so as to fix the holding member (14) to the base (13). The combined bonding portion (17) includes a first bonding portion (15) composed of a first adhesive and a second bonding portion (16) composed of a second adhesive having a higher curing shrinkage rate than the first adhesive. The first bonding portion (15) and the second bonding portion (16) are each sandwiched between the holding member (14) and the base (13), and the second bonding portion (16) is provided to cover at least a part of an outer peripheral surface of the first bonding portion (15). A difference between the curing shrinkage rate of the first adhesive and that of the second adhesive is 3.0% or less.Type: ApplicationFiled: August 27, 2009Publication date: March 11, 2010Applicant: PANASONIC CORPORATIONInventors: Masatoshi YAJIMA, Kenji MATSUMURA, Hideki HAYASHI, Yoshiyuki HASHIMOTO
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Patent number: 7669320Abstract: A method for fabricating an IC support for supporting a first IC die connected in series with a second IC die; the IC support comprising a stack of alternating layers of copper features and vias in insulating surround, the first IC die being bondable onto the IC support, and the second IC die being bondable within a cavity inside the IC support, wherein the cavity is formed by etching away a copper base and selectively etching away built up copper.Type: GrantFiled: April 19, 2007Date of Patent: March 2, 2010Assignee: Amitec-Advanced Multilayer Interconnect Technologies Ltd.Inventors: Dror Hurwitz, Mordechay Farkash, Eva Igner, Boris Statnikov, Benny Michaeli
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Patent number: 7670860Abstract: A method of manufacturing a semiconductor device, the semiconductor device comprising: a semiconductor substrate; a pixel portion including an in-layer lens; and a peripheral circuit portion including a metal wiring portion, the pixel portion and the peripheral circuit portion being on the semiconductor substrate, the method comprising: forming an insulating film in the pixel portion and the peripheral circuit portion, so as to cover the metal wiring portion; providing, on the insulating film, a lens material layer for forming the in-layer lens; forming a resist layer for etching the lens material layer; curing the resist layer; and forming a first region and a second region in the resist layer, wherein a portion of the resist layer in the first region is thicker than that of the resist layer in the second region, the first region being in the peripheral circuit portion and the second region being in the pixel portion.Type: GrantFiled: April 30, 2007Date of Patent: March 2, 2010Assignee: FUJIFILM CorporationInventor: Takeo Yoshida
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Patent number: 7662655Abstract: A method for forming a vibrating micromechanical structure having a single crystal silicon (SCS) micromechanical resonator formed using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; windows are opened in the active layer of the resonator wafer; masking the active layer of the resonator wafer with photoresist; a SCS resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist is subsequently dry stripped. A patterned SCS cover is bonded to the resonator wafer resulting in hermetically sealed chip scale wafer level vacuum packaged devices.Type: GrantFiled: June 30, 2008Date of Patent: February 16, 2010Assignee: Honeywell International Inc.Inventors: Ijaz H. Jafri, Galen P. Magendanz
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Patent number: 7662661Abstract: A method of manufacturing a substrate structure includes the steps of: (1) providing a metal substrate having a metal portion; (2) chemically etching a plurality of trenches in the metal substrate; (3) applying a polymer composite material into the trenches to form a substrate having a polymer composite portion abutted to the metal portion; (4) polishing a surface of the substrate to make a height of the polymer composite portion equal to that of the metal portion; (5) forming a covering material on the surface of the substrate; and (6) cutting the substrate via the polymer composite portion for decreasing cutting bur produced on the metal portion. Furthermore, the method is provided for combining the metal substrate and the polymer composite material, thereby to increase cutting precision and strength of the substrate structure.Type: GrantFiled: December 16, 2005Date of Patent: February 16, 2010Assignee: Harvatek CorporationInventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
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Patent number: 7662654Abstract: A method for forming a vibrating micromechanical structure having a single crystal silicon (SCS) micromechanical resonator formed using a two-wafer process, including either a Silicon-on-insulator (SOI) or insulating base and resonator wafers, wherein resonator anchors, capacitive air gap, isolation trenches, and alignment marks are micromachined in an active layer of the base wafer; the active layer of the resonator wafer is bonded directly to the active layer of the base wafer; the handle and dielectric layers of the resonator wafer are removed; windows are opened in the active layer of the resonator wafer; masking the active layer of the resonator wafer with photoresist; a SCS resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist is subsequently dry stripped. A patterned SCS cover is bonded to the resonator wafer resulting in hermetically sealed chip scale wafer level vacuum packaged devices.Type: GrantFiled: June 30, 2008Date of Patent: February 16, 2010Assignee: Honeywell International Inc.Inventors: Ijaz H. Jafri, Galen P. Magendanz
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Patent number: 7663150Abstract: An optoelectronic chip having a semiconductor body (14), which contains a radiation-emitting region (2), and a partial region (3) in which the surface (13) of the semiconductor body (14) is curved convexly toward a carrier (10). The lateral extent (2r) of the radiation-emitting region (2) is less than the lateral extent (2R) of the partial region (3). A method for producing such a chip is also described.Type: GrantFiled: July 13, 2006Date of Patent: February 16, 2010Assignee: Osram Opto Semiconductors GmbHInventors: Ralph Wirth, Klaus Streubel
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Patent number: 7663210Abstract: Optical components are flip chip mounted onto a substrate for improved alignment. Each device is fabricated using “build-up” layers above a substrate. Each has an optical confinement region in which optical radiation travels in use, and a bonding surface. The overall depth of the layers above the optical confinement region is closely controlled during fabrication, for instance by the use a “spacer” layer, so that when the devices are subsequently flip chip mounted adjacent one another on a shared substrate by means of their bonding surfaces, they can be passively positioned so that their optical confinement regions abut and optical radiation can be coupled from one to the next in use.Type: GrantFiled: November 3, 2003Date of Patent: February 16, 2010Assignee: Optitune plcInventor: Ari Karkkainen
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Patent number: 7655486Abstract: A method of making an LED light emitting device is disclosed. The method includes forming a multilayer encapsulant in contact with an LED by contacting the LED with a first encapsulant that is a silicone gel, silicone gum, silicone fluid, organosiloxane, polysiloxane, polyimide, polyphosphazene, sol-gel composition, or a first photopolymerizable composition, and then contacting the first encapsulant with a second photopolymerizable composition. Each photopolymerizable composition includes a silicon-containing resin and a metal-containing catalyst, the silicon-containing resin comprising silicon-bonded hydrogen and aliphatic unsaturation. Actinic radiation having a wavelength of 700 nm or less is applied to initiate hydrosilylation within the silicon-containing resins.Type: GrantFiled: April 30, 2007Date of Patent: February 2, 2010Assignee: 3M Innovative Properties CompanyInventors: D. Scott Thompson, Larry D. Boardman, Catherine A. Leatherdale
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Publication number: 20100020311Abstract: The present disclosure relates to the integration of optical spectroscopy onto a nanoresonator for a sensitive means of selectively monitoring biological molecules. An apparatus and a method are provided for making an apparatus that is a sensor in which both mass detection using a quartz nanoresonator and optical detection using SERS is integrated onto at least one chip, thereby providing redundancy in detection of a species.Type: ApplicationFiled: June 14, 2007Publication date: January 28, 2010Inventors: Deborah Janice Kirby, Randall Lynn Kubena
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Patent number: 7651877Abstract: The present invention provides a two-dimensional image detecting apparatus including a mold structure which apparatus can be applied to mammography, and a manufacturing method thereof. The manufacturing method includes: a conversion layer formation step of forming a conversion layer (3) on an active matrix substrate (2); a counter substrate formation step of disposing a spacer material (5) and disposing the counter substrate (6) so as to be opposite to the active matrix substrate (2) via the spacer material (5); a mold resin layer formation step of forming a mold structure layer (8) in a space surrounded by the conversion layer (3), the spacer material (5), and the counter substrate (6); and a cutting step of cutting at least the active matrix substrate (2) so that cut surfaces of the constituent members are flush with each other; and a sealing step of securing a sealing material (7) to the cut surface.Type: GrantFiled: October 18, 2005Date of Patent: January 26, 2010Assignee: Sharp Kabushiki KaishaInventor: Yoshihiro Izumi
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Patent number: 7651878Abstract: Provided are a WLCSP of an image sensor and a method of manufacturing the same. The WLCSP includes a wafer, support members, glass, and metal bumps. The wafer has an image sensor and a pair of pads disposed thereon, a portion of the bottom surface of the image sensor being exposed outward from the both ends of the wafer. The support members are disposed on the pads to support the both bottom sides of the glass, the support members being formed to a predetermined thickness to provide a space for forming an air cavity. The glass is safely seated on the support members such that the air cavity is formed on the wafer. The metal bumps are disposed on the both sides of the wafer corresponding to the pads such that the bottom surfaces of the metal bumps protrude beyond the bottom surface of the wafer and form conductive lines electrically connected to the pads. Therefore, the package can be directly attached to a camera module even without using a separate PCB or ceramic substrate.Type: GrantFiled: September 25, 2006Date of Patent: January 26, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Jin Mun Ryu
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Patent number: 7638864Abstract: A digital camera module (100) includes a chip package (110) and a lens module (130), mounted on the chip package, for forming a focused image on the chip package. The chip package includes a supporter (112), a chip (114), a plurality of wires (116), a main adhesive (118), and a cover plate (119). The supporter includes a through hole defined therethrough and has a plurality of top contacts (1130) formed thereon around the through hole. The chip is disposed in the through hole and includes a plurality of pads (1144) arranged thereon. The wires electrically connect the pads to the top contacts. The main adhesive is applied to a gap between the chip and the supporter and fixes the chip to the supporter. The cover plate is adhered and supported on the main adhesive. A method for making the chip package is also provided.Type: GrantFiled: April 2, 2007Date of Patent: December 29, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Ying-Cheng Wu, Chun-Hung Lin
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Publication number: 20090315041Abstract: There is provided an optical member 1 in which a fixation member 3 supporting the light emitting member 2 is fixed to a housing 5 supporting a light receiving member 4, so as to have clearances between the fixation member 3 and the housing 5, by photocurable resin 6 bridging the clearances, recesses 7 that adjoin positions where the photocurable resin 6 is deposited, that are opened so as to allow casting of light into the recesses 7, and that are to receive portions of the photocurable resin 6 are formed on the housing 5.Type: ApplicationFiled: June 5, 2009Publication date: December 24, 2009Applicant: Konica Minolta Business Technologies, Inc.Inventors: Daisuke FUJITA, Yasushi Ishihara
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Patent number: 7632707Abstract: The present invention discloses an electronic device package and a method of the package. In particular, an electronic device package and a method of the package suitable for a bumpless electronic device package with enhanced electrical performance and heat-dissipation efficiency are disclosed. The method comprises: providing a substrate having a plurality of vias and a plurality of electronic devices; forming a gluing layer on a surface of the substrate and fixing the electronic devices on the gluing layer, wherein the electronic devices have I/O units aligned with the vias respectively; forming a plurality of fixing layers in the gaps between the electronic devices; trenching a plurality of openings aligned with the vias respectively in the fixing layer; forming a plurality of metallic conductive units in the vias, the openings and part of the surface of the substrate; and forming a passivation layer over the other surface of the substrate.Type: GrantFiled: November 9, 2005Date of Patent: December 15, 2009Assignee: Industrial Technology Research InstituteInventors: Shou-Lung Chen, Ching-Wen Hsiao, Yu-Hua Chen, Jeng-Dar Ko, Jyh-Rong Lin
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Publication number: 20090302329Abstract: The invention is directed to providing a smaller semiconductor device formed as an optical sensor including a light receiving portion and a light emitting portion. A light receiving portion and a light emitting portion are disposed on a front surface of a semiconductor substrate for forming a semiconductor die, and a supporting body is attached to these so as to face these with an adhesive being interposed therebetween. A first opening exposing the light receiving portion from the front side of the supporting body is provided, and in a separated position therefrom, a second opening exposing the light emitting portion from the front side of the supporting body is provided. A first electrode and a second electrode are further disposed on the front surface of the semiconductor substrate, and bump electrodes electrically connected to these are disposed on the back surface of the semiconductor substrate.Type: ApplicationFiled: June 2, 2009Publication date: December 10, 2009Applicants: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.Inventors: Takashi NOMA, Hiroyuki SHINOGI
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Publication number: 20090275152Abstract: The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.Type: ApplicationFiled: December 8, 2005Publication date: November 5, 2009Applicants: E2V SEMICONDUCTORS, TRACIT TECHNOLOGIESInventors: Philippe Rommeveaux, Bernard Aspar
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Publication number: 20090261352Abstract: A light emitting module includes a dielectric substrate, a solar cell unit, a metal pattern layer, light emitting units, and a power storage component. The dielectric substrate has a first surface and a second surface opposite to the first surface. The solar cell unit is positioned on the first surface. The metal pattern layer is positioned on the second surface. The light emitting units is positioned on the metal pattern layer. The power storage component includes a power charge port electrically coupled to the solar cell unit, and a power supply port electrically coupled to the metal pattern layer.Type: ApplicationFiled: October 30, 2008Publication date: October 22, 2009Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: GA-LANE CHEN
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Publication number: 20090236613Abstract: According to the present invention, a protective seal S1 for protecting a transparent member 11 is composed of an organic base 16, adhesive layers 17, and a second adhesive layer 18 having low adhesion. The adhesive layers 17 are provided only on edges corresponding, on the organic base 16, to sides 11b of the transparent member and the second adhesive layer 18 is provided on a portion corresponding, on the organic base 16, to a surface 11a of the transparent member. The organic base is fixed to the sides 11b and the surface 11a of the transparent member 11 with the adhesive layers 17 and 18.Type: ApplicationFiled: March 20, 2009Publication date: September 24, 2009Applicant: Panasonic CorporationInventors: Tetsumasa Maruo, Masanori Minamio, Satoru Waga, Tetsushi Nishio
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Publication number: 20090238233Abstract: Optical die structures and associated package substrates are generally described. In one example, an electronic device includes a package substrate having a package substrate core, a dielectric layer coupled with the package substrate core, and one or more input/output (I/O) optical fibers coupled with the package substrate core or coupled with the build-up dielectric layer, or combinations thereof, the one or more I/O optical fibers to guide I/O optical signals to and from the package substrate wherein the one or more I/O optical fibers allow both input and output optical signals to travel through the one or more I/O optical fibers.Type: ApplicationFiled: March 20, 2008Publication date: September 24, 2009Inventors: Omar Bchir, Islam Salama, Charan Gurumurthy, Houssam Jomaa, Ravi Nalla
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Patent number: 7592636Abstract: A radiation-emitting semiconductor component having a radiation-transmissive substrate (1), on the underside of which a radiation-generating layer (2) is arranged, in which the substrate (1) has inclined side areas (3), in which the refractive index of the substrate (1) is greater than the refractive index of the radiation-generating layer, in which the difference in refractive index results in an unilluminated substrate region (4), into which no photons are coupled directly from the radiation-generating layer, and in which the substrate (1) has essentially perpendicular side areas (5) in the unilluminated region. The component has the advantage that it can be produced with a better area yield from a wafer.Type: GrantFiled: September 23, 2003Date of Patent: September 22, 2009Assignee: Osram Opto Semiconductors GmbHInventors: Johannes Baur, Dominik Eisert, Michael Fehrer, Berthold Hahn, Volker Harle
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Publication number: 20090230408Abstract: An optical device includes a semiconductor substrate including a device region formed thereon, the device region including at least one of a light-receiving region and a light-emitting region; a light-transmissive flattening film covering the device region, and including a first concave portion located in a region on an outer side of the device region; a light-transmissive member formed on the light-transmissive flattening film; and a light-transmissive adhesive layer bonding together the light-transmissive flattening film and the light-transmissive member, and filling the first concave portion.Type: ApplicationFiled: March 2, 2009Publication date: September 17, 2009Inventors: Hu Meng, Hiroto Ohsaki
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Patent number: 7588951Abstract: A method of packaging a first device having a first major surface and a second major surface includes forming a first layer over a second major surface of the first device and around sides of the first device and leaving the first major surface of the first device exposed, wherein the first layer is selected from the group consisting of an encapsulant and a polymer; forming a first dielectric layer over the first major surface of the first device, forming a via in the first dielectric layer, forming a seed layer within the via and over a portion of the first dielectric layer, physically coupling a connector to the seed layer, and plating a conductive material over the seed layer to form a first interconnect in the first via and over a portion of the first dielectric layer.Type: GrantFiled: November 17, 2006Date of Patent: September 15, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Marc A. Mangrum, Kenneth R. Burch
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Patent number: 7579198Abstract: An exemplary method for making a backlight module, the method includes steps in following order: providing a transparent base sheet and at least one light emitting diode; punching the base sheet to form an aperture therein; fixing the at lease one light emitting diode in the aperture, the at least one light emitting diode and an inner side surface of the aperture cooperatively defining a space; injecting an adhesive into the space between the at least one light emitting diode and the inner side surface of the aperture; solidifying the adhesive; and trimming the base sheet with the at least one light emitting diode in the aperture to form the backlight module.Type: GrantFiled: March 29, 2007Date of Patent: August 25, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Ming-Fu Hsu
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Patent number: 7575944Abstract: Provided is a method of manufacturing a nitride-based semiconductor LED including sequentially forming an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on a substrate; forming a Pd/Zn alloy layer on the p-type nitride semiconductor layer; heat-treating the p-type nitride semiconductor layer on which the Pd/Zn alloy layer is formed; removing the Pd/Zn alloy layer formed on the p-type nitride semiconductor layer; mesa-etching portions of the p-type nitride semiconductor layer, the active layer, and the n-type nitride semiconductor layer such that a portion of the upper surface of the n-type nitride semiconductor layer is exposed; and forming an n-electrode and a p-electrode on the exposed n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.Type: GrantFiled: August 13, 2007Date of Patent: August 18, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Sun Woon Kim, Seong Ju Park, Ja Yeon Kim, Min Ki Kwon, Dong Ju Lee, Jae Ho Han
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Patent number: 7572654Abstract: An exemplary light emitting diode (30) includes a light output unit (31), an optical lens (33) and a reflective film (35). The optical lens includes a light input surface (331) facing the light output unit, a top interface (333) opposite to the light input surface, and a light output surface (335) between the light input surface and the top interface. The reflective film is integrally formed on and in immediate contact with the top interface of the optical lens. The reflective film is made of a transparent resin matrix material dispersed with a plurality of reflective particles. A method for making the light emitting diode is also provided.Type: GrantFiled: December 14, 2006Date of Patent: August 11, 2009Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Shao-Han Chang
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Patent number: 7573074Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination.Type: GrantFiled: May 19, 2006Date of Patent: August 11, 2009Assignee: Bridgelux, Inc.Inventors: Frank T. Shum, William W. So, Steven D. Lester
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Patent number: 7569420Abstract: A packaging structure and method for a light emitting diode is provided. The present invention uses flip-chip and eutectic bonding technology to attach a LED to a thermal and electrical conducting substrate. The flip-chip packaging structure comprises a thermal and electrical conducting substrate having an insulating layer formed in an appropriate area on the top surface of the substrate and a bonding pad formed on top of the insulating layer; and a LED reversed in a flip-chip style and joined to the substrate by eutectic bonding. A first electrode of the LED is eutectically bonded to an appropriate area on the top surface of the substrate via a eutectic layer, while a second electrode of the LED is electrically connected to the bonding pad.Type: GrantFiled: May 7, 2008Date of Patent: August 4, 2009Assignee: Huga Optotech Inc.Inventor: Ching-Wen Tung
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Patent number: 7566588Abstract: To provide a semiconductor device 10, which is thin, compact, and excellent in mechanical strength and humidity resistance. Semiconductor device 10A has a configuration such that in semiconductor device 10A, wherein an optical semiconductor element 14, having a light receiving part or a light emitting part, is sealed in a sealing resin 13, a cover layer 12, covering the top surface of optical semiconductor element 14, is exposed from the top surface of sealing resin 13. Thus in comparison to a related-art example with which the entirety is sealed by a transparent resin, sealing resin 13 can be formed thinly and the thickness of the entire device can be made thin. Furthermore, semiconductor device 10 is arranged using a sealing resin having a filler mixed in. A semiconductor device that is excellent in mechanical strength and humidity resistance can thus be arranged.Type: GrantFiled: October 13, 2006Date of Patent: July 28, 2009Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.Inventors: Koujiro Kameyama, Kiyoshi Mita