Abstract: An image sensor pixel includes a photosensitive element, a floating diffusion (“FD”) region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The FD region is disposed in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the FD region to selectively transfer the image charge from the photosensitive element to the FD region. The transfer device includes a gate, a buried channel dopant region and a surface channel region. The gate is disposed between the photosensitive element and the FD region. The buried channel dopant region is disposed adjacent to the FD region and underneath the gate. The surface channel region is disposed between the buried channel dopant region and the photosensitive element and disposed underneath the gate.

Abstract: In a manufacturing method of a solid-state image pickup device according to an embodiment, a transfer gate electrode is formed in a predetermined position on an upper surface of a first conductive semiconductor area, through a gate insulating film. A second conductive charge storage area is formed in an area adjacent to the transfer gate electrode in the first conductive semiconductor area. A sidewall is formed on a side surface of the transfer gate electrode. An insulating film is formed to extend from a circumference surface of the sidewall on a side of the charge storage area to a position partially covering the upper part of the charge storage area. A first conductive charge storage layer is formed in the charge storage area by implanting first conductive impurities from above, into the charge storage area which is partially covered with the insulating film.

Abstract: In a manufacturing method of a solid-state image pickup device according to an embodiment, a transfer gate electrode is formed in a predetermined position on an upper surface of a first conductive semiconductor area, through a gate insulating film. A second conductive charge storage area is formed in an area adjacent to the transfer gate electrode in the first conductive semiconductor area. A sidewall is formed on a side surface of the transfer gate electrode. An insulating film is formed to extend from a circumference surface of the sidewall on a side of the charge storage area to a position partially covering the upper part of the charge storage area. A first conductive charge storage layer is formed in the charge storage area by implanting first conductive impurities from above, into the charge storage area which is partially covered with the insulating film.

Abstract: According to an embodiment of the present invention, a solid-state imaging device is provided. The solid-state imaging device includes a plurality of photoelectric conversion devices and an amplifier transistor. The plurality of photoelectric conversion devices photoelectrically converts an incident beam into signal charges. The amplifier transistor is provided on a face on the opposite side of the light incidence plane of the photoelectric conversion devices through an interlayer insulating film as the amplifier transistor is laid over the photoelectric conversion devices. The amplifier transistor has the area of a channel greater than the area of the incidence plane of a single photoelectric conversion device, and the amplifier transistor amplifies the signal charges.

Abstract: A flat panel detector comprises a photoelectric conversion layer and a pixel detecting element disposed under the photoelectric conversion layer. The pixel detecting element comprises: a pixel electrode for receiving charges, a storage capacitor for storing the received charges, and a thin film transistor for controlling outputting of the stored charges. The storage capacitor comprises a first electrode and a second electrode. The first electrode comprises an upper electrode and a bottom electrode that are disposed opposite to each other and electrically connected. A second electrode is sandwiched between the upper electrode and the bottom electrode. It is insulated between the upper electrode and the second electrode and between the second electrode and the bottom electrode.

Abstract: A CMOS image sensor has a photodiode including first and second impurity layers sequentially formed on a substrate, an isolation layer on the second impurity layer, and a transfer gate structure through the second impurity layer. The transfer gate structure contacts a top surface of the first impurity layer and a portion of the second impurity layer and includes a bottom surface having a step shape.

Abstract: A method of forming an integrated circuit structure includes providing a silicon substrate, and implanting a p-type impurity into the silicon substrate to form a p-type region. After the step of implanting, performing an anneal to form a silicon oxide region, with a portion of the p-type region converted to the silicon oxide region.

Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.

Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.

Abstract: A solid-state imaging apparatus 100a comprises: photoelectric conversion elements PD1 and PD2 formed within a first conductivity type semiconductor substrate 100; and transfer transistors Tt1 and Tt2 formed on a first main surface of the semiconductor substrate 100, for transferring the signal charge generated by the photoelectric conversion elements outside the photoelectric conversion elements. The gate electrode 107 of each of the transfer transistors is configured to be disposed over a surface of a first main surface side of an electric charge accumulating region 102, which configures each of the photoelectric conversion elements PD1 and PD2. As a result, a high-resolution image can be achieved, in which noises and afterimages are further suppressed.

Abstract: A solid-state imaging device includes an element forming region on the surface of a substrate, element isolating parts that isolate pixels, each of which is formed with a trench and a buried film, an opto-electric conversion element, and a buried-channel MOS transistor. The buried-channel MOS transistor includes a source region and a drain region, formed in the element forming region, that have a conductivity type opposite to that of the element forming region, a channel region having first and second impurity diffusion regions, which have a conductivity type opposite to that of the element forming region, and a gate electrode. Each first impurity diffusion region is formed between the source region and drain region on a side adjacent to one element isolating part. The second impurity diffusion region is formed across the region between the source region and drain region.

Abstract: A CMOS multi-pinned pixel having very low dark current and very high charge transfer performance over that of conventional CMOS pixels is disclosed. The CMOS pixel includes epitaxial silicon and at least one transfer gate formed upon the epitaxial silicon. A pinned-photodiode is formed in the epitaxial silicon. A multi-pinned (MP) implant layer is implanted in the epitaxial silicon at least partially extending across the pinned-photodiode and substantially underlying the at least one transfer gate of the CMOS pixel to promote dark current passivation during an accumulation state and promote charge transfer during a transfer state.

Abstract: Provided is a solid-state imaging device including: a first-conductivity-type substrate; a second-conductivity-type well formed in a surface side of the first-conductivity-type substrate; a photoelectric conversion area configured with a first-conductivity-type-impurity area formed in the second-conductivity-type well to convert incident light to charges; a first-conductivity-type-charge retaining area configured with the first-conductivity-type-impurity area formed in the second-conductivity-type well to retain the charges converted by the photoelectric conversion area until the charges are read out; a charge voltage conversion area configured with the first-conductivity-type-impurity area formed in the second-conductivity-type well to convert the charges retained in the charge retaining area to a voltage; and a first-conductivity-type-layer area configured by forming a first-conductivity-type-in a convex shape from a boundary between the first-conductivity-type substrate and the second-conductivity-type wel

Abstract: A conductive light shield is formed over a first dielectric layer of a via level in a metal interconnect structure. The conductive light shield is covers a floating drain of an image sensor pixel cell. A second dielectric layer is formed over the conductive light shield and at least one via extending from a top surface of the second dielectric layer to a bottom surface of the first dielectric layer is formed in the metal interconnect structure. The conductive light shield may be formed within a contact level between a top surface of a semiconductor substrate and a first metal line level, or may be formed in any metal interconnect via level between two metal line levels. The inventive image sensor pixel cell is less prone to noise due to the blockage of light over the floating drain by the conductive light shield.

Abstract: A method of manufacturing an active pixel sensor having a plurality of pixels, each of the pixels having a photodiode formed by a part of a first semiconductor region of a first conductive type and a second semiconductor region of a second conductive type, and a transfer transistor for transferring a charge carrier from the photodiode, includes the steps of preparing a substrate on which the first semiconductor region of the first conductive type is formed, forming a mask to form the second semiconductor region on the substrate, forming the second semiconductor region using the mask, and forming a gate of the transferring transistor after forming the second semiconductor region. The gate of the transferring transistor overlaps the second semiconductor region in a planar view.

Abstract: The present disclosure relates to integrated circuits having tamper detection and response devices and methods for manufacturing such integrated circuits. One integrated circuit having a tamper detection and response device includes at least one photovoltaic cell and at least one memory cell coupled to the at least one photovoltaic cell. When the at least one photovoltaic cell is exposed to radiation, the at least one photovoltaic cell generates a current that causes an alteration to a memory state of the at least one memory cell. Another integrated circuit having a tamper detection and response device includes at least one photovoltaic cell and a reactive material coupled to the at least one photovoltaic cell, wherein a current from the at least one photovoltaic cell triggers an exothermic reaction in the reactive material.

Abstract: A method for manufacturing a solid-state image sensor includes forming a gate electrode structure including a gate electrode on a gate insulating film formed on a semiconductor substrate, and implanting ions into a first region and simultaneously implanting the ions into a second region of the semiconductor substrate via the gate electrode structure and the gate insulating film, wherein the first region is a region where a charge accumulation region is to be formed, and the second region is a region where an extended region that extends from the charge accumulation region to a portion below the gate electrode is to be formed, and a mean projected range of the ions in the step of simultaneous implanting of the ions into the first region and the second region is larger than a sum total of thicknesses of the gate electrode and the gate insulating film.

Abstract: Disclosed herein is a solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.

Abstract: A method of manufacturing a solid-state image sensor having a first charge accumulation region, a second charge accumulation region, includes implanting ions into a semiconductor substrate through first and second openings of a mask to form the first and second charge accumulation regions. The implanting ions includes a first implantation of implanting ions into a portion below a first transfer gate, and a second implantation of implanting ions into a portion below a second transfer gate in a direction different from a direction of the first implantation.

Abstract: A stacked image sensor and method for making the same are provided. The stacked image sensor includes an upper chip with a pixel array thereon. The second chip includes a plurality of column circuits and row circuits associated with the columns and rows of the pixel array and disposed in respective column circuit and row circuit regions that are arranged in multiple groups. Inter-chip bonding pads are formed on each of the chips. The inter-chip bonding pads on the second chip are arranged linearly and are contained within the column circuit regions and row circuit regions in one embodiment. In other embodiments, the inter-chip bonding pads are staggered with respect to each other. In some embodiments, the rows and columns of the pixel array include multiple signal lines and the corresponding column circuit regions and row circuit regions also include multiple inter-chip bonding pads.

Abstract: It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased.

Abstract: An exposure mask according to an embodiment of the invention includes a first transmission region where a plurality of dots through which light is shielded or transmitted are arrayed into a matrix form having rows and columns and a second transmission region where a plurality of dots through which the light is shielded or transmitted are arrayed into a matrix form having rows and columns and is disposed adjacent to the first transmission region. The dots arrayed in a row or a column of the first transmission region, which is adjacent to the second transmission region, have an area intermediate between areas of dots arrayed on both sides of the row or the column.

Abstract: An imaging device with (1) a substrate; (2) a substrate voltage supply that applies a first potential to the substrate during a light receiving period and applies a second potential to the substrate during a no-light receiving period; and (3) a plurality of pixels each including (a) a light conversion portion, (b) a storage portion that stores signal charges g from the light conversion portion when the first potential is applied to the substrate, (c) a first layer that is in the substrate and set apart from the storage portion by a predetermined distance and adjusts potential distribution in the substrate so that the signal charges generated in the light receiving portion when the second potential is applied to the substrate are swept to a rear surface side of the substrate, and (d) a vertical transfer portion that transfers a signal based on the signal charges in a vertical direction.

Abstract: In a semiconductor device in which a glass substrate is attached to a surface of a semiconductor die with an adhesive layer being interposed therebetween, it is an object to fill a recess portion of an insulation film formed on a photodiode with the adhesive layer without bubbles therein. In a semiconductor die in which an optical semiconductor integrated circuit including a photodiode having a recess portion of an interlayer insulation film in the upper portion, an NPN bipolar transistor, and so on are formed, generally, a light shield film covers a portion except the recess portion region on the photodiode and except a dicing region. In the invention, an opening slit is further formed in the light shield film, extending from the recess portion to the outside of the recess portion, so as to attain the object.

Abstract: In some embodiments, a metal insulator semiconductor heterostructure field effect transistor (MISHFET) is disclosed that has a source, a drain, an insulation layer, a gate dielectric, and a gate. The source and drain are on opposing sides of a channel region of a channel layer. The channel region is an upper portion of the channel layer. The channel layer comprises gallium nitride. The insulation layer is over the channel layer and has a first portion and a second portion. The first portion is nearer the drain than the source and has a first thickness. The second portion is nearer the source than drain and has the first thickness. The insulation layer has an opening through the insulation layer. The opening is between the first portion and the second portion.

Abstract: A device includes an image sensor chip including an image sensor therein. A read-out chip is underlying and bonded to the image sensor chip. The read-out chip includes a logic device selected from the group consisting essentially of a reset transistor, a source follower, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. A peripheral circuit chip is underlying and bonded to the read-out chip. The peripheral circuit chip includes a logic circuit, a through via penetrating through a semiconductor substrate of the peripheral circuit chip, and an electrical connector at a bottom surface of the peripheral circuit chip. The electrical connector is electrically coupled to the logic circuit in the peripheral circuit chip through the through via.

Abstract: A self-powered photodetector is provided including: a photovoltaic sensor element for generating an electrical charge under exposure to electromagnetic radiation; a charge storage section for accumulating the electrical charge generated by the photovoltaic sensor element; an electrical load configured to be powered by the accumulated electrical charge from the charge storage section and outputs a signal in response thereto, the signal being analyzable to determine a measurement of the electromagnetic radiation; and a switch for controlling a flow of the accumulated electrical charge from the charge storage section to the electrical load for powering the electrical load. There is also provided a wireless receiver for analyzing a signal from the self-powered photodetector to provide a measurement of the electromagnetic radiation, a photodetector system including the self-powered photodetector and the wireless receiver, and a method of fabricating the self-powered photodetector.

Abstract: A detection apparatus includes a plurality of pixels and a plurality of signal wires arranged on a substrate, in which each of the plurality of pixels includes a switch element arranged on the substrate and a conversion element arranged on the switch element, the conversion element includes a first electrode which is arranged on the switch element and electrically connected to the switch element and a semiconductor layer arranged over a plurality of the first electrodes, and a plurality of the switch elements is electrically connected to the plurality of signal wires, and the detection apparatus further includes a constant potential wire which is supplied with a constant potential, in which the first electrode is electrically connected to the constant potential wire in apart of pixels among the plurality of pixels.

Abstract: The amount of light incident on a photoelectric conversion element is increased while stray light from a backlight below a light-transmitting substrate is prevented from being incident on the photoelectric conversion element. A light-blocking film is formed with a color filter covering a photoelectric conversion element over a light-transmitting substrate and a color filter covering a photoelectric conversion element in an adjacent pixel which overlap each other at the side with respect to the direction in which light travels. In addition, by providing a microlens over the color filter, light which is conventionally not detected is collected to a photoelectric conversion element, and accordingly the amount of light incident on the photoelectric conversion element is increased.

Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.

Abstract: A solid-state imaging device includes: a plurality of substrates stacked via a wiring layer or an insulation layer; a light sensing section that is formed in a substrate, of the plurality of substrates, disposed on a light incident side and that generates a signal charge in accordance with an amount of received light; and a contact portion that is connected to a non-light incident-surface side of the substrate in which the light sensing section is formed and that supplies a desired voltage to the substrate from a wire in a wiring layer disposed on a non-light incident side of the substrate.

Abstract: A solid-state imaging device is provided, which includes a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged. In the solid-state imaging device, a transfer transistor of the pixel transistors includes: a transfer gate electrode extended in a surface of the substrate formed on the surface of a semiconductor substrate; and a transfer gate electrode buried in the substrate which is electrically insulated from the transfer gate electrode extended in a surface of the substrate and is embedded in the inside of the semiconductor substrate in the vertical direction through the transfer gate electrode extended in a surface of the substrate.

Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.

Abstract: A floating diffusion (331) is created substantially at center of the light-receiving surface of an embedded photodiode (31), with a gate electrode of a transfer transistor (32) surrounding the floating diffusion. The concentration (or depth) of impurities in a p+-type semiconductor region, n-type semiconductor region or p-well region is changed in an inclined form so that a potential gradient being inclined downwards from the circumference to the center is created when an appropriate bias voltage is applied to the pn junction. The photocharges produced by incident light are rapidly moved along the potential gradient toward the center. Even in the case where the photocharge storage time is short, the photocharges can be efficiently collected since the maximum moving distance from the circumference of the photodiode (31) to the floating diffusion (331). Thus, the photocharges produced by the photodiode (31) are efficiently utilized, whereby the detection sensitivity is improved.

Abstract: Device having reduced buffer leak on GaN substrate. In HEMT device, n-GaN (n-type GaN wafer) is used as substrate 11. Non-doped AlpGa1-pN layer with non-uniform composition p is formed on substrate 11 as buffer layer 12. On buffer layer 12, channel layer 13 of semi-insulating GaN and electron supply layer 14 of n-AlGaN are sequentially formed. In buffer layer 12, substrate connection region 121 where p=0 (GaN) is formed on lower end side, and active layer connection region 122 where value of p is also 0 (GaN) is formed on upper end side (channel layer 13 side). High Al composition region 123 where value of p is set to 1 (p=1) (AlN) is formed between substrate connection region 121 and active layer connection region 122. Resistivity of the high Al composition region 123 is highest in the buffer layer.

Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.

Abstract: In a method for manufacturing a semiconductor device according to an embodiment, an epitaxial semiconductor layer is epitaxially grown on a semiconductor substrate, a photoelectric converting portion is formed on the epitaxial semiconductor layer, a wiring layer is formed on the epitaxial semiconductor layer after forming the photoelectric converting portion, a support substrate is bonded onto the wiring layer, and the semiconductor substrate is etched from an opposite surface side to a side for the bonding after the bonding. In the method for manufacturing a semiconductor device, an amorphous Si layer is formed on the opposite surface side of the epitaxial semiconductor layer after the etching and an antireflection film and a color filter are formed on the amorphous Si layer in sequence.

Abstract: A novel photo-sensitive element for electronic imaging purposes and, in this context, is particularly suited for time-of-flight 3D imaging sensor pixels. The element enables charge-domain photo-detection and processing based on a single gate architecture. Certain regions for n and p-doping implants of the gates are defined. This kind of single gate architecture enables low noise photon detection and high-speed charge transport methods at the same time. A strong benefit compared to known pixel structures is that no special processing steps are required such as overlapping gate structures or very high-ohmic poly-silicon deposition. In this sense, the element relaxes the processing methods so that this device may be integrated by the use of standard CMOS technology for example. Regarding time-of-flight pixel technology, a major challenge is the generation of lateral electric fields. The element allows the generation of fringing fields and large lateral electric fields.

Abstract: A solid-state image pickup device in which electric charges accumulated in a photodiode conversion element are transferred to a second diffusion layer through a first diffusion layer.

Abstract: A method for manufacturing a conversion device is provided. Formed are an insulating layer that covers at least conversion portion is formed; a protection layer for suppressing formation of a metal-semiconductor compound layer, at a position where the protection layer covers the conversion portion via the insulating layer, covers at least part of an element isolation region, and exposes a transistor; and a metal film on the protection layer and the transistor. A metal-semiconductor compound layer on the transistor by performing heating process is formed. Metal that has not been reacted by the heating process is removed from the substrate. After that, an upper side in portions of the protection layer covering the conversion portion and the at least part of the element isolation region are removed.

Abstract: A solid-state image capturing device includes: a substrate; a substrate voltage source which applies a first potential to the substrate during a light reception period and applies a second potential to the substrate during a non-light reception period; and a plurality of pixels which each includes a light receiver which is formed on a front surface of the substrate and generates signal charges in accordance with received light, a storage capacitor which is formed adjacent to the light receiver and accumulates and stores signal charges generated by the light receiver, dark-current suppressors which are formed in the light receiver and the storage capacitor, an electronic shutter adjusting layer which is formed in an area facing the light receiver in the substrate and distant from the storage capacitor and which adjusts potential distribution, and a floating diffusion portion to which the signal charges accumulated in the storage capacitor are transmitted.

Abstract: A system and associated process for vapor deposition of a thin film layer on a photovoltaic (PV) module substrate is includes establishing a vacuum chamber and introducing the substrates individually into the vacuum chamber. A conveyor system is operably disposed within the vacuum chamber and is configured for conveying the substrates in a serial arrangement through a vapor deposition apparatus within the vacuum chamber at a controlled constant linear speed. A post-heat section is disposed within the vacuum chamber immediately downstream of the vapor deposition apparatus in the conveyance direction of the substrates. The post-heat section is configured to maintain the substrates conveyed from the vapor deposition apparatus in a desired heated temperature profile until the entire substrate has exited the vapor deposition apparatus.

Abstract: An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.

Abstract: An electromagnetic radiation detector includes a semiconductor substrate of a first doping type, a well in the semiconductor substrate of a second doping type, two or more detector terminal doping regions, two or more transfer gates, and a collection gate. The first and second doping type are different and the well includes a rising dopant concentration in a direction parallel to a surface of the semiconductor substrate. The two detector terminal doping regions are arranged at least partly in a terminal region of the well. The detection of the electromagnetic radiation is based on a generation of free charge carriers by the electromagnetic radiation in a detection region of the well. The transfer gates control a transfer of free charge carriers to be or not to be evaluated in a region of the well. The collection gate collects free charge carriers in the stated region of the well.

Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.

Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.

Abstract: Disclosed is a method for manufacturing a semiconductor device that can improve the performance of a photodiode that is formed on a same substrate as a thin film transistor without greatly deteriorating the productivity of the semiconductor device. On a glass substrate 30, a base layer 31 having a recess 33b on the surface is formed, and on the base layer 31, an amorphous silicon thin film 42 is formed. The amorphous silicon thin film 42 is melted to form a crystalline silicon thin film 43, while moving the molten silicon into the recess 33b. Of the silicon thin film 43, a silicon film 11 that constitutes a portion of a thin film transistor 10 is formed of the silicon thin film 43 in a part other than the recess 33b, while a silicon film 21 that constitutes a portion of a photodiode 20 is formed of the silicon thin film 43 in the recess 33b.

Abstract: Disclosed herein is a solid-state image pickup device, including a pixel, the pixel including: a light receiving section; a charge transfer path; a transfer electrode; a readout gate section; and a readout electrode.

Abstract: In various embodiments, a charge-coupled device includes channel stops laterally spaced away from the channel by fully depleted regions.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.