Abstract: Embodiments of the present disclosure provide a method for welding cell strings and a series welding machine. The method includes: forming an arrangement of a plurality of solar cells; inspecting the arrangement of the plurality of solar cells; providing a plurality of initial welding strips including first initial welding strips and second initial welding strips, the first initial welding strips interleave with the second initial welding strips in a first direction; cutting each of the first initial welding strips at first cutting positions, and cutting each of the second initial welding strips at second cutting positions, to obtain a plurality of welding strips; moving each welding strip in a second direction to form a set of welding strips; transferring the set of welding strips onto the arrangement of the plurality of solar cells; and welding the plurality of welding strips to corresponding solar cells to form a cell string.

Abstract: A strip-shaped electrode sheet includes an electrode foil including a strip-shaped foil exposed portion in which the electrode foil is exposed, a strip-shaped active material layer extending in a longitudinal direction, and a strip-shaped insulator layer containing insulating resin and formed on an insulator-layer support portion along a one-side layer edge portion of the active material layer and between the foil exposed portion of the electrode foil and an active-material-layer support portion. The insulator layer is located lower than a top face of the active material layer toward the electrode foil and includes a slant coating portion covering at least a lower portion of a one-side slant portion of the active material layer and a foil coating portion extending from the slant coating portion in a width-direction one side and covering the insulator-layer support portion of the electrode foil.

Abstract: A method of manufacturing transition metal chalcogenide thin films, includes the operations of forming a transition metal chalcogenides precursor on a substrate, and irradiating light onto the transition metal chalcogenides precursor. The transition metal chalcogenides precursor includes an amine-based ligand.

Abstract: An imaging device includes: a semiconductor substrate including a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type; a first plug that is connected to the first diffusion region and that contains a semiconductor; a second plug that is connected to the second diffusion region and that contains a semiconductor; and a photoelectric converter that is electrically connected to the first plug. An area of the second plug is larger than an area of the first plug in a plan view.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first voltage domain, a second voltage domain, and an isolation region that electrically isolates the first voltage domain and the second voltage domain in a lateral direction. The isolation region includes at least one deep trench isolation barrier. A layer stack is arranged on the semiconductor layer and includes a stack insulator layer, a first coil arranged in the stack insulator layer, and a second coil arranged in the stack insulator layer and laterally separated from the first coil in the lateral direction. The first and second coils are magnetically coupled to each other in the lateral direction. The first coil includes terminals arranged vertically over the first region and are electrically coupled to the first voltage domain, and the second coil includes terminals arranged vertically over the second region and are electrically coupled to the second voltage domain.

Abstract: A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.

Abstract: A solid-state imaging device includes: a first lens layer; and a second lens layer, wherein the second lens layer is formed at least at a periphery of each first microlens formed based on the first lens layer, and the second lens layer present at a central portion of each of the first microlenses is thinner than the second lens layer present at the periphery of the first microlens or no second lens layer is present at the central portion of each of the first microlenses.

Abstract: A photodetector includes a first cell converting incident light into electric charges; and a second cell converting incident light into electric charges; wherein the first cell includes a first semiconductor layer and a second semiconductor layer provided to be closer to a light incident side than the first semiconductor layer, wherein the second cell includes a third semiconductor layer and a fourth semiconductor layer provided to be closer to a light incident side than the third semiconductor layer, wherein a first interface between the third semiconductor layer and the fourth semiconductor layer is located to be closer to the light incident side than a second interface between the first semiconductor layer and the second semiconductor layer.

Abstract: An imaging device including a semiconductor substrate including a pixel region and a peripheral region; an insulating layer covering the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer covering the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry electrically connected to the first electrodes; peripheral circuitry electrically connected to the detection circuitry, and; and a third electrode located on the insulating layer.

Abstract: Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

Abstract: Disclosed herein is a method comprising: obtaining a substrate comprising an electronic system in or on the substrate, and a plurality of electric contacts on a first surface of the substrate, the electronic system being electrically connected to the electric contacts; obtaining a chip comprising an X-ray absorption layer, the X-ray absorption layer comprising an electrode; electrically connecting the electrode to at least one of the electric contacts by bonding the chip to the substrate; and thinning the substrate at a surface opposite the first surface.

Abstract: A plurality of openings is formed in a dielectric layer formed on a semiconductor substrate. The plurality of openings comprises a first opening extending to the semiconductor substrate, a second opening extending to a first depth that is substantially less than a thickness of the dielectric layer, and a third opening extending to a second depth that is substantially greater than the first depth. A multi-layer gate electrode is formed in the first opening. A thin resistor structure is formed in the second opening, and a connection structure is formed in the third opening, by filling the second and third openings substantially simultaneously with a resistor metal.

Abstract: The lateral bipolar junction transistor has a silicon carbide layer, the silicon carbide layer comprises a base region with a first conductivity type, a collector region with a second conductivity type and an emitter region with a second conductivity type. The collector region and the emitter region are within the base region, and the base region, collector region and emitter region are all arranged along an upper surface of the silicon carbide layer.

Abstract: A semiconductor device including a semiconductor layer that includes an active region, semiconductor elements that are formed using the active region, connection regions that are obtained by metalizing parts of the semiconductor layer in an island shape isolated from the active region, an insulation film that is formed to cover one main surface side of the semiconductor layer, electrodes that are disposed to face the semiconductor elements and the connection regions via the insulation film, and contacts that penetrate through the insulation film to be selectively formed in portions according to necessity among portions that connect the semiconductor elements or the connection regions to the electrodes.

Abstract: Disclosed herein is a method of making an apparatus suitable for detecting x-ray, the method comprising: obtaining a substrate having a first surface and a second surface, wherein the substrate comprises an electronic system in or on the substrate, wherein the substrate comprises a plurality of electric contacts are on the first surface; obtaining a first chip comprising a first X-ray absorption layer, wherein the first X-ray absorption layer comprises an electrode; bonding the first chip to the substrate such that the electrode of the first X-ray absorption layer is electrically connected to at least one of the electric contacts.

Abstract: A superhydrophobic and self-cleaning surface including a substrate and a superhydrophobic layer. The superhydrophobic layer having a reacted form of octadecyltrichlorosilane. The octadecyltrichlorosilane is disposed on and crosslinked to a surface of the substrate via surface hydroxyl groups. The surface exhibits a rms roughness of 40 nm to 60 nm, a water contact angle of 155° to 180°, and a contact angle hysteresis of less than 15°. A method of preparing the substrate with a superhydrophobic and self-cleaning surface including treating a substrate with a plasma treatment, contacting the substrate with water or an alcohol to form an hydroxylated substrate, contacting the hydroxylated substrate with a solution of octadecyltrichlorosilane in an alkane solvent at a concentration in the range of 0.05 M to 0.3 M, and drying the solution on to the substrate under ambient air to form the superhydrophobic and self-cleaning surface on the substrate.

Abstract: Disclosed herein is a method of making an apparatus suitable for detecting x-ray, the method comprising: obtaining a substrate having a first surface and a second surface, wherein the substrate comprises an electronics system in or on the substrate, wherein the substrate comprises a plurality of electric contacts are on the first surface; obtaining a first chip comprising a first X-ray absorption layer, wherein the first X-ray absorption layer comprises an electrode; bonding the first chip to the substrate such that the electrode of the first X-ray absorption layer is electrically connected to at least one of the electrical contacts.

Abstract: A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.

Abstract: An image capturing apparatus includes: photoelectric converting elements having a light reception sensitivity to light in a wavelength band from 600 to 2500 nm, and receiving an object light flux to output pixel signals; n types of wavelength filters (n>4) allowing passage therethrough of light included in the flux and is in wavelength bands being respectively different, each including the wavelength band; and an image data generator generating image data using the output from an element among those having received the flux passed through one of m types of the wavelength filters (3?m<n) a combination determined based on a predetermined condition being determined such that among the respective wavelength bands of the m types of filters, a shortest-wavelength side wavelength band and a longest-wavelength side wavelength band overlap, and each filter among the m types allowing passage therethrough of light in the wavelength band including a predetermined effective wavelength band.

Abstract: In this solid-state imaging device, the sameness of the potential distributions in pixels, in a region from a photodiode of a transfer transistor to a floating diffusion in a charge transfer path, is improved. The solid-state imaging device includes a first transfer transistor including a first photodiode, a first gate electrode, and a first floating diffusion, a second transfer transistor including a second photodiode, a second gate electrode, and a second floating diffusion, a third transfer transistor including a third photodiode, a third gate electrode, and a third floating diffusion, and a reset transistor including a diffusion layer, which is a source or drain region, and a reset gate. The first to third floating diffusions and the diffusion layer of the reset transistor are separated from each other, and are electrically connected to each other via an interconnect. The first to third photodiodes are arrayed one-dimensionally.

Abstract: The present disclosure generally relates to capacitors having a multilayer dielectric material between two electrodes. The multilayer dielectric material can have a small thickness with little to no breakdown strength reduction. By utilizing a multilayer dielectric structure in a capacitor, not only can the breakdown strength remain at an acceptable level, but the collective thickness of the capacitor may be reduced to accommodate the higher density pixels for display devices or any device that utilizes a capacitor.

Abstract: A solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus capable of suppressing occurrence of motion distortion while realizing widening of dynamic range and in turn realizing a higher image quality are provided.

Abstract: A thin-film monolithically integrated solar module with a solar cell, an integrated energy storage device, and a controller may be provided. It may comprise a thin-film solar cell, having at least one solar diode, on a transparent substrate, a thin-film energy storage device, and an electronic controller comprising at least one thin-film transistor above the thin-film energy storage device. The electronic controller may be electrically connected to the thin-film solar cell and the thin-film energy storage device by vias. The named functional units may build a monolithically integrated device on one substrate.

Abstract: A structure includes a silicon substrate; silicon readout circuitry disposed on a first portion of a top surface of the substrate and a radiation detecting pixel disposed on a second portion of the top surface of the substrate. The pixel has a plurality of radiation detectors connected with the readout circuitry. The plurality of radiation detectors are composed of at least one visible wavelength radiation detector containing germanium and at least one infrared wavelength radiation detector containing a Group III-V semiconductor material. A method includes providing a silicon substrate; forming silicon readout circuitry on a first portion of a top surface of the substrate and forming a radiation detecting pixel, on a second portion of the top surface of the substrate, that has a plurality of radiation detectors formed to contain a visible wavelength detector composed of germanium and an infrared wavelength detector composed of a Group III-V semiconductor material.

Abstract: A unit pixel of an image sensor includes a charge generation unit, a signal generation unit, and a ground control transistor. The charge generation unit generates photo-charges in response to incident light and provides the photo-charges to a floating diffusion area in response to a transmission control signal. The signal generation unit generates an analog signal having a magnitude corresponding to an electrical potential of the floating diffusion area based on a reset control signal and a row selection signal. The ground control transistor is coupled between the floating diffusion area and a ground voltage, and is turned on in response to a ground control signal.

Abstract: An active pixel sensor (APS) with a vertical transfer gate and a pixel transistor (e.g., a transfer transistor, a source follower transistor, a reset transistor, or a row select transistor) electrically isolated by an implant isolation region is provided. A semiconductor substrate has a photodetector buried therein. The vertical transfer gate extends into the semiconductor substrate with a channel region in electrical communication with the photodetector. The pixel transistor is arranged over the photodetector and configured to facilitate the pixel operation (e.g., reset, signal readout, etc.). The implant isolation region is arranged in the semiconductor substrate and surrounds and electrically isolates the pixel transistor. A method for manufacturing the APS is also provided.

Abstract: A circuit board upon which to mount an integrated circuit chip may include a first interconnect zone on the surface of the circuit board having first contacts with a first pitch, and a second interconnect zone, surrounding the first zone, having second contacts or traces with a second pitch that is smaller than the first pitch. The first contacts may have a design rule (DR) for direct chip attachment (DCA) to an integrated circuit chip. The first contacts may be formed by bonding a sacrificial substrate having the first contacts to a surface of the board; or by laser scribing trenches where the conductor will be plated to create the first contacts. Such a board allows DCA of smaller footprint processor chips for devices, such as tablet computers, cell phones, smart phones, and value phone devices.

Abstract: A method of making a composite pixel image sensor includes forming an image sensing array; and forming a depth sensing pixel. The depth sensing pixel includes a depth sensing photodiode; a first photo storage diode; and a first transistor configured to selectively couple the depth sensing photodiode to the first photo storage diode. The depth sensing pixel further includes a second photo storage diode different from the first photo storage device; and a second transistor configured to selectively couple the depth sensing photodiode to the second photo storage device. The depth sensing pixel further includes a first transfer gate configured to selectively couple the first photo storage diode to a first output node. The depth sensing pixel further includes a second transfer gate configured to selectively couple the second photo storage diode to a second output node. The method includes bonding the image sensing array to the depth sensing pixel.

Abstract: Methods and structures for extracting at least one electric parametric value from a back contact solar cell. According to one embodiment, a first layer of electrically conductive metal having an interdigitated pattern of base electrodes and emitter electrodes is formed on the backside surface of a semiconductor solar cell substrate. An electrically insulating layer is formed on the first layer of electrically conductive metal providing electrical isolation between the first layer of electrically conductive metal and a second layer of electrically conductive metal. Vias are formed in the electrically insulating layer providing access to the first layer of electrically conductive metal. A second electrically conductive metallization layer is formed on the electrically insulating layer and contacts the first electrically conductive metal layer through the vias.

Abstract: A method comprises preparing a semiconductor substrate having a first portion, and a second portion including a first region and a second region; forming an active region in the first portion, and an isolating portion of an insulator defining the active region in the second portion; forming a first semiconductor region of a first conductivity type configuring a first photoelectric conversion element, a second semiconductor region of first conductivity type configuring a second photoelectric conversion element, a third semiconductor region of first conductivity type, a fourth semiconductor region of the conductivity type, a first gate electrode configuring a first transfer transistor, and a second gate electrode configuring a second transfer; exposing the first region of the semiconductor substrate, and performing ion implantation masked by a first photoresist pattern covering the second region of the semiconductor substrate, thus forming a fifth semiconductor region of a second conductivity type.

Abstract: A magnetic tunnel junction storage element for a spin transfer torque magnetoresistive random access memory (STT-MRAM) bit cell includes a bottom electrode layer, a pinned layer adjacent to the bottom electrode layer, a dielectric layer encapsulating a portion of the bottom electrode layer and the pinned layer, the dielectric layer including sidewalls that define a hole adjacent to a portion of the pinned layer, a tunneling barrier adjacent to the pinned layer, a free layer adjacent to the tunneling barrier, and a top electrode adjacent to the free layer, wherein a width of the bottom electrode layer and/or the pinned barrier in a first direction is greater than a width of a contact area between the pinned layer and the tunneling barrier in the first direction. Also a method of forming an STT-MRAM bit cell.

Abstract: A method of manufacturing a photoelectric conversion apparatus which includes a pixel circuit section having a well where a photoelectric conversion element and an amplification element configured to generate a signal based on an amount of charge generated in the photoelectric conversion element are arranged, and a peripheral circuit section having a MOS transistor. The method includes forming a dielectric film for covering the photoelectric conversion element, the amplification element, and a gate electrode of the MOS transistor and forming, by etching the dielectric film, a side spacer by remaining a portion of the dielectric film on a side surface of the gate electrode while protecting by a resist, wherein an opening is formed in the dielectric film of the pixel circuit section with the etching, and a contact for defining a potential of the well is formed through the opening.

Abstract: Embodiments of the invention are directed to IR photodetectors with gain resulting from the positioning of a charge multiplication layer (CML) between the cathode and the IR sensitizing layer of the photodetector, where accumulating charge at the CML reduces the energy difference between the cathode and the CML to promote injection of electrons that result in gain for an electron only device. Other embodiments of the invention are directed to inclusion of the IR photodetectors with gain into an IR-to-visible up-conversion device that can be used in night vision and other applications.

Abstract: A method for fabricating a sensor, comprising: forming a pattern of a bias line on a base substrate by using a first patterning process; forming a pattern of a transparent electrode, a pattern of a photodiode, a pattern of a receive electrode, a pattern of a source electrode, a pattern of a drain electrode, a pattern of a data line and a pattern of an ohmic layer by using a second patterning process; forming a pattern of an active layer, a pattern of a first passivation layer, a pattern of a gate electrode and a pattern of a gate line by using a third patterning process. The above method reduces the number of used mask in the fabrication processes as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the yield rate.

Abstract: A photovoltaic device includes at least one photovoltaic cell and a DC/DC converter electrically coupled to the at least one photovoltaic cell. The at least one photovoltaic cell and the DC/DC converter are integrated into a photovoltaic package.

Abstract: A solid-state image sensor includes a structure having a semiconductor layer in which a plurality of photoelectric converters are arranged, a light blocking member arranged above a face of the structure and including a plurality of circular openings each corresponding to at least one of the photoelectric converters, a first layer configured to cover the light blocking member, and exposed portions of the face of the structure, that are formed by the plurality of circular openings, and a second layer arranged to cover the first layer and having a refractive index higher than that of the first layer, wherein an interface between the first layer and the second layer includes lens faces protruding toward the exposed portions.

Abstract: A photodiode includes a first semiconductor layer having a first conductivity type, a second semiconductor layer having a second conductivity type that is opposite to the first conductivity type of the first semiconductor layer, and a third semiconductor layer interposed between the first semiconductor layer and the second semiconductor layer. An edge of the first semiconductor layer is inset from an edge of the second semiconductor layer.

Abstract: The present invention relates to bonded semiconductor integrated circuits, more specifically to a structure to protect against crack propagation into any layer of such integrated circuits. Embodiments of the present invention may include a first semiconductor substrate having a first layer bonded to second layer of a substantially thinner second semiconductor substrate by a bonding layer. The first layer may contain a crack stop. The crack stop may be in contact with a circumferential wall, made up of posts, that extends through the bonding layer, the second layer, and the second substrate.

Abstract: A chip package including a first substrate is provided. A plurality of first conductive pads is disposed on a first side of the first substrate. A second substrate is attached onto a second side opposite to the first side of the first substrate. The second substrate includes a micro-electric element and has a plurality of second conductive pads corresponding to the plurality of first conductive pads, disposed on a first side of the second substrate and between the first substrate and the second substrate. A redistribution layer is disposed on a second side opposite to the first side of the second substrate. The redistribution layer penetrates the second substrate, second conductive pads and the first substrate and extends into the first conductive pads to electrically connect the first and second conductive pads.

Abstract: A method of manufacturing a photoelectric conversion apparatus which includes a pixel circuit section having a well where a photoelectric conversion element and an amplification element configured to generate a signal based on an amount of charge generated in the photoelectric conversion element are arranged, and a peripheral circuit section having a MOS transistor. The method includes forming a dielectric film for covering the photoelectric conversion element, the amplification element, and a gate electrode of the MOS transistor and forming, by etching the dielectric film, a side spacer by remaining a portion of the dielectric film on a side surface of the gate electrode while protecting by a resist, wherein an opening is formed in the dielectric film of the pixel circuit section with the etching, and a contact for defining a potential of the well is formed through the opening.

Abstract: A semiconductor device includes a substrate supporting a plurality of layers that include at least one modulation doped quantum well (QW) structure offset from a quantum dot in quantum well (QD-in-QW) structure. The modulation doped QW structure includes a charge sheet spaced from at least one QW by a spacer layer. The QD-in-QW structure has QDs embedded in one or more QWs. The QD-in-QW structure can include at least one template/emission substructure pair separated by a barrier layer, the template substructure having smaller size QDs than the emission substructure. A plurality of QD-in-QW structures can be provided to support the processing (emission, absorption, amplification) of electromagnetic radiation of different characteristic wavelengths (such as optical wavelengths in range from 1300 nm to 1550 nm).

Abstract: An organic x-ray detector and a method of making the organic x-ray detector are disclosed. The x-ray detector includes a TFT array disposed on a substrate, an organic photodiode layer disposed on the TFT array, a barrier layer disposed on the photodiode layer, and a scintillator layer disposed on the barrier layer, such that the barrier layer includes at least one inorganic material.

Abstract: A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking region. The first isolation insulating film is formed around the photoelectric conversion element. The current blocking region is formed in a region between the photoelectric conversion element and the first isolation insulating film. The current blocking region includes an impurity diffusion layer, and a defect extension preventing layer disposed in contact with the impurity diffusion layer to form a twin with the impurity diffusion layer. The defect extension preventing layer has a different crystal structure from that of the impurity diffusion layer. At least a part of the current blocking region is disposed in contact with the first isolation insulating film.

Abstract: The present invention relates to a radiation detector with organic photodiodes and to a method of producing such a radiation detector. The TFT backplane (103, 104) is placed between the scintillator (101) and the organic photodiode layer stack (105, 106, 107, 108). This implies the use of transparent TFT-electronics, e.g., a-Si with back-thinned glass or an organic TFT on foil. The geometrical order enables a multitude of possible stack built- ups for OPDs and has advantages for encapsulation and manufacturing.

Abstract: Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.

Abstract: Photonic devices monolithically integrated with CMOS are disclosed, including sub-100 nm CMOS, with active layers comprising acceleration regions, light emission and absorption layers, and optional energy filtering regions. Light emission or absorption is controlled by an applied voltage to deposited films on a pre-defined CMOS active area of a substrate, such as bulk Si, bulk Ge, Thick-Film SOI, Thin-Film SOI, Thin-Film GOI.

Abstract: A magnetic tunnel junction (MTJ) device is formed by a process that includes forming a trench in a substrate and depositing an MTJ structure within the trench. The MTJ structure includes a bottom electrode, a fixed layer, a tunnel barrier layer, a free layer, and a top electrode. The process includes applying reverse photo etching to remove material that is not directly over the trench. The process also includes plagiarizing the MTJ structure without performing a photo-etch process on the MTJ structure.

Abstract: A method of manufacturing a solid-state image sensor having a pixel region and a peripheral circuit region, includes forming an oxide film on a semiconductor substrate, forming an insulating film on the oxide film, forming a first opening in the insulating film and the oxide film in the peripheral circuit region, forming a trench in the semiconductor substrate in the peripheral circuit region by etching the semiconductor substrate through the first opening using the insulating film as a mask, forming a second opening in the insulating film to penetrate through the insulating film in the pixel region and to reach a predetermined depth of the oxide film, and forming insulators in the trench and the second opening.

Abstract: Methods and apparatus relating to providing a collection grid suitable for use in PV modules. The disclosed collection grid may be at least partially applied to a protective laminate sheet in a manner that removes the high temperature requirements of conventional screen printed collection grids, to avoid unwanted heat-related deformation of the laminate sheet.