Abstract: A system and method for distributing gas to a substrate in a dry etch chamber make use of different flow channels to distribute the gas to different portions of a substrate. A first flow channel can be oriented to distribute gas to an inner portion of the substrate. A second flow channel can be oriented to distribute gas to an outer portion of the substrate. With different flow channels, the system and method enable separate control of gas distribution for different portions of the substrate. In particular, the flow channels allow separate control of gas flow rate, concentration, and flow time for different areas of the substrate. In this manner, gas distribution can be selectively controlled to compensate for different etch rates across the substrate surface. Also, gas distribution can be controlled as a function of etch rate patterns exhibited by different etch gasses used in successive process steps.

Abstract: A device and a method for etching a substrate, in particular a silicon body, by using an inductively coupled plasma. A high-frequency electromagnetic alternating field is generated using an ICP source, and an inductively coupled plasma composed of reactive particles is generated by the action of a high-frequency electromagnetic alternating field on a reactive gas in a reactor. In addition, a static or time-variable magnetic field is generated between the substrate and the ICP source, for which purpose at least two magnetic field coils arranged one above the other are provided. The direction of the resulting magnetic field is also approximately parallel to the direction defined by the tie line connecting the substrate and the inductively coupled plasma.

Abstract: Chemical vapor deposition (CVD) is enhanced by compensating for a depleted gas concentration zone in a CVD reactor. According to an example embodiment of the present invention, a chemical-vapor deposition (CVD) gas injector is adapted to supply gas to a CVD chamber in a manner that enhances the properties of deposited films. The injector has a gas inlet coupled to a gas source and supplies gas from the source to the CVD system via at least one gas outlet. The injector is adapted to deliver gas in a manner that sufficiently maintains uniform supply of the gas in a zone of the CVD system that would exhibit a depleted gas supply absent the injector. The uniform gas supply improves the CVD process in various manners, including making possible the deposition of films having uniform properties, such as reflectivity, extinction coefficient, thickness and refractive index.

Abstract: A system and method of generating RF includes an RF generator, a variable DC power supply, and a comparator. The RF generator has an RF output coupled to an input of the transducer. The variable DC power supply has a control input and a DC output coupled to the RF generator. The comparator includes a first input coupled to a set point control signal, a second input coupled to the RF generator RF output, and a control signal output coupled to a voltage control input on the variable DC power supply.

Abstract: An atmosphere of an inert gas inside a chamber room in a chamber apparatus is replaced with an outside air by opening a discharge passage in the chamber room and by closing a gas supply passage for supplying the inert gas. The outside air is thus forcibly sent to the chamber room to thereby replace the inert gas remaining inside the chamber room with the outside air.

Abstract: A method for creating and transporting low-energy ions for use in plasma processing of a semiconductor wafer is disclosed. In an exemplary embodiment of the invention, the method includes generating plasma from a gas species to produce a plasma exhaust. The plasma exhaust is then introduced into a processing chamber containing the wafer. The ion content of the plasma exhaust is enhanced by activating a supplemental ion source as the plasma is introduced into the processing chamber, thereby creating a primary plasma discharge therein. Then, the primary plasma discharge is directed into a baffle plate assembly, thereby creating a secondary plasma discharge exiting the baffle plate assembly. The strength of an electric field exerted on ions contained in the secondary plasma discharge is reduced. In so doing, the reduced strength of the electric field causes the ions to bombard the wafer at an energy insufficient to cause damage to semiconductor devices formed on the wafer.

Abstract: Chemical generator and method for generating a chemical species at a point of use such as the chamber of a reactor in which a workpiece such as a semiconductor wafer is to be processed. The species is generated by creating free radicals, and combining the free radicals to form the chemical species at the point of use.

Abstract: Plasma etching processes using a plasma containing fluorine as well as bromine and/or iodine are suited for high aspect ratio etching of trenches, contact holes or other apertures in silicon oxide materials. The plasma is produced using at least one fluorine-containing source gas and at least one bromine- or iodine-containing source gas. Bromine/iodine components of the plasma protect the aperture sidewalls from lateral attack by free fluorine, thus advantageously reducing a tendency for bowing of the sidewalls. Ion bombardment suppresses absorption of bromine/iodine components on the etch front, thus facilitating advancement of the etch front without significantly impacting taper.

Abstract: With keeping an atmosphere including oxygen within a chamber and with a wafer kept at a low temperature, plasma generated within the chamber is biased toward the wafer, and the wafer is subjected to the plasma. A semiconductor layer exposed on the wafer is oxidized into an oxide film. Thus, an oxide film can be formed even at room temperature differently from thermal oxidation. This oxidation is applicable to recovery of an implantation protection insulating film having been etched in cleaning a photoresist film, relaxation of a step formed between polysilicon films, relaxation of a step formed within a trench and the like. Also, before removing a photoresist film used for forming a gate electrode including a metal, a contamination protection film can be formed by this oxidation with the photoresist film kept.

Abstract: A multi-layered film on a semiconductor substrate is etched with a multi-step etching process by sequentially providing a plurality of process gases having different compositions in a chamber. A plasma discharge to excite the process gases is continued without an interruption during a switch to a different process gas. A relationship between different process gases desirable for the continuous plasma excitation is also disclosed. An apparatus suitable to practice this continuous plasma excitation process includes a process gas supply system having a gas reservoir. A mixture of at least two component gases is prepared and reserved in the reservoir, and is supplied to the etching chamber when it is needed.

Abstract: A method for dry etching a dielectric layer including providing a substrate; forming at least one overlying dielectric layer over the substrate; subjecting the at least one overlying layer to a plasma oxidizing process; and, subjecting the at least one overlying layer to a plasma etching process.

Abstract: To resolve a problem that an etching rate profile is changed by a position of a nozzle relative to a semiconductor wafer and accordingly, at a vicinity of an outer edge of the semiconductor wafer, an accurate machining result is difficult to achieve, gas including activated species produced by plasma is blown from a nozzle locally to a surface of the semiconductor wafer W supported on a wafer table concentrically therewith to thereby remove unevenness on the surface of the semiconductor wafer. In this case, the wafer table is provided with a radius larger than a radius of the semiconductor wafer supported thereby by an outstretched portion to thereby prevent an outer edge from being removed excessively by reflected gas.

Abstract: Key to the present invention is the subsequent use of two layers of different positive photoresists, possessing different exposure wavelength sensitivities. It is a general object of the present invention to provide a new and improved method of forming semiconductor integrated circuit devices, and more specifically, in the formation of self-aligned dual damascene interconnects and vias, which incorporates two positive photoresist systems, which have different wavelength sensitivities, to form trench/via openings with only a two-step etching process. In addition, the two layers of photoresist exhibit different etch resistant properties, for subsequent selective reactive ion etching steps. The use of a “high contrast” positive photoresist system has been developed wherein the resist system exposure sensitivity is optimized for wavelengths, deep-UV (248 nm) for the top layer of resist, the trench pattern, and I-line (365 nm) for the bottom layer of resist, the via pattern.

Abstract: A surface processing apparatus is provided. In the apparatus, an etching rate ratio of an organic material such as a BARC of anti-reflective film to a resist of mask forming a pattern, that is, a selective ratio is high, the anti-reflective film being a means for forming the pattern with a high accuracy in surface processing of a semiconductor. In the surface processing apparatus, which uses a plasma, a deposition gas is added to a light element of hydrogen as the etching gas. Ions accelerated by a bias electric power supply accelerate etching reaction. Sputtering at edges of the mask can be reduced by using the light element of hydrogen as the etching gas, and the selective ratio of the anti-reflective film to the masking material can be increased by mixing the deposition gas with the hydrogen.

Abstract: An etching process yields an optimized formation of via holes through the combination of semiconductor material selection and etchant parameters. Over an interlayer dielectric layer is formed a stop layer having a SiON layer over which is a SiC layer. Selective etching will attack the SiC layer while leaving the SiON layer undisturbed. When etching the via hole, a proportion of about 7:90 O2:CO was observed to yield a superior etch.

Abstract: A substantially oxygen-free and nitrogen-free plasma ashing process for removing photoresist in the presence of a low k material from a semiconductor substrate includes forming reactive species by exposing a plasma gas composition to an energy source to form plasma. The plasma gas composition is substantially free from oxygen-bearing and nitrogen-bearing gases. The plasma selectively removes the photoresist from the underlying substrate containing low k material by exposing the photoresist to substantially oxygen and nitrogen free reactive species. The process can be used with carbon containing low k dielectric materials.

Abstract: A processing system and method for chemically treating a substrate, wherein the processing system comprises a temperature controlled chemical treatment chamber, and an independently temperature controlled substrate holder for supporting a substrate for chemical treatment. The substrate holder is thermally insulated from the chemical treatment chamber. The substrate is exposed to a gaseous chemistry, without plasma, under controlled conditions including wall temperature, surface temperature and gas pressure. The chemical treatment of the substrate chemically alters exposed surfaces on the substrate.

Abstract: A method for releasing from underlying substrate material micromachined structures or devices without application of chemically aggressive substances or excessive forces. The method starts with the step of providing a partially formed device, comprising a substrate layer, a sacrificial layer deposited on the substrate, and a function layer deposited on the sacrificial layer and possibly exposed portions of the substrate layer and then etched to define micromechanical structures or devices therein. The etching process exposes the sacrificial layer underlying the removed function layer material. Next there are the steps of cleaning residues from the surface of the device, and then directing high-temperature hydrogen gas over the exposed surfaces of the sacrificial layer to convert the silicon dioxide to a gas, which is carried away from the device by the hydrogen gas.

Abstract: An antireflective layer formed from boron-doped amorphous carbon can be removed using a process which is less likely to over etch a dielectric layer than conventional technology. This layer can be removed by exposing the layer to an oxygen plasma (i.e. an “ashing” process), preferably concurrently with the ashing and removal of an overlying photoresist layer. An inventive process which uses the inventive antireflective layer is also described.

Abstract: The present invention provides a processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo-energy for maintaining activation of the active species or providing photo-energy for a non-plasma species during transfer through the transparent tube to the processing chamber. The source of photo-energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for processes such as layer-by-layer annealing and deposition and also removal of contaminants from deposited layers.

Abstract: There is provided a method of performing a surface treatment, such as coating, denaturation, modification and etching, on a surface of a substrate. The method comprises the steps of bringing a surface treatment gas into contact with a surface of a substrate, and irradiating the surface of the substrate with a fast particle beam to enhance an activity of the surface and/or the surface treatment gas, thereby facilitating a reaction between the surface and the gas. The fast particle beam may be selected from a group consisting of an electron beam, a charged particle beam, an atomic beam and molecular beam. For example, during a coating operation, chemical deposition of predetermined component elements of the gas onto the surface is effected and a predetermined portion of the surface of the substrate is irradiated with a particle beam to form a coating layer on the predetermined portion.

Abstract: Plasma etching processes using a plasma containing fluorine as well as bromine and/or iodine are suited for high aspect ratio etching of trenches, contact holes or other apertures in silicon oxide materials. The plasma is produced using at least one fluorine-containing source gas and at least one bromine- or iodine-containing source gas. Bromine/iodine components of the plasma protect the aperture sidewalls from lateral attack by free fluorine, thus advantageously reducing a tendency for bowing of the sidewalls. Ion bombardment suppresses absorption of bromine/iodine components on the etch front, thus facilitating advancement of the etch front without significantly impacting taper.

Abstract: A method and system are provided for endpoint detection of plasma chamber cleaning or plasma etch processes. Optical emission spectroscopy is utilized to determine a spectral emission ratio of two or more light emitting reaction components at wavelengths in close proximity. When a spectral emission ratio or derivative thereof or mathematical function thereof falls below a selected threshold value, the plasma process may be terminated within a calculated time from the threshold value prior to an endpoint value cutoff. Advantageously, the system and methods of the present invention provide real-time, in-situ monitoring of plasma clean or etch processes to optimize the process and avoid under-cleaning or over-cleaning.

Abstract: A method for generating an organic plug within a via is described. The via resides in an integrated circuit (IC) structure having a silicon containing dielectric material. The method for generating the organic plug includes applying an organic compound such as a bottom antireflective coating. The organic compound occupies the via. The method then proceeds to feed a nitrous oxide (N2O) gas into a reactor and generates a plasma in the reactor. A significant portion of the organic compound is removed leaving behind an organic plug to occupy the via. The organic plug is typically generated during dual damascene processing.

Abstract: A plasma etching method and apparatus in which a processing gas is supplied from a shower plate arranged on an electrode opposed to an electrode for generating a plasma or a sample toward the sample center, and the gas is transformed into a plasma thereby to etch the sample. RF power is applied between a sample stage and the electrode to apply the energy to charged particles in the plasma to thereby etch the sample. In the process, apart from the incidence of the charged particles to the sample, the charged particles enter also the shower plate of the electrode by application of the RF power. The charged particles entering the processing gas supply holes of the shower plate are neutralized to prevent abnormal discharge on the shower plate and consequently suppress the generation of foreign matter.

Abstract: Transistor gate linewidths can be made to be effectively smaller by etching a notch at the bottom of the gate to reduce the effective linewidth. This can be done by etching at a layer interface, such as a silicon-germanium interface in an over-etch step.

Abstract: A method is described for forming a trench in a semiconductor substrate, which has a silicon layer, an oxide layer overlying the silicon layer, and a nitride layer overlying the oxide layer. The method includes etching the nitride layer to a nitride end point using a nitride etching chemistry, which includes a fluorinated hydrocarbon, oxygen, and an inert gas selected from the group consisting of neon, argon, krypton, xenon, and combinations thereof. Methods of making semiconductor devices, methods of reducing defects in semiconductor devices, and silicon wafers having trenches and isolation regions formed by the above-mentioned methods for forming a trench are also described.

Abstract: A fabricating method of a liquid crystal display includes the steps of inserting a first substrate into a chamber to perform a dry etching process, removing the first substrate from the chamber after completion of the dry etching process, inserting a dummy substrate into the chamber, injecting inert gas into the chamber to eliminate a process byproduct and a remaining gas, taking the dummy substrate out from the chamber, and inserting a second substrate into the chamber having the process byproduct and the remaining gas removed, to perform an ashing process.

Abstract: Disclosed is a method of manufacturing a semiconductor device. The method comprises the steps of: preparing a silicon substrate having a predetermined lower structure including a gate and a bonding area; forming an interlayer dielectric film on the top side of the substrate; forming a photosensitive film pattern, which exposes an area for providing contact, on the interlayer dielectric film; forming a contact hole exposing a bonding area of the substrate by etching the exposed part of the interlayer dielectric film; removing the photosensitive film pattern; performing a dry cleaning on the exposed bonding area of the substrate so that CF based polymer formed in the etching step is removed; and performing a nitrogen-hydrogen plasma processing on the surface of the exposed bonding area of the substrate so that oxygen polymer and remaining CF-based polymer are removed. Therefore, since hydrogen plasma processing is performed after contact etching, ohmic contact characteristics can be secured.

Abstract: A tungsten silicide etch process allows for a high etch rate and about 90° sidewall profiles of etched features. According to an example embodiment, a substrate is placed into an etch zone and a process gas comprising SF6, He, HBr, and a chlorine-containing gas is introduced in the etch zone. A plasma is generated in the etch zone to form an etch gas from the process gas that anisotropically etches the tungsten silicide layer.

Abstract: The present invention provides a method for fabricating a semiconductor device with use of an ArF light source capable of minimizing deformations of a photoresist pattern for ArF during an etching process. Also, when forming the pattern, C5F8 gas is used at a main etching step to compensate etch tolerance of the photoresist for ArF. By controlling process recipe properly, it is possible to minimize pattern deformations as simultaneously as to form a micronized pattern. To compensate the etch tolerance of the photoresist for ArF weaker than that of a photoresist for KrF, the main etching step is divided into three sub-steps, thereby providing a method for minimizing the pattern deformations when duplicating the pattern.

Abstract: A method for reducing the contact resistance using plasma process tries to solve the problem that the cleaning process could not remove both the residues and oxides on the etched surface effectively. A plasma treating process is performed after the cleaning process and before any following process. Herein, the plasma treating process uses the plasma(s) to physically and/or chemically react with the etched surface. For example, inert gas plasma is used to remove these residues and the oxides, and then hydrogen plasma is used to compensate the unsaturated bonds by inducing the ions bombardment of the inert gas plasma.

Abstract: A method and apparatus for high density nanostructures is provided. The method and apparatus include Nano-compact optical disks, such as nano-compact disks (Nano-CDS). In one embodiment a 400 Gbit/in2 topographical bit density nano-CD with nearly three orders of magnitude higher than commercial CDS has been fabricated using nanoimprint lithography. The reading and wearing of such Nano-CDS have been studied using scanning proximal probe methods. Using a tapping mode, a Nano-CD was read 1000 times without any detectable degradation of the disk or the silicon probe tip. In accelerated wear tests with a contact mode, the damage threshold was found to be 19 &mgr;N. This indicates that in a tapping mode, both the Nano-CD and silicon probe tip should have a lifetime that is at least four orders of magnitude longer than that at the damage threshold.

Abstract: A method of pull back for a shallow trench isolation (STI) structure is provided. The method firstly provides a substrate having a hard mask layer disposed thereupon and a dielectric layer above the hard mask layer. Then a trench is formed within the hard mask layer, the dielectric layer and the substrate. Finally, the hard mask layer and the dielectric layer are pulled back by using a halogen containing etching process.

Abstract: It is an object of the present invention to effectively and efficiently inhibit the influence of an eliminated gas from a built-up film deposited in a reaction chamber and reduce an incubation time to improve flatness of a thin film. A manufacturing method of a semiconductor device includes a preprocess step and a film-forming step. In the preprocess step, an RPH (Remote Plasma Hydrogenation) process of supplying a hydrogen radical onto a substrate (202), thereafter, an RPN (Remote Plasma Nitridation) process of supplying a nitrogen radical onto the substrate (203), and thereafter, an RPO (Remote Plasma Oxidation) process of supplying an oxygen radical onto the substrate (204) are performed during a substrate temperature increase for raising a substrate temperature up to a film-forming temperature.

Abstract: A high plasma density etch process for etching an oxygen-containing layer overlying a non-oxygen containing layer on a workpiece in a plasma reactor chamber, by providing a chamber ceiling overlying the workpiece and containing a semiconductor material, supplying into the chamber a process gas containing etchant precursor species, polymer precursor species and hydrogen, applying plasma source power into the chamber, and cooling the ceiling to a temperature range at or below about 150 degrees C. The etchant and polymer precursor species contain fluorine, and the chamber ceiling semiconductor material includes a fluorine scavenger precursor material. Preferably, the process gas includes at least one of CHF3 and CH2F2. Preferably, the process gas further includes a species including an inert gas, such as HeH2 or Ar. If the chamber is of the type including a heated fluorine scavenger precursor material, this material is heated to well above the polymer condensation temperature, while the ceiling is cooled.

Abstract: A method of etching high dielectric constant materials using halogen gas and reducing gas chemistry. An embodiment of the method is accomplished using a 20 to 300 sccm of chlorine and 2 to 200 sccm of carbon monoxide, regulated to a total chamber pressure of 2-100 mTorr to etch a hafnium oxide layer.

Abstract: A method is disclosed for improving etch uniformity in deep silicon etching of a monocrystalline silicon wafer. Such method includes forming a pad dielectric layer on a wafer including monocrystalline silicon, forming a silicon layer over the pad dielectric layer, and then applying a clamp to an edge of the wafer. The silicon layer is then removed except in areas protected by the clamp. Thereafter, a hardmask layer is applied and patterned on the wafer; and the wafer is then directionally etched with the patterned hardmask to etch trenches in the monocrystalline silicon. In such manner, a source of silicon (in the silicon layer) is provided at the wafer edge, such that the silicon loading is improved. In addition, the silicon layer at the wafer edge forms a blocking layer which prevents formation of black silicon.

Abstract: A process for optically reducing charge build-up in an integrated circuit includes exposing the integrated circuit or portions thereof to a broadband radiation source. The process effectively reduces charge buildup that occurs in the manufacture of integrated circuits.

Abstract: A method for etching phase shift layers of half-tone phase masks includes etching a phase shift layer by using a plasma which is obtained from CH3F and O2. A high cathode power is used for the etching. The method has a very high selectivity between the substrate and the phase shift layer, so that half-tone phase masks with a high imaging quality can be produced.

Abstract: The degradation of deposited low dielectric constant interlayer dielectrics and gap fill layers, such as HSQ layers, during formation of contacts/vias is significantly reduced or prevented by employing a plasma containing CF4+H2O to remove the photoresist mask and cleaning the contact/via opening after anisotropic etching. The CF4+H2O plasma also enables rapid photoresist stripping at a rate of about 10 to about 20 KÅ/min. Embodiments include photoresist stripping and cleaning the contact/via opening with a CF4+H2O plasma to prevent reduction of the number of Si—H bonds of an as-deposited HSQ layer below about 70%.

Abstract: A process for etching a substrate and removing etch residue deposited on the surfaces in the etching chamber has two stages. In the first stage, an energized first process gas is provided in the chamber, and in the second stage, an energized second process gas is provided in the chamber. The energized first process gas comprises SF6 and Ar, the volumetric flow ratio of SF6 to other components of the first process gas being from about 5:1 to about 1:10. The energized second process gas comprises CF4 and Ar, the volumetric flow ratio of CF4 to other components of the second process gas being from about 1:0 to about 1:10.

Abstract: Titanium-containing films exhibiting excellent uniformity and step coverage are deposited on semiconductor wafers in a cold wall reactor which has been modified to discharge plasma into the reaction chamber. Titanium tetrabromide, titanium tetraiodide, or titanium tetrachloride, along with hydrogen, enter the reaction chamber and come in contact with a heated semiconductor wafer, thereby depositing a thin titanium-containing film on the wafer's surface. Step coverage and deposition rate are enhanced by the presence of the plasma. The use of titanium tetrabromide or titanium tetraiodide instead of titanium tetrachloride also increases the deposition rate and allows for a lower reaction temperature. Titanium silicide and titanium nitride can also be deposited by this method by varying the gas incorporated with the titanium precursors.

Abstract: Contaminants are generated during etching processes for forming electrodes of storage capacitors for very high density future memory cells, such as ferroelectric random access memory (FeRAM) cells. These contaminants include significant quantities of noble metals, and in particular iridium and iridium compound particulates. In order to prevent undesirable iridium and iridium compound particulates from adversely affecting subsequent etching processes performed in the chamber, the plasma metal etch chamber is seasoned by exposing interior surfaces of the chamber to a seasoning plasma generated from a gas mixture comprising at least two gases selected from the group consisting of BCl3, HBr, and CF4. The chamber seasoning method of the invention is also applicable to etch processes involving other noble metals, such as platinum.

Abstract: An improved insitu hard mask open strategy is performed before carrying out a metal etching process. The method for opening the hard mask made of SiO2, Si3N4 or SiON includes providing a substrate having thereon at least one metal layer, the hard mask layer, and a patterned photoresist layer overlying the hard mask layer. The hard mask layer is etched in a plasma etching process using an etchant source gas which is formed of a fluorine containing gas and oxygen. The plasma processing chamber used for etching the hard mask layer is the same as the plasma processing chamber in which the at least one metal layer is etched in another plasma etching process after the hard mask layer has been etched.

Abstract: A method of fabricating a printhead chip that includes a plurality of nozzle arrangements, each nozzle arrangement having nozzle chamber walls that define a nozzle chamber and an ink ejection port bounded by a rim includes the step of depositing a sacrificial layer on a substrate having drive circuitry formed on the substrate. The sacrificial layer is etched to define deposition zones for the nozzle chamber walls and the rim. A conformal layer of structural material is deposited on the sacrificial layer. The conformal layer is planarized to a predetermined depth to define each ink ejection port bounded by its respective rim. The sacrificial layer is then etched away.

Abstract: A method of plasma processing a silicon-containing object to be processed at a high etching rate without causing a surface of the object to have a hazy appearance, so that this surface can have an excellent visual quality. In the plasma processing method of etching the surface of the semiconductor wafer, gas containing sulfur hexafluoride and helium is used as a plasma-generating gas. A fluorine radical as an active substance which reacts with silicon of the surface of the semiconductor wafer, gaseous silicon tetrafluoride yielded by the reaction and a compound (SFn) of fluorine and sulfur that is generated as a reaction product are removed by the helium gas functioning as carrier gas. The helium gas prevents the reaction product from adhering to the surface of the wafer again.

Abstract: A method for controlling striations and CD loss in a plasma etching method is disclosed. During the etching process, the substrate of semiconductor material to be etched is exposed first to plasma under a low power strike and subsequently to a conventional high power strike. CD loss has been found to be reduced by about 400 Angstroms and striations formed in the contact holes are reduced.

Abstract: A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.

Abstract: A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.