Abstract: A method of patterning a metal alloy material layer having hafnium and molybdenum. The method includes forming a patterned mask layer on a metal alloy material layer having hafnium and molybdenum on a substrate. The patterned mask layer is used as a mask and an etching process is performed using an etchant on the metal alloy material layer having hafnium and molybdenum so as to form a metal alloy layer having hafnium and molybdenum. The etchant includes at least nitric acid, hydrofluoric acid and sulfuric acid. The patterned mask layer is removed.

Abstract: In a method for the treatment of a substrate surface of a flat substrate with a process medium at the substrate underside, the process medium has a removing or etching effect on the substrate surface. The substrates are wetted with the process medium from below in a manner lying horizontally. The upwardly facing substrate top side is wetted or covered with water or a corresponding protective liquid over a large area or over the whole area as protection against the process medium acting on the substrate top side.

Abstract: This disclosure involves a formula, mixing procedure, etching technique and application of an etchant for revealing defects in T2SL's grown lattice matched to (100) GaSb. The etching agent comprises a (2.5:4.5:16.5:280) solution by volume or (1%:2%:9%:88%) by weight, of HF:H2O2:H2SO4:H2O. The etchant is made by mixing (49%) hydrofluoric aqueous solution with (30%) water-based peroxide, followed by sulfuric acid, and diluted with de-ionized H2O (DI-water).

Abstract: A composition for etching a silicon oxide layer, a method of etching a semiconductor device, and a composition for etching a semiconductor device including a silicon oxide layer and a nitride layer including hydrogen fluoride, an anionic polymer, and deionized water, wherein the anionic polymer is included in an amount of about 0.001 to about 2 wt % based on the total weight of the composition for etching a silicon oxide layer, and an etch selectivity of the silicon oxide layer with respect to a nitride layer is about 80 or greater.

Abstract: A method for forming a silicon layer according to inventive concept comprises: preparing an SOI substrate; applying an etchant or vapor of the etchant to the SOI substrate; and irradiating a light to the SOI substrate.

Abstract: The present invention relates to a semiconductor process, a semiconductor element and a package having a semiconductor element. The semiconductor element includes a base material and at least one through via structure. The base material has a first surface, a second surface, at least one groove and at least one foundation. The groove opens at the first surface, and the foundation is disposed on the first surface. The through via structure is disposed in the groove of the base material, and protrudes from the first surface of the base material. The foundation surrounds the through via structure. Whereby, the foundation increases the strength of the through via structure, and prevents the through via structure from cracking.

Abstract: A known method of forming organic semiconductor devices employs the deposition of a conductive polymer onto a substrate to form electrodes or conductive tracks and then to apply an electrical material such as an organic semiconductor on top of these tracks. Although the conductive polymer serves as a highly efficient injector of electrons into the semiconductor, it is not a good conductor. This introduces undesirable inefficient in the supply of current to and from the semiconductor. Worse still the conductivity may deteriorate with time. A solution to this problem has been found by printing the polymer (7) onto a conductive layer (6) carried on a substrate (5). The printed polymer (7) is then used as a resist during a process in which parts of the conductive polymer not protected by the polymer are removed. The resulting device benefits from the good electron injection qualities of the conductive polymer (7) and efficient conduction by virtue of the underlying conductive layer (6).

Abstract: Various embodiments provide methods and systems for making and/or cleaning semiconductor devices. In one embodiment, a semiconductor device can be formed including a metal layer and a photoresist polymer. During formation, the semiconductor device can be cleaned in a cleaning chamber by a first cleaning solution provided from a solution supply device. After this cleaning process, a second cleaning solution containing metal ions and/or polymer residues can be produced and processed in a solution processing device to at least partially remove the metal ions and/or polymer residues to produce a third cleaning solution for re-use. In an exemplary fabrication or cleaning system, the solution processing device may be configured connecting to either an inlet or an outlet of the cleaning chamber. After cleaning, the semiconductor device can be processed to include a metal plug or an interconnect wiring.

Abstract: Disclosed is a method for treating semiconductor wafer including: providing a layer that contains lanthanum oxide or a lanthanide oxide (e.g. Dy2O3, Pr2O3, Ce2O3) applying an aqueous solution, wherein the aqueous solution is carbonated water, whereby the layer that contains lanthanum oxide or a lanthanide oxide is removed at specific areas, so that the surface, on which the layer that contains lanthanum oxide or a lanthanide oxide has been deposited, is exposed.

Abstract: In a method for manufacturing a semiconductor device, a process of providing a semiconductor wafer having a wiring layer having conductive patterns and a plurality of insulation films containing a first insulation film surrounding side surfaces of the conductive patterns are provided. After the process of providing the semiconductor wafer, a process of removing some regions of the plurality of insulation films to form openings is provided. Herein, the first insulation film is disposed to a position closer to the circumference of the semiconductor wafer than a position closest to the outermost circumference of the wafer among the arrangement positions of the conductive patterns.

Abstract: Monocrystalline semiconductor substrates are textured with alkaline solutions to form pyramid structures on their surfaces to reduce incident light reflectance and improve light absorption of the wafers. The alkaline baths include hydantoin compounds and derivatives thereof in combination with alkoxylated glycols to inhibit the formation of flat areas between pyramid structures to improve the light absorption.

Abstract: A method includes performing an etching step on a package. The package includes a package component, a connector on a top surface of the package component, a die bonded to the top surface of the package component, and a molding material molded over the top surface of the package component. The molding material covers the connector, wherein a portion of the molding material covering the connector is removed by the etching step, and the connector is exposed.

Abstract: A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing an integrated circuit comprising a p-type field effect transistor (pFET), recessing a surface region of the pFET using an ammonia-hydrogen peroxide-water (APM) solution to form a recessed pFET surface region, and depositing a silicon-based material channel on the recessed pFET surface region.

Abstract: This invention relates to a method for texturing a silicon surface and silicon wafers made by the method, where the method comprises immersing the wafers in an alkaline solution at pH>10, and applying a potential difference between the wafer and a platinum electrode in the electrolyte in the range of +10 to +85 V.

Abstract: Disclosed is an etchant composition employed for selectively etching a metallic material in production of a semiconductor device, which is an aqueous solution containing a fluorine compound, and a chelating agent having, in the molecular structure thereof, a phosphorus oxo-acid as a functional group; or is an aqueous solution containing a fluorine compound, a chelating agent having, in the molecular structure thereof, a phosphorus oxo-acid as a functional group, and an inorganic acid and/or an organic acid. Also disclosed is a method for producing a semiconductor device employing the etchant composition.

Abstract: An etchant is supplied to a workpiece. Furthermore, the workpiece is irradiated with spatially modulated light to adjust a temperature profile of said workpiece while etchant is supplied.

Abstract: A method of forming a patterned substrate is provided. The method includes providing a substrate (300) having a structured surface region comprising one or more recessed features (310). The method includes disposing a first liquid (325) onto at least a portion of the structured surface region. The method includes contacting the first liquid with a second liquid (330). The method includes displacing the first liquid with the second liquid from at least a portion (315) of the structured surface region. The first liquid is selectively located in at least a portion of the one or more recessed features.

Abstract: A substrate treatment apparatus is provided which is used for removing a resist from a front surface of a substrate. The apparatus includes a substrate holding unit which holds the substrate, and a sulfuric acid ozone/water mixture supplying unit which supplies a sulfuric acid ozone/water mixture to the front surface of the substrate held by the substrate holding unit, the sulfuric acid ozone/water mixture being a mixture which is prepared by mixing water with sulfuric acid ozone prepared by dissolving ozone gas in sulfuric acid.

Abstract: A method for fabricating a patterned polyimide film, wherein the method comprises steps as follows: Firstly, a polyimide film is provided on a substrate. A wet planarization process is then performed to remove a portion of the polyimide film. Subsequently the planarized polyimide film is patterned.

Abstract: A method of etching a semiconductor substrate, having the steps of: providing a semiconductor substrate having a first layer containing Ti and a second layer containing at least one of Cu, SiO, SiN, SiOC and SiON; providing an etching liquid containing, in an aqueous medium, a basic compound composed of an organic amine compound and an oxidizing agent, the etching liquid having a pH from 7 to 14; and applying the etching liquid to the semiconductor substrate to selectively etch the first layer of the semiconductor substrate.

Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.

Abstract: Apparatus and methods are provided for efficiently reclaiming solvents used to clean surfaces of semiconductor wafers, etc. More particularly, embodiments of the present invention provide an in-situ reclaim approach that utilizes condensing mechanisms to reclaim evaporated solvent components. In these embodiments, the condensing can occur within a proximity head itself and/or along a vacuum line running from the proximity head to a vacuum tank. Other embodiments of the present invention provide an in-situ reclaim approach that prevents the evaporation of solvents at the onset by maintaining appropriate equilibrium gas phase concentrations between the liquid chemistries and gases used to process wafer surfaces.

Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.

Abstract: A method of removing a semiconductor device layer from an underlying base substrate is provided in which a sacrificial phosphide-containing layer is formed between a semiconductor device layer and a base substrate. In some embodiments, a semiconductor buffer layer can be formed on an upper surface of the base substrate prior to forming the sacrificial phosphide-buffer layer. The resultant structure is then etched utilizing a non-HF etchant to release the semiconductor device layer from the base semiconductor substrate. After releasing the semiconductor device layer from the base substrate, the base substrate can be re-used.

Abstract: A method for combinatorially processing a substrate is provided. The method includes introducing a first etchant into a reactor cell and introducing a fluid into the reactor cell while the first etchant remains in the reactor cell. After initiating the introducing the fluid, contents of the reactor cell are removed through a first removal line and a second removal line, wherein the first removal line extends farther into the reactor cell than the second removal line. A level of the fluid above an inlet to the first removal line is maintained while removing the contents. A second etchant is introduced into the reactor cell while removing the contents through the first removal line and the second removal line. The method includes continuing the introducing of the second etchant until a concentration of the second etchant is at a desired level, wherein the surface of the substrate remains submerged.

Abstract: A nonaqueous cleaning liquid comprising a fluoroalkanol, a quaternary ammonium hydroxide, and an organic solvent. Compounds represented by formulae (1) and (2). Fluoroalkanol compounds include (1) H(CF2)aCH2—OH and (2) F(CF2)b(CH2)c—OH In which a and b are each an integer of from 2 to 6, and c is an integer of 1 or 2.

Abstract: A method for manufacturing integrated circuit devices, optical devices, micromachines and mechanical precision devices, the said method comprising the steps of (1) providing a substrate having patterned material layers having line-space dimensions of 50 nm and less and aspect ratios of >2; (2) providing the surface of the patterned material layers with a positive or a negative electrical charge by contacting the substrate at least once with an aqueous, fluorine-free solution S containing at least one fluorine-free cationic surfactant A having at least one cationic or potentially cationic group, at least one fluorine-free anionic surfactant A having at least one anionic or potentially anionic group, or at least one fluorine-free amphoteric surfactant A; and (3) removing the aqueous, fluorine-free solution S from the contact with the substrate.

Abstract: A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 3 inches and a 1 c screw dislocation density from about 500 cm?2 to about 2000 cm?2.

Abstract: A method for etching an ultra thin film is provided which includes providing a substrate having the ultra thin film formed thereon, patterning a photosensitive layer formed over the ultra thin film, etching the ultra thin film using the patterned photosensitive layer, and removing the patterned photosensitive layer. The etching process includes utilizing an etch material with a diffusion resistant carrier such that the etch material is prevented from diffusing to a region underneath the photosensitive layer and removing portions of the ultra thin film underneath the photosensitive layer.

Abstract: A method for producing a semiconductor optical device includes the steps of growing a semiconductor stacked layer including an etch stop layer and a plurality of semiconductor layers on a major surface of a substrate; forming a mask layer on a top surface of the semiconductor stacked layer so that a tip portion of each of protrusions that protrude from the top surface among protrusions generated in the step of growing the semiconductor stacked layer is exposed; etching the protrusion by wet etching using the mask layer; after etching the protrusion by wet etching, removing the protrusion by dry etching; and removing the mask layer from the top surface, after removing the protrusion by dry etching.

Abstract: A protective chuck is magnetically levitated on a substrate with a gas layer between the bottom surface of the protective chuck and the substrate surface. The gas layer protects a surface region of the substrate against a fluid layer covering the remaining of the substrate surface without contacting the substrate, reducing or eliminating potential damage to the substrate surface. The magnetically levitated protective chuck can enable combinatorial processing of a substrate, providing multiple isolated processing regions on a single substrate with different material and processing conditions.

Abstract: Methods and etchant compositions for wet etching to selectively remove a hafnium aluminum oxide (HfAlOx) material relative to silicon oxide (SiOx) are provided.

Abstract: Provided are a cleaning composition which is capable of inhibiting the metal of a semiconductor substrate from corrosion, and has an excellent removability of plasma etching residues and/or ashing residues on the semiconductor substrate, a method for producing a semiconductor device, and a cleaning method using the cleaning composition. The cleaning composition for removing plasma etching residues and/or ashing residues formed on a semiconductor substrate, and a preparation method and a cleaning method for a semiconductor device, using the cleaning composition, wherein the cleaning composition includes (Component a) water; (Component b) an amine compound; (Component c) hydroxylamine and/or a salt thereof; (Component d) a quaternary ammonium compound; (Component e) an organic acid; and (Component f) a water-soluble organic solvent; and has a pH of 6 to 9.

Abstract: An apparatus for preventing stiction of a three-dimensional MEMS (microelectromechanical system) microstructure, the apparatus including: a substrate; and a plurality of micro projections formed on a top surface of the substrate with a predetermined height in such a way that a cleaning solution flowing out from the microstructure disposed thereabove is discharged.

Abstract: Resist stripping agents useful for fabricating circuits and/or forming electrodes on semiconductor devices for semiconductor integrated circuits and/or liquid crystals with reduced metal and metal alloy etch rates (particularly copper etch rates and TiW etch rates), are provided with methods for their use. The preferred stripping agents contain low concentrations of resorcinol or a resorcinol derivative, with or without an added copper salt, and with or without an added amine to improve solubility of the copper salt. Further provided are integrated circuit devices and electronic interconnect structures prepared according to these methods.

Abstract: An etching liquid for texturing a silicon wafer surface is provided. The etching liquid may include an aqueous solution of at least one alkaline etching agent and at least one polysaccharide or derivative thereof. Also provided is a process for texture etching a silicon wafer using the etching liquid of the invention.

Abstract: According to embodiments of the present invention, a method of processing a wafer is provided. The wafer includes a plurality of through-wafer interconnects extending from a frontside surface of the wafer to a backside surface of the wafer. The method includes removing a part of wafer material of the back-side such that a portion of the wafer material between the through-wafer interconnects is removed, thereby exposing a portion of the through-wafer interconnects, forming a layer of low-k dielectric material between the through-wafer interconnects, and planarizing the layer of low-k dielectric material such that a surface of the portion of the through-wafer interconnect is exposed.

Abstract: Combinatorial workflow is provided for evaluating cleaning processes after forming a gate structure of transistor devices, to provide optimized process conditions for gate stack formation, including metal gate stack using high-k dielectrics. NMOS and PMOS transistor devices are combinatorially fabricated on multiple regions of a substrate, with each region exposed to a different cleaning chemical and process. The transistor devices are then characterized, and the data are compared to categorize the potential damages of different cleaning chemicals and processes. Optimized chemicals and processes can be obtained to satisfy desired device requirements.

Abstract: A method of removing an alumina layer around a main pole layer during perpendicular magnetic recording head fabrication is disclosed. The alumina etch sequence includes immersing a substrate in a series of aqueous solutions purged with an inert gas to remove oxygen thereby avoiding corrosion of the main pole. Initially, the substrate is soaked and heated in deionized (DI) water. Once heated, the substrate is immersed in an etching bath at about 80° C. and pH 10.5. Bath chemistry is preferably based on Na2CO3 and NaHCO3, and N2 purging improves etch uniformity and reduces residue. Thereafter, the substrate is rinsed in a second DI water bath between room temperature and 80° C., and finally subjected to a quick dump rinse before drying. Inert gas, preferably N2, may be introduced into the aqueous solutions through a purge board having a plurality of openings and positioned proximate to the bottom of a bath container.

Abstract: A method of manufacturing a metallized ceramic substrate includes forming a metal layer on a ceramic substrate, and forming on the metal layer a resist having a first patterned resist opening and a second patterned resist opening for the metal layer to be exposed therefrom. A first width of the first patterned resist opening is greater than the thickness of the metal layer, and a second width of the second patterned resist opening is less than the thickness of the metal layer. A wet-etching process is conducted, to form in the first patterned resist opening a patterned metal layer opening and form in the second patterned resist opening a patterned metal layer dent. Therefore, an internal stress between the metal layer and the ceramic substrate is reduced, and the yield rate and reliability of the metallized ceramic substrate is increased.

Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.

Abstract: A process for producing a micromachined tube (microtube) suitable for microfluidic devices. The process entails isotropically etching a surface of a first substrate to define therein a channel having an arcuate cross-sectional profile, and forming a substrate structure by bonding the first substrate to a second substrate so that the second substrate overlies and encloses the channel to define a passage having a cross-sectional profile of which at least half is arcuate. The substrate structure can optionally then be thinned to define a microtube and walls thereof that surround the passage.

Abstract: Substrate carrier can have drainage area leading the liquid away from the substrates, so that liquid droplet can be channeled away from the substrate area. The drainage area can include tilted lines and surfaces toward the ground away from the substrates. The carrier can further have drainage area leading the liquid to an end of the carrier, which then can be channeled to the ground without being free fall to the ground.

Abstract: Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath.

Abstract: A method of fabricating a semiconductor device for improving the performance of “?” shaped embedded source/drain regions is disclosed. A “U” shaped recess is formed in a Si substrate. The recess is treated with a surfactant, the amount of surfactant adsorbed on the recess sidewalls being greater than that on the recess bottom. An oxide is formed on the bottom. The presence of surfactant on the sidewalls, prevents oxide from forming thereon. The surfactant on the sidewalls is then removed and an orientation selective wet etching process is performed on the sidewalls. The oxide protects the Si at the bottom is from being etched.

Abstract: Disclosed herein are methods of controlling the etching of a layer of silicon nitride relative to a layer of silicon dioxide. In one illustrative example, the method includes providing an etch bath that is comprised of an existing etchant adapted to selectively etch silicon nitride relative to silicon dioxide, performing an etching process in the etch bath using the existing etchant to selectively remove a silicon nitride material positioned above a silicon dioxide material on a plurality of semiconducting substrates, determining an amount of the existing etchant to be removed based upon a per substrate silicon loading of the etch bath by virtue of etching the plurality of substrates in the etch bath and determining an amount of new etchant to be added to the etch bath based upon a per substrate silicon loading of the etch bath by virtue of etching the plurality of substrates in the etch bath.

Abstract: To provide an electromagnetic-wave shielding plate superior in an electromagnetic-wave shielding property, a light-transmitting property and non-visibility of a mesh pattern at low cost. A pattern of a resin layer is printed on a metal layer of a transparent substrate by a printing method. After that, the metal layer is over-etched with the resin layer used as an etching mask, and a part of the resin layer protruding from the remaining metal layer in a plate-surface direction is removed. As a result, an electromagnetic-wave shielding plate superior in an electromagnetic-wave shielding property and non-visibility and having, for example, a pattern line width of 3 ?m or more and 25 ?m or less.

Abstract: Systems and methods for detecting watermark formations on semiconductor wafers are described. In one embodiment, a method comprises providing a semiconductor wafer having at least one watermark sensitive region fabricated thereon, subjecting the wafer to a wet processing step, enhancing a susceptibility to detection of at least one watermark formation created on the at least one watermark sensitive region, and detecting the at least one watermark formation. In another embodiment, a method comprises growing a first oxide layer on a surface of a semiconductor wafer, patterning a watermark sensitive structure on the first oxide layer, depositing a silicon layer over the first oxide layer, doping a region of the silicon layer over the watermark sensitive structure with an impurity to create a watermark sensitive region that is prone to retaining watermark formations as result of a wet processing step, and growing a second oxide layer over the silicon layer.

Abstract: A method for etching a metal gate stack is provided. The method includes forming a gate stack on a substrate, where the gate stack includes a metal gate. A wet etch process is performed on the gate stack. The wet etch process includes submersing the substrate with the gate stack in an aqueous solution composed of a wet etchant and an oxidizer, removing the substrate from the solution and rinsing the solution from the etched gate stack.

Abstract: The use of surfactants A, the 1% by weight aqueous solutions of which exhibit a static surface tension <25 mN/m, the said surfactants A containing at least three short-chain perfluorinated groups Rf selected from the group consisting of trifluoromethyl, pentafluoroethyl, 1-heptafluoropropyl, 2-heptafluoropropyl, heptafluoroisopropyl, and pentafluorosulfanyl; for manufacturing integrated circuits comprising patterns having line-space dimensions below 50 nm and aspect ratios >3; and a photolithographic process making use of the surfactants A in immersion photoresist layers, photoresist layers exposed to actinic radiation, developer solutions for the exposed photoresist layers and/or in chemical rinse solutions for developed patterned photoresists comprising patterns having line-space dimensions below 50 nm and aspect ratios >3.