Abstract: A solid state imaging device improving and stabilizing imaging characteristic by optimizing a location of a positive hole accumulation layer to an electrode at the periphery of a light receiving portion, and having light receiving portions formed on a substrate and electrodes formed on the substrate at the periphery of the light receiving portion, each electrode including at least a first electrode to which a positive voltage is applied and a second electrode to which only 0 volt or a negative polarity voltage is applied, each light receiving portion having a signal charge accumulation region formed on the substrate and a positive hole accumulation region formed in a surface layer portion of the signal charge accumulation region, each positive hole accumulation region arranged at a distance from the first electrode and arranged so as. to overlap the second electrode, and method of producing the same and a camera.

Abstract: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.

Abstract: A solid-state image pickup device is provided in which a pixel forming region 4 and a peripheral circuit forming region 20 are formed on the same semiconductor substrate, a first element isolation portion is formed by an element isolation layer 21 in which an insulating layer is buried into a semiconductor substrate 10 in the peripheral circuit forming region 20, a second element isolation portion is composed of an element isolation region 11 formed within the semiconductor substrate 10 and an element isolation layer 12 projected in the upper direction from the semiconductor substrate 10 in the pixel forming region 4 and an element isolation layer 21 of the first element isolation portion and the element isolation layer 12 of the second element isolation portion contain the same insulating layers 17, 18 and 19. This solid-state image pickup device has a structure capable of suppressing a noise relative to a pixel signal and which can be microminiaturized in the peripheral circuit forming region.

Abstract: A method for reducing dark current within a charge-coupled device, the method includes each gate phase n having a capacitance Cn, voltage change on the gate phase n given by ?Vn such ? n ? C n ? ? ? ? V n ? 0 ; for the first time period, maintaining a set of first gate phases holding charge in the accumulated state and maintaining a set of second gate phases not holding charge in the depleted state; for a second time period, clocking the charge into a set of third gate phases in the depleted state and clocking the second set of gate phases not holding charge into the accumulated state; for a third time period, clocking the third set of gate phases holding the charge into the accumulated state and clocking a fourth set of gates not holding the charge into the depletion state; wherein the second time period is shorter than the first and third time periods.

Abstract: An imager having gates with spacers formed of a high dielectric material. The high dielectric spacer provides larger fringing fields for charge transfer and improves image lag and charge transfer efficiency.

Abstract: It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased.

Abstract: A molecular single electron transistor (MSET) detector device (14) is described that comprises at least one organic molecule (87) connecting a drain electrode (84) and a source electrode (82). In use, said at least one organic molecule (87) provides a quantum confinement region. At least one analyte receptor site (90, 92) is provided in the vicinity of said at least one organic molecule (87) that bind molecules of interest (analytes). A fluid analyser (2) is also described that includes the MSET detector, a pre-concentrator (4) and a fluid gating structure (6). The fluid gating structure (6) is arranged to selectively route fluid from the pre-concentrator (4) to either one of the detector (14) and an exhaust port (12). The pre-concentrator (4), fluid gating structure (6) and detector (14) are each formed as substantially planar layers and arranged in a stack or cube.

Abstract: An image sensor and a method of manufacturing the image sensor, wherein the image sensor can electrically connect a light receiving portion and a printed circuit board (PCB) including circuits by forming holes and filling the holes with a conductive material, without using a wire for the electrical connection between the light receiving portion and the PCB. The light receiving portion converts lights into electrical signals and the PCB electrically processes signals. That is, since a distance for a wire between a sealing structure and because a filter is unnecessary, a thickness may be reduced. Also, since a space for wire bonding is unnecessary on the outside of an image sensor, a fill factor may increase. Also, since a process that may cause contaminates is removed, average yield may increase and production cost may decrease. The manufacturing productivity may be improved.

Abstract: A method for manufacturing a solid-state image capturing apparatus including a pixel array constituted of a plurality of pixels, is provided, where each of the plurality of pixels includes a photoelectric conversion section, the method comprising the steps of: forming an impurity diffusion area in a surface area of a semiconductor substrate; and forming a plurality of different impurity diffusion areas in the surface area of the semiconductor substrate, other than the impurity diffusion area constituting the photoelectric conversion section.

Abstract: A wafer for backside illumination type solid imaging device has a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side, wherein said wafer is a SOI wafer obtained by forming a given active layer on a support substrate made of C-containing n-type or p-type semiconductor material through an insulating layer.

Abstract: A CMOS image sensor may include at least one of: a semiconductor substrate over which a photodiode and transistors are formed; passivation layers formed over a semiconductor substrate; and color PRs buried in trenches formed in the passivation layers and formed to be higher than the trenches.

Abstract: There are provided a semiconductor substrate 101 on which solid-state imaging devices are formed, and a translucent member 201 provided onto a surface of the semiconductor substrate such that spaces are provided to oppose to light receiving areas of the solid-state imaging devices, wherein external connecting terminals are arranged on an opposing surface of the semiconductor substrate 101 to a solid-state imaging device forming surface, and the external connecting terminals are connected to the solid-state imaging devices via through-holes provided in the semiconductor substrate 101.

Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.

Abstract: A solid state imaging apparatus comprises a semiconductor substrate, photoelectric conversion elements, a vertical electric charge transferring device, a horizontal electric charge transferring device that temporarily stores the signal electric charges transferred from the vertical electric charge transferring device and transfers the signal electric charges to a horizontal direction in a sequential order, wherein the horizontal electric charge transferring device comprises at least two lines of horizontal shift registers and an electrode structure with which one-- shift register can transfer the signal electric charges to a direction that is 180 degrees different from another shift register and also can transfer the signal electric charges to a same direction as the another shift register continuously with the other shift register by changing driving of at least one of the shift registers, and output detecting devices.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.

Abstract: Provided is a manufacturing method of a CCD solid-state imaging device having such an impurity concentration distribution with which shading is reduced and formation of a buried channel endowed with a large saturation signal charge amount is made possible. The manufacturing method includes: an oxide layer forming step of forming an oxide layer (12) on a semiconductor substrate (11); an ion implantation step of performing ion implantation through the oxide layer (12) to the semiconductor substrate (11) thereby forming a well in a position corresponding to a charge transfer portion; and an insulation layer forming step of performing insulation layer forming processing to the oxide layer (12) having undergone the ion implantation step, at least in a position corresponding to the well.

Abstract: It is an object to provide solid-state imaging device, which can easily be manufactured and has a high reliability, and a method of manufacturing the solid-state imaging device. In the present invention, a manufacturing method comprises the steps of forming a plurality of IT-CCDs on a surface of a semiconductor substrate, bonding a translucent member to the surface of the semiconductor substrate in order to have a gap opposite to each light receiving region of the IT-CCD, and isolating a bonded member obtained at the bonding step for each of the IT-CCDs.

Abstract: The prevent invention is to provide a solid-state imaging device having a electrode configuration applicable to a progressive scan, and able to reduce a obstruction of incident light at the periphery of a light receiving portion, a method of producing the same, a camera including the same. A first transfer electrode, a second transfer electrode, and a third transfer electrode which have a single layer transfer electrode configuration are repeatedly arranged in a vertical direction. The first transfer electrodes are connected in a horizontal direction by an inter-pixel interconnection formed in the same layer. Shunt interconnections are formed in the horizontal direction and in the vertical direction above the transfer layers. The shunt interconnection connected to the second transfer interconnection is formed on the inter-pixel interconnection. The shunt interconnection connected to the third transfer electrode is formed above the transfer electrodes.

Abstract: What is disclosed is an apparatus comprising a transfer gate formed on a substrate and a photodiode formed in the substrate next to the transfer gate. The photodiode comprises a shallow N-type collector formed in the substrate, a deep N-type collector formed in the substrate, wherein a lateral side of the deep N-type collector extends at least under the transfer gate, and a connecting N-type collector formed in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. Also disclosed is a process comprising forming a deep N-type collector in the substrate, forming a shallow N-type collector formed in the substrate, and forming a connecting N-type collector in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector.

Abstract: In a solid state imaging device, and a method of manufacture thereof, the efficiency of the transfer of available photons to the photo-receiving elements is increased beyond that which is currently available. Enhanced anti-reflection layer configurations, and methods of manufacture thereof, are provided that allow for such increased efficiency. They are applicable to contemporary imaging devices, such as charge-coupled devices (CCDs) and CMOS image sensors (CISs). In one embodiment, a photosensitive device is formed in a semiconductor substrate. The photosensitive device includes a photosensitive region. An anti-reflection layer comprising silicon oxynitride is formed on the photosensitive region. The silicon oxynitride layer is heat treated to increase a refractive index of the silicon oxynitride layer, and to thereby decrease reflectivity of incident light at the junction of the photosensitive region.

Abstract: Crosstalk between the adjacent pixels can be prevented by a structure in which an overflow barrier is provided at the deep portion of a substrate. A partial P type region 150 is provided at the predetermined position of a lower layer region of the vertical transfer register 124 and a channel stop region 126. This P type region 150 is used to adjust potential in the lower layer region of the vertical transfer register 124 and the channel stop region 126 so that the potential may become smaller than that of the lower layer region of the photosensor 122 in a range from the minimum potential position of the vertical transfer register 124 to the overflow barrier 128. Accordingly, since the potential in the lower layer region of the vertical transfer register 124 and the channel stop region 126 at both sides of the lower layer region is low, electric charges photoelectrically-converted by the sensor region are blocked by this potential barrier and cannot be diffused easily.

Abstract: A CMOS imager and non-volatile memory are integrated on a single substrate along with logic and support circuitry for decoding and processing optical information received by the CMOS imager. A protective layer covers the non-volatile memory contained on the substrate for blocking light received by the CMOS imager. The protective layer can be a metal layer used as an interconnect over other areas of the substrate or an opaque layer provided during the fabrication process. Integrating a CMOS imager, non-volatile memory and peripheral circuitry for decoding and processing optical information received by the CMOS imager allows for a single chip image sensing device, such as a digital camera.

Abstract: Low leakage contacts on leakage sensitive areas of a CMOS imager, such as a floating diffusion region or a photodiode, are disclosed. At least one low leakage polysilicon contact is provided over a leakage sensitive area of a CMOS imager. The polysilicon contact comprises a polysilicon region in direct contact with the area of interest (the leakage sensitive area) and a metal region located over the polysilicon region. The polysilicon contact provides an improved ohmic contact with less leakage into the substrate. The polysilicon contact may be provided with other conventional metal contacts, which are employed in areas of the CMOS imager that do not require low leakage.

Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: Embodiments relate to an image sensor and a method for manufacturing the same. According to embodiments, a semiconductor substrate may include a pixel part and a peripheral part. A photo diode pattern may be formed over the pixel part having a height that is greater than a height of a surface of an interlayer dielectric film over the peripheral part. A device isolation film and a metal layer may be provided over the photodiode and over interlayer dielectric film over the peripheral part. A planarization layer may be provided and may compensate for a height difference so that a first metal film pattern connected to the photo diode pattern and a second metal film pattern connected to the metal wire in peripheral part may be simultaneously formed by patterning the planarization layer and metal film.

Abstract: An image sensor and a method of manufacturing the same, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.

Abstract: A method of dividing a wafer having a plurality of devices, which are formed in a plurality of areas sectioned by streets formed in a lattice pattern on the front surface and test metal patterns which are formed on the streets, having a metal pattern breaking step for forming a break line in the test metal patterns by applying a pulse laser beam having permeability to the wafer to the rear surface of the wafer with its focal point set near the test metal patterns; a deteriorated layer forming step for forming a deteriorated layer along the streets above the break lines in the inside of the wafer by applying a pulse laser beam having permeability to the wafer to the rear surface of the wafer with its focal point set to a position above the break lines in the inside of the wafer; and a dividing step.

Abstract: A method and apparatus providing an integrated circuit having a plurality of gate stack structures having gate oxide layers with differing thicknesses and nitrogen concentrations and gate electrodes with differing conductivity types and active dopant concentrations.

Abstract: A solid-state imaging device capable of reducing an eclipse (blocking) of an incident light at a circumferential portion of a light receiving portion and realizing a larger angle of view and high-speed driving. A single-layer transfer electrode configuration of forming first transfer electrodes and second transfer electrodes by one polysilicon layer is adopted. Two shunt wirings extending in a horizontal direction are formed on the first transfer electrodes connected in a horizontal direction and, for example, four-phase transfer pulses are supplied to first transfer electrodes and second transfer electrodes on transfer channels through low-resistance shunt wirings extending in the horizontal direction.

Abstract: A CMOS image sensor (CIS) process is described. A semiconductor substrate is provided, and then a gate dielectric layer, a gate material layer and a thickening layer are sequentially formed on the substrate, wherein the thickening layer includes at least a hard mask layer. The thickening layer is defined to form a transfer-gate pattern, and then the transfer-gate pattern is used as an etching mask to pattern the gate material layer and form a transfer gate. Ion implantation is then conducted to form a PN diode in the substrate with the transfer-gate pattern and the transfer gate as a mask.

Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.

Abstract: Disclosed is a solid-state imaging device includes for each pixel a photoelectric conversion unit, a charge accumulating portion, and a potential barrier provided between the photoelectric conversion unit and the charge accumulating portion, in a thickness direction of a substrate. When light is received, a first charge derived from one of electron-hole pairs generated by photoelectric conversion is accumulated in the photoelectric conversion unit as signal charge, and the potential barrier is modulated by a second charge derived from the other of the electron-hole pairs so that the first charge that has accumulated in the charge accumulating portion is supplied to the photoelectric conversion unit.

Abstract: A solid-state imaging device includes: a semiconductor substrate; photoelectric conversion elements; vertical charge transfer paths that transfer charges generated in photoelectric conversion elements, in a vertical direction; a horizontal charge transfer path that transfers the charges transferred in vertical charge transfer paths, in a horizontal direction orthogonal to the vertical direction; a plurality of charge accumulating sections between the vertical charge transfer paths and the horizontal charge transfer path; a plurality of electrodes disposed above the respective charge accumulating sections, the plurality of electrodes being classified into a plurality of kinds of electrodes; wirings corresponding to the respective kinds of electrodes and extending in the horizontal direction above the plurality of electrodes; and a planarizing layer disposed between the wirings and an uneven surface caused by the plurality of electrodes that are present in areas overlapping the wirings, so as to planarize the u

Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.

Abstract: A solid-state imaging device includes a semiconductor substrate including: a plurality of light-receptive portions that are arranged one-dimensionally or two-dimensionally; a vertical transfer portion that transfers signal electric charge read out from the light-receptive portions in a vertical direction; a horizontal transfer portion that transfers the signal electric charge transferred by the vertical transfer portion in a horizontal direction; a barrier region adjacent to the horizontal transfer portion, the barrier region letting only surplus electric charge of the horizontal transfer portion pass therethough; a drain region adjacent to the barrier region, into which the surplus electric charge passing through the barrier region is discharged; and an insulation film adjacent to the drain region. A portion of the drain region is located beneath the insulation film.

Abstract: A solid-state imaging device having an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.

Abstract: An image sensor is disclosed where individual photo diodes of the respective unit cells separated by an element isolating layer are physically integrated into a single large scale pixel formed widely on a semiconductor substrate so as to hold the pixels in common. A pixel separation pattern is additionally formed on a portion of the large scale photo diode formed so as to electrically separate them. An optimization of the light receiving area of the photo diode, a minimization of the intrusion area of an element isolating layer, and so on are achieved, so that the photo diode recovers an area occupied by an intrusion of the element isolating layer, thus maximizing the light receiving area in an optimal scale and easily preventing electrical impacts between the respective unit cells.

Abstract: An image sensor includes a photoelectric conversion section in a semiconductor substrate, the photoelectric conversion section having a capping layer of a first conductivity type and a photodiode of a second conductivity type below the capping layer, the photodiode having an upper surface deeper than about 1 ?m, as measured from an upper surface of the semiconductor substrate, a charge detection section receiving charges stored in the photoelectric conversion through a charge transfer section and converting the received charges into respective electrical signals, a voltage application section adapted to apply voltage to the capping layer and to a lower portion of the semiconductor substrate to control a width of a depletion layer on the photodiode, and a signal operation section adapted to generate red, green, and blue, signals according to signals from the charge detection section.

Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.

Abstract: A solid-state imaging device includes a plurality of pixels two-dimensionally arrayed in a well region disposed on a semiconductor substrate, each pixel including a photoelectric conversion section having a charge accumulation region which accumulates signal charge; an element isolation layer which is disposed on the surface of the well region along the peripheries of the individual charge accumulation regions and which electrically isolates the individual pixels from each other; and a diffusion layer which is disposed beneath the element isolation layer and which electrically isolates the individual pixels from each other, the diffusion layer having a smaller width than that of the element isolation layer. Each charge accumulation region is disposed so as to extend below the element isolation layer and be in contact with or in close proximity to the diffusion layer.

Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.

Abstract: A semiconductor apparatus comprises: a light input/output portion provided in an upper portion of a semiconductor substrate, the light input/output portion having an opening region for light associated to the light input/output portion to pass through; a transparent film covering the opening region; and an interlayer lens provided on the transparent film, the interlayer lens positioned such that an optical axis of the interlayer lens is parallel to a central axis of the opening region.

Abstract: The substrate with electrodes is formed of a transparent material onto which is deposited a film (1) of a transparent conductive material of thickness e1 and of refractive index n1, said film being structured to form a set of electrodes (1a) whose contours (8) delimit insulating spaces (3), wherein the insulating spaces (3) are filled with a transparent dielectric material of thickness e2 and of refractive index n2 so that the respective thicknesses of the conductive material and the dielectric material are inversely proportional to the values of the refractive indices of said materials and said dielectric material forms neither depressions nor beads at the contour (8) of the electrodes. A hardcoating layer (7) may be disposed between the substrate (5) and the electrodes and a protective film (9) added. The substrate with electrodes is obtained by UV irradiation through a single mask.

Abstract: A solid state image pickup device is provided which includes: charge accumulation regions disposed in a semiconductor substrate in a matrix shape; a plurality of vertical transfer channels formed in the semiconductor substrate each in a close proximity to each column of the charge accumulation regions; vertical transfer electrodes formed above the vertical transfer channels; a channel protective impurity layer formed just under the vertical transfer channel and surrounding the charge accumulation region; one or more pixel separation impurity layers formed under the channel protective impurity layer and at a position facing the channel protective impurity layer; an overflow barrier region having a peak position of an impurity concentration at a position deeper than the pixel separation impurity layer, the peak position of the impurity concentration being at a depth of 3 ?m or deeper from a surface of the semiconductor substrate; and a horizontal CCD for transferring signal charges transferred from the vertical

Abstract: A CMOS image sensor and a method for fabricating the same in which color balance is enhanced by forming photodiodes to have a depth varied according to the wavelength of incident light to be received through a color filter layer. The predetermined depth varies, from shallow to deep, as the wavelength of the band of incident light increases, such that the predetermined depth is shallowest for the shortest wavelength, e.g., blue light, of the bands of incident light and is deepest for the longest wavelength, e.g., red, of the bands of incident light.

Abstract: An apparatus that can effectively operate in high temperatures including a CMOS image sensor, a thermoelectric semiconductor formed under the CMOS image sensor for selectively cooling the image sensor and a heat sink formed under the thermoelectric semiconductor.

Abstract: A giant magnetoresistive memory device includes a magnetic sense layer, a magnetic storage layer, a non-magnetic spacer layer between the magnetic sense layer and the magnetic storage layer, and an antiferromagnetic layer formed in proximity to the magnetic storage layer. The antiferromagnetic layer couples magnetically in a controlled manner to the magnetic storage layer such that the magnetic storage layer has uniform and/or directional magnetization. Additionally or alternatively, an antiferromagnetic layer may be formed in proximity to the magnetic sense layer. The antiferromagnetic layer in proximity to the magnetic sense layer couples magnetically in a controlled manner to the magnetic sense layer such that the magnetic sense layer has uniform and/or directional magnetization.

Abstract: The present invention aims to provide a solid-state apparatus and a manufacturing method thereof, the solid-state apparatus having both high transfer efficiency in a horizontal transfer CCD and efficient breakdown voltage in a vertical transfer CCD and including a semiconductor substrate 110, first layer poly-silicon electrodes 120 and second layer poly-silicon electrodes 130 which form two layered overlap poly-silicon electrodes, an embedded channel region 140 which is formed in a surface unit of the semiconductor substrate 110 and becomes a transfer path for signal charge, and a photodiode region where photodiodes are aligned two-dimensionally, the photodiodes converting light into signal charge and accumulating the signal charge, wherein an inter-electrode distance c in the horizontal transfer CCD is shorter than an inter-electrode distance a in the vertical transfer CCD.

Abstract: A method of driving a solid-state image sensing device comprises plural photoelectric conversion devices arranged in rows and columns perpendicular to the rows, VCCDs through which charges generated by the photoelectric conversion devices are transferred in the column direction, and an HCCD through which the charges transferred from the VCCDs are transferred in the row direction. The photoelectric conversion devices include plural photoelectric conversion device rows including the photoelectric conversion devices arranged in the rows include first photoelectric conversion device rows each of which different kinds of photoelectric conversion devices are mixed and second photoelectric conversion device rows each of which has one kind of photoelectric conversion devices.

Abstract: A method for fabricating a micro structure includes depositing a first layer of a first material over a substrate; patterning a first hard mask over the first layer; depositing a second layer of a second material over the first layer and the first hard mask; patterning a second hard mask over the second layer; and selectively removing the first material and the second material not covered by any of the first mask and the second mask to produce over the substrate the micro structure having a first structure portion having a first height and a second structure portion having a second height.