With Substrate Handling During Coating (e.g., Immersion, Spinning, Etc.) Patents (Class 438/782)
-
Patent number: 6756249Abstract: A method of manufacturing an organic electroluminescent device has the steps of forming a first electrode on a substrate, preparing a solution containing a hole transport organic material, an electron transport organic material and a luminescent organic material, followed by spraying the solution onto the first electrode by using a pressurized gas so as to form an organic thin film layer, and forming a second electrode on the organic thin film layer.Type: GrantFiled: October 11, 2002Date of Patent: June 29, 2004Assignee: President of Toyama UniversityInventors: Shigeki Naka, Tadahiro Echigo, Hiroyuki Okada, Hiroyoshi Onnagawa
-
Patent number: 6756322Abstract: A method with which all semiconductor lasers can be used as products is provided by regulating reflectance variations of all the semiconductor laser end faces arranged in an electron beam deposition apparatus after completion of deposition to a predetermined range when semiconductor laser end faces are coated. An end face (3) that is placed at a position at which the film thickness is made relatively thicker than those of other coat batches due to the large flux of a deposition beam is inclined by an angle &bgr; to adjust the incident angle of the deposition beam. The relationship, actual film thickness (9b)=film thickness (9b) in direction of deposition beams central axis (8a)×cos &bgr;, is utilized to reduce the film thickness of the end face (3) to the predetermined range.Type: GrantFiled: November 28, 2001Date of Patent: June 29, 2004Assignee: Sharp Kabushiki KaishaInventor: Masayuki Ohta
-
Publication number: 20040121618Abstract: A liquid form adhesive system is provided for spin-coating on wafers and mounting to rigid carrier substrates to support thinning and backside processing. The liquid adhesive comprises about 30-35% of a rosin, between 5-10% of a thermoplastic urethane, a nonionic surfactant present between 1-3%, and a trace of an ultraviolet fluorescing dye. The entire system is dissolved in 50-65%, by weight, of a dual solvent mixture composed of dimethylacetamide and propylene glycol monomethyl ether. When the mixture is made to a specific viscosity, filtered, applied by a spin-coating method to the wafer frontside surface, and cured, the result is a uniform and smooth surface of defined thickness. When the coated wafer is mounted to a rigid substrate, it may be mechanically thinned to thicknesses down to and beyond 25 um, depending upon the wafer composition, diameter, and process.Type: ApplicationFiled: December 20, 2002Publication date: June 24, 2004Inventor: John C. Moore
-
Patent number: 6753270Abstract: The present invention relates to a method for providing a dielectric film having a low dielectric constant that is particularly useful as an intermetal dielectric layer. The method of the present invention deposits a porous oxide gap fill layer from a process gas of ozone and TEOS. The gap fill layer is deposited over a surface sensitive lining layer (as opposed to a non-surface sensitive layer as is commonly done in the industry) using deposition conditions that maximize the amount of carbon that is incorporated into the gap fill layer and result in a porous silicon oxide film. A typical SACVD ozone/TEOS gap fill layer has a carbon content of about 2-3 atomic percent (at. %). An SACVD ozone/TEOS gap fill layer deposited according to the present, however, has a carbon content of at least 5 at. % and preferably has a carbon content of between about 7-8 at. %.Type: GrantFiled: August 4, 2000Date of Patent: June 22, 2004Assignee: Applied Materials Inc.Inventors: Fabrice Geiger, Frederic Gaillard
-
Publication number: 20040115956Abstract: Since a first processing unit group that forms an interlayer insulating film under atmospheric pressure and a second processing unit group that performs, for example, electron beam or UV irradiation, CVD, cleaning and the like under reduced pressure or under increased pressure are configured to be integrally disposed, a time period necessary for processing can be shortened, particularly in the damascene process, and footprint per processing capacity can be reduced. Furthermore, as the processing time period is shortened in such manner, even when, for example, a porous film is used as an insulating film, the film can be restrained from absorbing moisture in the air thus deterioration in the film quality can be prevented, resulting in forming an insulating film of high quality.Type: ApplicationFiled: September 29, 2003Publication date: June 17, 2004Inventor: Hiroshi Ishida
-
Publication number: 20040110394Abstract: The coating thickness and uniformity of spin-on deposition layers on semiconductor wafers is controlled through the in situ control of the viscosity and homogeneity of the mixture of precursor material and solvent material. The thickness of the deposited material is selected and the viscosity required at a given spin rate for the selected thickness is automatically mixed. Sensing and control apparatus are employed to ensure that the uniformity and viscosity required is maintained before dispensing onto said semiconductor wafer. Low-K dielectric materials of selected thickness are deposited in a uniform coating.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Applicant: International Business Machines CorporationInventors: Edward Barth, John A. Fitzsimmons, Arthur W. Martin, Lee M. Nicholson
-
Publication number: 20040110393Abstract: The invention relates to a method for structuring an oxide layer applied to a substrate material. The aim of the invention is to provide an inexpensive method for structuring such an oxide layer. To this end, a squeegee paste that contains an oxide-etching component is printed on the oxide layer through a pattern stencil after silk screen printing and the printed squeegee paste is removed after a predetermined dwelling time.Type: ApplicationFiled: November 18, 2003Publication date: June 10, 2004Inventors: Adolf Munzer, Reinhold Schlosser
-
Patent number: 6746971Abstract: An organic memory cell made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an organic semiconductor layer and passive layer. The controllably conductive media changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.Type: GrantFiled: December 5, 2002Date of Patent: June 8, 2004Assignee: Advanced Micro Devices, Inc.Inventors: Minh Van Ngo, Sergey D. Lopatin, Suzette K. Pangrle, Nicholas H. Tripsas, Hieu T. Pham
-
Patent number: 6746888Abstract: A transmission type display includes a thin film transistor for driving a pixel electrode, which transistor is provided on a substrate, and a conductive shield layer provided at a position over the thin film transistor and under the pixel electrode. A first planarization film is formed to bury an irregular contour of the thin film transistor and the shield layer is disposed on the planarized surface of the first planarization film, and a second planarization film is formed to bury steps of the shield layer, and the pixel electrode is disposed on the planarized surface of the second planarization film. Since the transmission type display has the structure in which the conductive shield layer is put between the upper second planarization film and the lower first planarization film each of which is made from an insulating material, the shielding performance and the alignment characteristic of the display can be improved.Type: GrantFiled: September 30, 2002Date of Patent: June 8, 2004Assignee: Sony CorporationInventors: Makoto Hashimoto, Hisashi Kadota, Hirohide Fukumoto, Takusei Sato
-
Publication number: 20040099954Abstract: A method for reducing resist poisoning is provided. The method includes forming a first structure in a dielectric on a substrate and reducing amine related contaminants from the dielectric and the substrate created after the formation of the first structure. The method further includes forming a second structure in the dielectric. A first organic film may be formed on the substrate which is then heated and removed from the substrate to reduce the contaminant. Alternatively, a plasma treatment or cap may be provided. A second organic film is formed on the substrate and patterned to define a second structure in the dielectric.Type: ApplicationFiled: November 6, 2003Publication date: May 27, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Xiaomeng Chen, William Cote, Anthony K. Stamper, Arthur C. Winslow
-
Publication number: 20040102054Abstract: Briefly, in accordance with one embodiment of the invention, an edge bead removal process is performed during the manufacture of a ferroelectric memory device while a polymer solution is still wet.Type: ApplicationFiled: November 25, 2002Publication date: May 27, 2004Inventors: Michael J. Leeson, Ebrahim Andideh
-
Publication number: 20040101980Abstract: A ferroelectric thin film comprising at least two stock solutions is made so that the stock solutions are mixed homogeneously in the plane and over the thickness on a substrate, or so that the stock solutions are mixed having a distribution in the plane and over the thickness on the substrate. A ferroelectric thin film mixed homogeneously in the plane is made by discharging two stock solutions 105 and 106 separately at a fixed discharging rate by separate inkjet heads using an inkjet apparatus having at least two inkjet heads, and a ferroelectric thin film mixed homogeneously over the thickness is made by repeating this process. Moreover, a ferroelectric thin film having a distribution of the stock solutions is made by changing the discharging rate in the thickness direction or the in-plane direction.Type: ApplicationFiled: March 26, 2003Publication date: May 27, 2004Applicant: Seiko Epson CorporationInventors: Kenichi Kurokawa, Eiji Natori
-
Patent number: 6737363Abstract: A method of manufacturing a semiconductor device according to an aspect of the present invention comprises forming a low dielectric constant insulating film having a siloxane bond as main skeleton on a semiconductor substrate, causing a surfactant to permeate the low dielectric constant insulating film, and conducting a predetermined step on the low dielectric constant insulating film permeated with the surfactant in a state adapted to be exposed to water.Type: GrantFiled: September 25, 2001Date of Patent: May 18, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Hideshi Miyajima, Nobuhide Yamada, Nobuo Hayasaka, Nobuyuki Kurashima
-
Patent number: 6737364Abstract: This invention describes a new method for forming and depositing thin films of crystalline dielectric materials. The present technique uses chemical synthesis to control the granularity and thickness of the dielectric films. This method has several key advantages over existing technologies, and facilitates the integration of crystalline dielectric materials into high-density memory devices.Type: GrantFiled: October 7, 2002Date of Patent: May 18, 2004Assignee: International Business Machines CorporationInventors: Charles Black, Christopher Bruce Murray
-
Patent number: 6730620Abstract: Processing of applying ultraviolet rays to a front face of an insulating film material formed on a wafer W is performed, whereby a contact angle of the front face thereof becomes smaller. Accordingly, when an insulating film material is applied on the aforesaid front face, the material smoothly spreads, and projections and depressions never occur on a front face of an upper layer insulating film material. Thereby, it is possible to form the insulating film thick and flatter on a substrate.Type: GrantFiled: April 30, 2002Date of Patent: May 4, 2004Assignee: Tokyo Electron LimitedInventors: Kei Miyazaki, Yuichiro Uchihama, Kenji Yasuda, Kiminari Sakaguchi, Shinji Nagashima
-
Patent number: 6730538Abstract: A method for fabricating electronic devices. First, an actinide oxide semiconductor material is provided. Next, an electronic device is fabricated using the actinide oxide semiconductor material.Type: GrantFiled: June 22, 2000Date of Patent: May 4, 2004Assignee: The University of Tennessee Research CorporationInventors: Thomas T. Meek, Michael Z. Hu
-
Publication number: 20040082194Abstract: A method for coating a thick spin-on-glass layer on a semiconductor structure without cracking problems and with improved planarization is disclosed. In the method, a pre-processed semiconductor structure that has a plurality of metal lines on top is first provided. After a first conformal layer of silicon oxide is deposited on top to insulate the metal lines, a first and a second layer of SOG are coated on top to a total thickness of at least 2500 Å. On top of the second SOG layers, is then deposited a second layer of silicon oxide by a plasma enhanced oxide deposition technique to a thickness of at least 1000 Å. A third and a fourth SOG layer are then coated on top of the stress buffer layer to a total thickness of at least 2500 Å.Type: ApplicationFiled: October 29, 2002Publication date: April 29, 2004Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wen-Yi Wang, Hsin-Chieh Huang
-
Publication number: 20040082195Abstract: In this production method of a thin film device, a thin film is formed by discharging a liquid material from a nozzle in a deposition chamber to coat the liquid material onto a substrate. The substrate is then subjected to heat treatment by a first heat treatment unit and a second heat treatment unit, thereby improving the crystallinity and fitness of the film as well as its adhesion with other films.Type: ApplicationFiled: April 17, 2003Publication date: April 29, 2004Applicant: SEIKO EPSON CORPORATIONInventors: Ichio Yudasaka, Tatsuya Shimoda, Masahiro Furusawa
-
Patent number: 6727184Abstract: A method for coating a thick spin-on-glass layer on a semiconductor structure without cracking problems and with improved planarization is disclosed. In the method, a pre-processed semiconductor structure that has a plurality of metal lines on top is first provided. After a first conformal layer of silicon oxide is deposited on top to insulate the metal lines, a first and a second layer of SOG are coated on top to a total thickness of at least 2500 Å. On top of the second SOG layers, is then deposited a second layer of silicon oxide by a plasma enhanced oxide deposition technique to a thickness of at least 1000 Å. A third and a fourth SOG layer are then coated on top of the stress buffer layer to a total thickness of at least 2500 Å.Type: GrantFiled: October 29, 2002Date of Patent: April 27, 2004Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Wen-Yi Wang, Hsin-Chieh Huang
-
Publication number: 20040077140Abstract: A uniformly thick oxide film on a substrate is formed by using an anodization apparatus which deposits a blanket precursor film on a surface of a substrate; provides electrical contact to the precursor film; moves the precursor film into contact with an electrolyte solution such that substantially all electrically conductive surfaces, e.g., pin contacts, the substrate edge and a backside of the substrate are electrically isolated from the electrolyte; ensures that the surface of the precursor film on the substrate is in direct contact with the electrolyte solution; and which applies an anodizing current and/or voltage between the precursor film and a counter electrode so as to compensate for a voltage drop resulting from the presence of the electrolyte.Type: ApplicationFiled: October 16, 2002Publication date: April 22, 2004Inventors: Panayotis C. Andricacos, Roy Arthur Carruthers, Stephan Alan Cohen, John Michael Cotte, Lynne M. Gignac, Kenneth Jay Stein, Keith T. Kwietniak, Seshadri Subbanna, Horatio Seymour Wildman, David Earle Seeger, Andrew Herbert Simon
-
Publication number: 20040077173Abstract: By making a bottom anti-reflective coating that is soluble in aqueous solutions, the bottom anti-reflective coating may be removed in the same process used to remove the exposed photoresist. This may reduce defects and poor selectivity to photoresist in some embodiments during the etching of the bottom anti-reflective coating and avoids the need to separately etch the exposed bottom anti-reflective coating in some embodiments.Type: ApplicationFiled: October 17, 2002Publication date: April 22, 2004Inventor: Swaminathan Sivakumar
-
Patent number: 6723633Abstract: For suppressing decomposition of an organic group (for example, a CH3 group) which is bonded to an Si atom of an organic SOG film for use in a flattening process at the time of an ashing process, there is provided a method comprising the steps of: forming an organic SOG layer directly on a lower wiring layer or on a predetermined film including a hillock protection layer which is formed on the lower wiring layer in advance; forming an upper wiring layer on the organic SOG layer without using an etching back process; forming a via hole through an etching process by using a patterned resist layer provided on the upper wiring layer as a mask; performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant, under an atmospheric pressure ranging from 0.01 Torr to 30.0 Torr; and filling said via hole with a conductive material so as to electrically connect the lower wiring layer to the upper wiring layer.Type: GrantFiled: November 7, 2002Date of Patent: April 20, 2004Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Hiroyuki Iida, Kazuto Ohbuchi, Atsushi Matsushita, Yoshio Hagiwara
-
Publication number: 20040072450Abstract: Described are methods and apparatuses useful for spin-coating process solutions onto substrates, wherein the methods and apparatuses incorporate a pressure sensor to detect the pressure of a process solution, such as a pressure related to a beginning or end of a dispense of process solution from a dispenser; some preferred methods and apparatuses measure pressure of a photoresist, developer, water, solvent, or cleaner in a dispense line; and some preferred methods and apparatuses incorporate process control systems involving interrupted, parallel control methods.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Jimmy D. Collins, Samuel A. Cooper
-
Patent number: 6720276Abstract: Methods of forming a spin-on-glass (SOG) layer are disclosed. An SOG layer is formed on an integrated circuit substrate. A first curing process is performed on the SOG layer. Less than all of the SOG layer is removed from the integrated circuit substrate through a mask pattern on the SOG layer to provide a remaining portion of the SOG layer on the integrated circuit substrate. A second curing process is performed on the SOG layer. The remaining portion of the SOG layer is removed to expose the integrated circuit substrate.Type: GrantFiled: January 30, 2002Date of Patent: April 13, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Min-hee Cho, Chang-hyun Cho, Soo-ho Shin, Hong-sik Jeong
-
Patent number: 6716773Abstract: A process for producing semiconductor substrates with a coating film having excellent chemical resistance with high yield and excellent production reliability without any development of cracks and any generation or collection of foreign matter resulting from a projected portion of the coating film, which includes the steps of: (a) forming a coating film by coating an insulating film-forming coating liquid on a substrate mounted on a rotating disc of a spin coater according to a spin coating method; and (b) removing the projected portion of the coating film formed at a periphery of the substrate by ejecting a solvent through a nozzle moving from any point on a line drawn between the periphery edge and a center of the substrate toward the periphery edge while rotating the substrate.Type: GrantFiled: September 19, 2002Date of Patent: April 6, 2004Assignee: Catalysts & Chemicals Industries Co., Ltd.Inventors: Miki Egami, Ryo Muraguchi
-
Patent number: 6716563Abstract: This invention relates to nano-lithography with &pgr;-conjugated azo dyes and azo-metal complexes represented by formula 1 or formula 2(Korea Pat. Appln. Nos. 2001-6879˜6880), which has both electron-donating and electron-accepting groups in the molecular structures, as a resist on Si substrate by using an AFM anodization. lithography. Developing optimum conditions of scan speed, bias voltage, and resist materials are key issues for achieving a high resolution patterning on various substrates. We accomplished nanometer-scale patterning in approximately 35 nm dimensions.Type: GrantFiled: August 8, 2002Date of Patent: April 6, 2004Assignee: Hanyang Hakwon Co., Ltd.Inventors: Haiwon Lee, Hyeyoung Park
-
Patent number: 6716478Abstract: A coating area of wafer W is divided into, for example, three regions. The wafer W and/or a supply nozzle are driven in a predetermined coating direction and/or a coating direction such that coating start positions of the adjacent divided regions are not next to each other and/or the coating is not continuously performed in order of a coating end position and a coating start position when the coating end position of one region of the adjacent divided regions and the coating start position of the other region are adjacent to each other, whereby forming a liquid film of a resist liquid for each divided region of the surface of wafer W. As a result, a phenomenon, in which the resist liquid is drawn to the coating start position, so as to increase the film thickness of this portion, occurs in only the corresponding region. Resultantly, uniformity of an inner surface of the film thickness can be improved.Type: GrantFiled: March 13, 2002Date of Patent: April 6, 2004Assignee: Tokyo Electron LimitedInventors: Takahiro Kitano, Masateru Morikawa, Yukihiko Esaki, Nobukazu Ishizaka, Norihisa Koga, Kazuhiro Takeshita, Hirofumi Ookuma, Masami Akimoto
-
Patent number: 6709699Abstract: Disclosed is a film-forming method, comprising dispensing from a dispenser nozzle a coating solution, which is prepared by adding a solid component to a solvent and controlled to be spread on the substrate in a predetermined range, onto a target substrate to be processed while relatively moving the dispenser nozzle and the target substrate so as to form a liquid film on the entire surface of the target substrate, and arranging a sucking nozzle above and apart from the target substrate such that the sucking nozzle is not in contact with the surface of the liquid film so as to permit the sucking nozzle to suck the solvent vapor right under the sucking nozzle while moving the sucking nozzle relative to the target substrate, thereby removing the solvent from the liquid film and, thus, forming a coated film.Type: GrantFiled: September 25, 2001Date of Patent: March 23, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuhiko Ema, Shinichi Ito, Katsuya Okumura
-
Patent number: 6706322Abstract: A drive pulley is disposed to a driving motor. A plurality of follower pulleys are disposed to a rotating shaft of a spin chuck that vacuum sucks a substrate. A belt is passed from one follower pulley to the drive pulley. Belts are passed from the other follower pulleys to the drive shafts of a plurality of air motors. Since the air motors assist the driving of the driving motor, a large substrate can be rotated at a predetermined rotating acceleration. Thus, a film forming apparatus and a film forming method that allow the quantity of process solution supplied to be reduced and a film of process solution to be equally formed on a substrate can be provided.Type: GrantFiled: February 5, 2002Date of Patent: March 16, 2004Assignee: Tokyo Electron LimitedInventors: Kiyohisa Tateyama, Tsutae Omori
-
Patent number: 6706646Abstract: A spin-on glass (SOG) composition and a method of forming a silicon oxide layer utilizing the SOG composition are disclosed. The method includes coating on a semiconductor substrate having a surface discontinuity, an SOG composition containing perhydropolysilazane having a compound of the formula —(SiH2NH)n— wherein n represents a positive integer, a weight average molecular weight within the range of about 4,000 to 8,000, and a molecular weight dispersion within the range of about 3.0 to 4.0, to form a planar SOG layer. The SOG layer is converted to a silicon oxide layer with a planar surface by curing the SOG layer. Also disclosed is a semiconductor device made by the method.Type: GrantFiled: October 12, 2000Date of Patent: March 16, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Ho Lee, Jung-Sik Choi, Hong-Ki Kim, Dong-Jun Lee, Dae-Won Kang, Sang-Mun Chon
-
Patent number: 6699729Abstract: A method of planarizing an image sensor substrate is disclosed. The method comprises depositing a first polymer layer over the image sensor substrate. The first polymer layer is patterned to form pillars. Then, a second polymer layer is deposited over the pillars. Optionally, the second polymer layer is etched back.Type: GrantFiled: October 25, 2002Date of Patent: March 2, 2004Assignee: OmniVision International Holding LtdInventor: Katsumi Yamamoto
-
Patent number: 6693050Abstract: A method of filling a plurality of trenches etched in a substrate. In one embodiment the method includes depositing a layer of spin-on glass material over the substrate and into the plurality of trenches; exposing the layer of spin-on glass material to a solvent; curing the layer of spin-on glass material; and depositing a layer of silica glass over the cured spin-on glass layer using a chemical vapor deposition technique.Type: GrantFiled: May 6, 2003Date of Patent: February 17, 2004Assignee: Applied Materials Inc.Inventors: Zhenjiang Cui, Rick J. Roberts, Michael S. Cox, Jun Zhao
-
Patent number: 6693049Abstract: A method for filling a fine hole, having a hole pattern diameter of less than or equal to 0.18 &mgr;m including steps of: (i) filling the fine hole with filler which is obtained by dissolving into an organic solvent a nitrogen-containing compound having mean molecular weight of less than or equal to 800 and containing at least one compound selected from melamine, benzoguanamine, acetoguanamine, glycol-uril, urea, thiourea, guanidine, alkyleneurea and succinylamide, in which hydrogen atoms of amino groups are substituted by at least one hydroxyalkyl group or an alkoxyalkyl groups or both hydroxyalkyl and alkoxyalkyl groups; (ii) drying the filler; and (iii) heating the filler at a temperature of 150-250° C., whereby no bubbles are generated when the fine hole is filled.Type: GrantFiled: April 29, 2002Date of Patent: February 17, 2004Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Etsuko Iguchi, Takeshi Tanaka
-
Patent number: 6689701Abstract: The present invention discloses a method of forming a spin on glass film which can prevent a shift of the threshold voltage of a device by curing the spin on glass film with an electron beam of energy of 6-7 kV.Type: GrantFiled: December 24, 1997Date of Patent: February 10, 2004Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Sang Ki Hong, Sang Ho Jeon, Hyug Jin Kwon
-
Patent number: 6689419Abstract: A wafer is held on the upper side of a chuck. The chuck is connected to a spin motor, a motor-pedestal seat and an air cylinder shaft. The spin motor functions to rotate the chuck while the air cylinder shaft functions to elevate the chuck. When a resist is dropped on the wafer, the air is supplied to the air cylinder concurrently with the rotation of the spin motor, thus causing the chuck to move upward while rotating. The upward movement causes a downward inertial force to act on the resist, which in turn causes the resist to be pressed against the wafer while being dispersed over the surface of the wafer.Type: GrantFiled: November 15, 2001Date of Patent: February 10, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Yoshizumi Itou
-
Publication number: 20040023515Abstract: A method of silanizing the surface of a low-k interlayer dielectric oxides (carbon doped oxides or organo-silicate glasses) to improve surface adhesion to adjacent thin film layers in damascene integration of microelectronic devices. A low-k interlayer dielectric oxide may be exposed to the vapor of a silane-coupling agent in order to modify its surface energy to improve adhesion with adjacent thin film layers. A low-k interlayer dielectric oxide can also be silanized by dipping the low-k interlayer dielectric oxide in a solution of silane-coupling agent. The silane-coupling agent will cause covalent bonds between the low-k interlayer dielectric oxide and the adjacent thin film thereby improving adhesion.Type: ApplicationFiled: August 1, 2002Publication date: February 5, 2004Inventors: David H. Gracias, Vijayakumar S. Ramachandrarao
-
Publication number: 20040023420Abstract: A method for controlling photoresist dispensation that includes providing a coater having a spin module, providing a wafer, securing the wafer to the spin module, identifying a control board in the coater for controlling the spin module, identifying at least one node on the control board that provides a plurality of control signals to the spin module, providing a means for signal analysis, electrically connecting the means for signal analysis to the at least one node on the control board, dispensing an amount of photoresist on the wafer, identifying a first control signal that causes the spin module to provide a minimum spin velocity required to break a surface tension of the photoresist, measuring the first control signal, displaying the first control signal on the means for signal analysis, and controlling a duration of photoresist dispensation to provide a consistent photoresist thickness and to conserve photoresist usage.Type: ApplicationFiled: August 2, 2002Publication date: February 5, 2004Applicant: Macromix International Co., Ltd.Inventors: Hsin-Hung Chien, Chung-Jen Chu
-
Patent number: 6680253Abstract: A system for processing a workpiece includes a base having a bowl or recess for holding a liquid. A process reactor or head holds a workpiece between an upper rotor and a lower rotor. A head lifter lowers the head holding the workpiece into contact with the liquid. The head spins the workpiece during or after contact with the liquid. The upper and lower rotors have side openings for loading and unloading a workpiece into the head. The rotors are axially moveable to align the side openings.Type: GrantFiled: July 16, 2001Date of Patent: January 20, 2004Assignee: Semitool, Inc.Inventors: Paul Z. Wirth, Steven L. Peace
-
Patent number: 6680078Abstract: A method for dispensing a flowable substance, such as a flowable photoresist, on a microelectronic substrate. The method can include dispensing a portion of the flowable substance on the microelectronic substrate, receiving an image of at least some of the flowable substance on the microelectronic substrate, and, (with reference to the image), comparing a characteristic of the image with a pre-selected characteristic, or comparing a time required to dispense the portion of the flowable substance with a pre-selected, or both. The method can further include adjusting a characteristic of the dispense process when the image differs from the pre-selected image by at least a predetermined amount, or when the time differs from the pre-selected time by at least a predetermined amount, or both.Type: GrantFiled: July 11, 2001Date of Patent: January 20, 2004Assignee: Micron Technology, Inc.Inventors: John T. Davlin, Greg Montanino
-
Publication number: 20040009304Abstract: A system and method is presented for deposing a liquid on a substrate. The print head of an ink-jet printer emits a liquid containing ink and at least one other component. An energy beam, such as a laser, with sufficient intensity substantially causes at least a partial modification, such as evaporation, of a component of the liquid, thereby altering the drying profile. The ink deposed on the substrate may be used to create devices such as organic transistors and OLEDs.Type: ApplicationFiled: July 9, 2002Publication date: January 15, 2004Applicant: Osram Opto Semiconductors GmbH & Co. OGHInventors: Karl Pichler, Matthias Stoessel
-
Patent number: 6669779Abstract: Systems and methods are described for improved yield and line width performance for liquid polymers and other materials. A method for minimizing precipitation of developing reactant by lowering a sudden change in pH includes: developing at least a portion of a polymer layer on a substrate with an initial charge of a developer fluid; then rinsing the polymer with an additional charge of the developer fluid so as to controllably minimize a subsequent sudden change in pH; and then rinsing the polymer with a charge of another fluid. An apparatus for minimizing fluid impingement force on a polymer layer to be developed on a substrate includes: a nozzle including: a developer manifold adapted to supply a developer fluid; a plurality of developer fluid conduits coupled to the developer manifold; a rinse manifold adapted to supply a rinse fluid; and a plurality of rinse fluid conduits coupled to the developer manifold.Type: GrantFiled: March 5, 2001Date of Patent: December 30, 2003Assignee: ASML Holding N.V.Inventors: Emir Gurer, Ed C. Lee, Murthy Krishna, Reese Reynolds, John Salois, Royal Cherry
-
Patent number: 6670287Abstract: A closed space is formed in a reduced pressure drying station, and the closed space is brought to a vacuum state. In this state, an EB unit irradiates a wafer mounted on a hot plate with an electron beam to foam an insulating film material. Subsequently, the hot plate is raised to a predetermined temperature, and drying processing is performed under a reduced pressure. As described above, since the foaming processing is performed in the reduced pressure drying station, bubbles remain in the insulating film, so that the existence of the bubbles can decrease the relative dielectric constant.Type: GrantFiled: May 22, 2002Date of Patent: December 30, 2003Assignee: Tokyo Electron LimitedInventors: Masami Akimoto, Yoichi Deguchi
-
Patent number: 6667249Abstract: A method of coating a low dielectric constant material layer wherein the wafer surface is pre-wetted using a solvent to prevent or reduce coating defects is described. A semiconductor substrate is provided wherein a top surface of the semiconductor substrate may have surface defects. A solvent is coated overlying the top surface of the semiconductor substrate. A low dielectric constant material layer is coated overlying the solvent wherein the solvent covers the surface defects thereby preventing defects in the low dielectric constant material layer.Type: GrantFiled: March 20, 2002Date of Patent: December 23, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Yu-Hui Chen, Tien-I Bao, Yao-Yi Cheng
-
Patent number: 6664117Abstract: A method of forming a multi-layered, spin-coated perovskite thin film on a wafer includes preparing a perovskite precursor solution including mixing solid precursor material into acetic acid forming a mixed solution; heating the mixed solution in air for between about one hour to six hours; and filtering the solution when cooled; placing a wafer in a spin-coating mechanism; spinning the wafer at a speed of between about 500 rpm to 3500 rpm; injecting the precursor solution onto the wafer surface; baking the coated wafer at a temperature of between about 100° C. to 300° C.; annealing the coated wafer at a temperature of between about 400° C. to 650° C. in an oxygen atmosphere for between about two minutes to ten minutes; repeating the spinning, injecting, baking and annealing steps until a perovskite thin film of desired thickness is obtained; and annealing the perovskite thin film at a temperature of between about 500° C. to 750° C.Type: GrantFiled: September 26, 2002Date of Patent: December 16, 2003Assignee: Sharp Laboratories of America, Inc.Inventors: Wei-Wei Zhuang, Sheng Teng Hsu, Jong-Jan Lee
-
Publication number: 20030224623Abstract: An insulating resin film having fine patterns in the order of microns is provided, with which good economies of mass production can be attained and the material restriction can be eased. Also provided is a method of forming fine patterns of the insulating resin film. An insulating resin film to be subjected to molding is placed on a forming mold provided with molding slots for forming fine patterns, and a drape forming mold provided with concave portions in a one-to-one correspondence with the molding slots is placed thereon. The insulting resin film is attracted toward the drape forming mold through suction and fine drape portions corresponding to the fine patterns are formed inside the concave portions. Then, the drape portions are pulled inside the molding slots.Type: ApplicationFiled: October 4, 2002Publication date: December 4, 2003Applicant: TOHOKU PIONEER CORPORATIONInventor: Toshiharu Takahashi
-
Patent number: 6656284Abstract: Disclosed is a semiconductor device manufacturing apparatus provided with a rotational gas injector for supplying source gases at an upper portion of a reaction chamber. According to the invention, source gases are injected from the upside of the wafers through the rotational type gas injector, and non-reacted gases are exhausted into the downside space of the wafers, so that lowering in the thickness uniformity of a thin film due to the horizontal flow of source gases provided in the conventional art decrease remarkably. Accordingly, although multiple wafers are loaded in a single reaction chamber, a thin film having very high thickness uniformity can be deposited with respect to all the wafers, thereby capable of enhancing the productivity.Type: GrantFiled: June 28, 2002Date of Patent: December 2, 2003Assignee: Jusung Engineering Co., Ltd.Inventors: Chul Ju Hwang, Kyung Sik Shim, Chang Soo Park
-
Patent number: 6656402Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.Type: GrantFiled: August 14, 2001Date of Patent: December 2, 2003Assignee: Micron Technology, Inc.Inventors: Guy T. Blalock, Hugh E. Stroupe, Brian F. Gordon
-
Patent number: 6656277Abstract: A developer supply nozzle moves from the side of a first edge of a substrate to the side of a second edge thereof opposite from the first edge to apply a developer across a major surface of the substrate. After a lapse of required development process time, a rinsing solution supply nozzle moves from the side of the first edge of the substrate to the side of the second edge thereof to apply a rinsing solution across the major surface of the substrate. Making the moving speed of the rinsing solution supply nozzle higher than the moving speed of the developer supply nozzle shortens actual developing time at a site (downstream relative to a scanning direction) where a development reaction is apt to accelerate under the influence of fluctuations of the developer caused by dropping of the rinsing solution.Type: GrantFiled: October 11, 2002Date of Patent: December 2, 2003Assignee: Dainippon Screen Mfg. Co. Ltd.Inventors: Masakazu Sanada, Masahiko Harumoto, Hiroshi Kobayashi, Minobu Matsunaga
-
Patent number: 6652912Abstract: This invention discloses a novel design to obtain a good coating uniformity and to reduce the volume of viscous materials when coating by spraying the viscous material on the wafer during the first time period at a first predetermined pressures; spraying the viscous material on the wafer at a second predetermined pressure in response to the end of the first time period, the second predetermined pressure being lower than the first predetermined pressure; and spraying the viscous material on the wafer during a second time period at a time-varying pressure, the time-varying pressure being increased from the second predetermined pressure to a third predetermined pressure during the second time period.Type: GrantFiled: August 10, 2001Date of Patent: November 25, 2003Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ren-Jyh Leu, Hung-Chih Chen, Kun I Lee, Bao Ru Young
-
Publication number: 20030214044Abstract: A method for forming for use within an integrated circuit a gap filling sandwich composite dielectric layer construction, and an integrated circuit having formed therein the gap filling sandwich composite dielectric layer construction. To practice the method, there is first provided a substrate having formed thereover a patterned layer. There is then formed upon the patterned layer a first conformal dielectric layer through a first plasma enhanced chemical vapor deposition (PECVD) method employing a first radio frequency power optimized primarily to limit plasma induced damage to the substrate and the patterned layer. The first radio frequency power is also optimized secondarily to limit moisture permeation through the first conformal dielectric layer. There is then formed upon the first conformal dielectric layer a gap filling dielectric layer.Type: ApplicationFiled: June 16, 2003Publication date: November 20, 2003Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventors: Syun-Ming Jang, Chen-Hua Yu