Tertiary Silicon Containing Compound Formation (e.g., Oxynitride Formation, Etc.) Patents (Class 438/786)
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Patent number: 8609549Abstract: A plasma etching method is provided to perform a plasma etching on a silicon oxide film or a silicon nitride film formed below an amorphous carbon film by using a pattern of the amorphous carbon film as a final mask in a multilayer mask including a photoresist layer having a predetermined pattern, an organic bottom anti-reflection coating (BARC) film formed below the photoresist layer, an SiON film formed below the BARC film, and the amorphous carbon film formed below the SiON film. An initial mask used at the time when the plasma etching of the silicon oxide film or the silicon nitride film is started is under a state in which the SiON film remains on the amorphous carbon film and a ratio of a film thickness of the amorphous carbon film to a film thickness of the residual SiON film is smaller than or equal to about 14.Type: GrantFiled: March 11, 2011Date of Patent: December 17, 2013Assignee: Tokyo Electron LimitedInventors: Sungtae Lee, Masahiro Ogasawara, Junichi Sasaki, Naohito Yanagida
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Publication number: 20130330935Abstract: Provided are methods and systems for providing oxygen doped silicon carbide. A layer of oxygen doped silicon carbide can be provided under process conditions that employ silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the oxygen doped silicon carbide. The one or more radical species can be formed in a remote plasma source.Type: ApplicationFiled: June 12, 2012Publication date: December 12, 2013Inventor: Bhadri Varadarajan
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Patent number: 8598000Abstract: A method of making a transistor is disclosed. The method starts with applying a first photoresist and performing a first etching of the first side of a gate where the gate includes an oxide layer formed over a substrate and a conductive material formed over the oxide layer. The first etching is followed by implanting an impurity region into the substrate while using the first photoresist and the conductive material as a mask making the implantation of the impurity region self-aligned to the gate. The implantation is followed by applying a second photoresist and performing a second etching of the second side of the gate.Type: GrantFiled: March 30, 2010Date of Patent: December 3, 2013Assignee: Volterra Semiconductor CorporationInventor: Marco A. Zuniga
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Patent number: 8592327Abstract: A method for protecting an exposed low-k surface is described. The method includes receiving a substrate having a mask layer and a low-k layer formed thereon, wherein a pattern formed in the mask layer using a lithographic process has been transferred to the low-k layer using an etching process to form a structural feature therein. Additionally, the method includes forming a SiOCl-containing layer on exposed surfaces of the mask layer and the low-k layer, and anisotropically removing the SiOCl-containing layer from a top surface of the mask layer and a bottom surface of the structural feature in the low-k layer, while retaining a remaining portion of the SiOCl-containing layer on sidewall surfaces of the structural feature. The method further includes performing an ashing process to remove the mask layer, and thereafter, selectively removing the remaining portion of the SiOCl-containing layer from the sidewall surfaces of the structural feature.Type: GrantFiled: March 7, 2012Date of Patent: November 26, 2013Assignee: Tokyo Electron LimitedInventors: Alok Ranjan, Kaushik Arun Kumar
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Patent number: 8563444Abstract: Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a silicon source chemical, metal source chemical, and an oxidizing agent, wherein the metal source chemical is the next reactant provided after the silicon source chemical. Methods according to some embodiments can be used to form silicon-rich hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surface.Type: GrantFiled: July 1, 2011Date of Patent: October 22, 2013Assignee: ASM America, Inc.Inventors: Chang-Gong Wang, Eric Shero, Glen Wilk
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Patent number: 8563443Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.Type: GrantFiled: August 3, 2012Date of Patent: October 22, 2013Assignee: ASM Japan K.K.Inventor: Atsuki Fukazawa
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Publication number: 20130273748Abstract: A method of manufacturing a semiconductor device is provided, including: forming an oxynitride film having a specific film thickness on a substrate by performing multiple numbers of times a cycle of: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element into a processing vessel in which the substrate is housed; changing the specific element-containing layer to a nitride layer by supplying a nitrogen-containing gas into the processing vessel; and changing the nitride layer to an oxynitride layer by supplying an oxygen-containing gas and an inert gas into the processing vessel, with this sequence as one cycle, wherein a composition ratio of the oxynitride film having the specific film thickness is controlled by controlling a partial pressure of the oxygen-containing gas in the processing vessel, in changing the nitride layer to the oxynitride layer.Type: ApplicationFiled: November 1, 2011Publication date: October 17, 2013Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Ryota Sasajima, Yoshinobu Nakamura, Yushin Takasawa, Yoshiro Hirose
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Patent number: 8546276Abstract: Disclosed are group IV metal-containing precursors and their use in the deposition of group IV metal-containing films {nitride, oxide and metal) at high process temperature. The use of cyclopentadienyl and imido ligands linked to the metal center secures thermal stability, allowing a large deposition temperature window, and low impurity contamination. The group IV metal (titanium, zirconium, hafnium)-containing f{umlaut over (?)}m depositions may be carried out by thermal and/or plasma-enhanced CVD, ALD, and pulse CVD.Type: GrantFiled: July 14, 2010Date of Patent: October 1, 2013Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges ClaudeInventors: Julien Gatineau, Changhee Ko
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Patent number: 8546273Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method of forming a nitrogen-containing layer may include placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas consisting essentially of ammonia (NH3) and an inert gas while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer.Type: GrantFiled: July 27, 2011Date of Patent: October 1, 2013Assignee: Applied Materials, Inc.Inventors: Malcolm J. Bevan, Johanes Swenberg, Son T. Nguyen, Wei Liu, Jose Antonio Marin, Jian Li
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Publication number: 20130244448Abstract: Classes of liquid aminosilanes have been found which allow for the production of silicon carbo-nitride films of the general formula SixCyNz. These aminosilanes, in contrast, to some of the precursors employed heretofore, are liquid at room temperature and pressure allowing for convenient handling. In addition, the invention relates to a process for producing such films. The classes of compounds are generally represented by the formulas: and mixtures thereof, wherein R and R1 in the formulas represent aliphatic groups typically having from 2 to about 10 carbon atoms, e.g., alkyl, cycloalkyl with R and R1 in formula A also being combinable into a cyclic group, and R2 representing a single bond, (CH2)n, a ring, or SiH2.Type: ApplicationFiled: September 13, 2012Publication date: September 19, 2013Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Manchao Xiao, Arthur Kenneth Hochberg
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Patent number: 8501523Abstract: Organometallic precursors may be utilized to form titanium silicon nitride films that act as heaters for phase change memories. By using a combination of TDMAT and TrDMASi, for example in a metal organic chemical vapor deposition chamber, a relatively high percentage of silicon may be achieved in reasonable deposition times, in some embodiments. In one embodiment, two separate bubblers may be utilized to feed the two organometallic compounds in gaseous form to the deposition chamber so that the relative proportions of the precursors can be readily controlled.Type: GrantFiled: October 28, 2004Date of Patent: August 6, 2013Assignee: Micron Technology, Inc.Inventors: Jong-Won Lee, Kuo-Wei Chang, Michael L. McSwiney
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Patent number: 8497191Abstract: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing a halogen element. With this semiconductor device, a silicon nitride film which contains the halogen element is formed over the sides of the gate electrode when an SiGe layer is formed over the Si substrate. Therefore, the SiGe layer epitaxial-grows over the Si substrate with high selectivity. As a result, an OFF-state leakage current which flows between, for example, the gate electrode and source/drain regions is suppressed and a manufacturing process suitable for actual mass production is established.Type: GrantFiled: October 14, 2008Date of Patent: July 30, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masahiro Fukuda, Yosuke Shimamune, Masaaki Koizuka, Katsuaki Ookoshi
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Publication number: 20130189853Abstract: This invention discloses the method of forming silicon nitride, silicon oxynitride, silicon oxide, carbon-doped silicon nitride, carbon-doped silicon oxide and carbon-doped oxynitride films at low deposition temperatures. The silicon containing precursors used for the deposition are monochlorosilane (MCS) and monochloroalkylsilanes. The method is preferably carried out by using plasma enhanced atomic layer deposition, plasma enhanced chemical vapor deposition, and plasma enhanced cyclic chemical vapor deposition.Type: ApplicationFiled: September 21, 2012Publication date: July 25, 2013Applicants: TOKYO ELECTRON LIMITED, AIR PRODUCTS AND CHEMICALS, INC.Inventors: Liu Yang, Xinjian Lei, Bing Han, Manchao Xiao, Eugene Joseph Karwacki, JR., Kazuhide Hasebe, Masanobu Matsunaga, Masato Yonezawa, Hansong Cheng
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Patent number: 8492290Abstract: A method of fabricating a silicon-containing oxide layer that includes providing a chemical oxide layer on a surface of a semiconductor substrate, removing the chemical oxide layer in an oxygen-free environment at a temperature of 1000° C. or greater to provide a bare surface of the semiconductor substrate, and introducing an oxygen-containing gas at a flow rate to the bare surface of the semiconductor substrate for a first time period at the temperature of 1000° C. The temperature is then reduced to room temperature during a second time period while maintaining the flow rate of the oxygen containing gas to provide a silicon-containing oxide layer having a thickness ranging from 0.5 ? to 10 ?.Type: GrantFiled: June 21, 2011Date of Patent: July 23, 2013Assignees: International Business Machines Corporation, Globalfoundries Inc.Inventors: Michael P. Chudzik, Min Dai, Joseph F. Shepard, Jr., Shahab Siddiqui, Jinping Liu
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Publication number: 20130181291Abstract: An insulating film that does not contain hydrogen or free fluorine and has good film properties is provided. A silicon oxynitride film includes silicon, nitrogen, oxygen, and fluorine, wherein the elemental percentage (N+O+F)/Si of the total (N+O+F) of nitrogen (N), oxygen (0), and fluorine (F) to silicon (Si) is in a range of 1.93 to 1.48, and in the silicon oxynitride film, an elemental percentage of silicon ranges from 0.34 to 0.41, an elemental percentage of nitrogen ranges from 0.10 to 0.22, an elemental percentage of oxygen ranges from 0.14 to 0.38, and an elemental percentage of fluorine ranges from 0.17 to 0.24. The film can be formed on a substrate by inductive coupling type plasma CVD whereby a plasma is generated by inductive coupling using a silicon tetrafluoride gas, a nitrogen gas, and an oxygen gas as a material gas.Type: ApplicationFiled: December 8, 2010Publication date: July 18, 2013Applicant: NISSIN ELECTRIC CO., LTD.Inventors: Yasunori Ando, Eiji Takahashi, Masaki Fujiwara
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Publication number: 20130175680Abstract: A multiphase ultra low k dielectric process is described incorporating a first precursor comprising at least one of carbosilane and alkoxycarbosilane molecules containing the group Si—(CH2)n—Si where n is an integer 1, 2 or 3 and a second precursor containing the group Si—R* where R* is an embedded organic porogen, a high frequency radio frequency power in a PECVD chamber and an energy post treatment including ultraviolet radiation. An ultra low k porous SiCOH dielectric material having at least one of a k in the range from 2.2 to 2.3, 2.3 to 2.4, 2.4 to 2.5, and 2.5 to 2.55 and a modulus of elasticity greater than 5, 6, 7.8 and 9 GPa, respectively and a semiconductor integrated circuit comprising interconnect wiring having porous SiCOH dielectric material as described above.Type: ApplicationFiled: January 10, 2012Publication date: July 11, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen M. Gates, Alfred Grill, Errol T. Ryan
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Patent number: 8481433Abstract: Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas comprising nitrogen while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer. In some embodiments, the process gas includes ammonia (NH3).Type: GrantFiled: March 29, 2010Date of Patent: July 9, 2013Assignee: Applied Materials, Inc.Inventors: Malcolm J. Bevan, Johanes Swenberg, Son T. Nguyen, Wei Liu, Jose Antonio Marin, Jian Li
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Publication number: 20130171801Abstract: Semiconductor devices, and methods of fabricating the same, include forming device isolation regions in a substrate to define active regions, forming gate trenches in the substrate to expose the active regions and device isolation regions, conformally forming a preliminary gate insulating layer including silicon oxide on the active regions exposed in the grate trenches, nitriding the preliminary gate insulating layer using a radio-frequency bias having a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride, forming a gate electrode material layer on the nitride preliminary gate insulating layer, partially removing the nitrided preliminary gate insulating layer and the gate electrode material layer to respectively form a gate insulating layer and a gate electrode layer, and forming a gate capping layer on the gate electrode layer to fill the gate trenches.Type: ApplicationFiled: September 5, 2012Publication date: July 4, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Tai-Su PARK, Jin-Hyuk CHOI, Sang-Chul HAN, Jung-Sup OH, Young-Dong LEE
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Patent number: 8471369Abstract: An insulating material interposed between two conductive materials can experience plasma process induced damage (PPID) when a plasma process is used to deposit a dielectric onto one of the conductive materials. This PPID can be reduced by reducing electric charge accumulation on the one conductive material during the plasma process dielectric deposition.Type: GrantFiled: August 5, 2004Date of Patent: June 25, 2013Assignee: National Semiconductor CorporationInventors: Heather McCulloh, Denis Finbarr O'Connell, Sergei Drizlikh, Douglas Brisbin
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Patent number: 8455293Abstract: A method for processing solar cells comprising: providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing; composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber, loading the solar cell substrates into the process chamber; subjecting the solar cell substrates to a process in the process chamber.Type: GrantFiled: November 6, 2012Date of Patent: June 4, 2013Assignee: ASM International N.V.Inventors: Chris G. M. de Ridder, Klaas P. Boonstra, Adriaan Garssen, Frank Huussen
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Patent number: 8450221Abstract: A method of forming an integrated circuit (IC) having at least one MOS device includes forming a SiON gate dielectric layer on a silicon surface. A gate electrode layer is deposited on the SiON gate layer and then patterning forms a gate stack. Exposed gate dielectric sidewalls are revealed by the patterning. A supplemental silicon oxide layer is formed on the exposed SiON sidewalls followed by nitriding. After nitriding, a post nitridation annealing (PNA) forms an annealed N-enhanced SiON gate dielectric layer including N-enhanced SiON sidewalls, wherein along lines of constant thickness a N concentration at the N-enhanced SiON sidewalls is ? the N concentration in a bulk of the annealed N-enhanced SiON gate layer ?2 atomic %. A source and drain region on opposing sides of the gate stack are formed to define a channel region under the gate stack.Type: GrantFiled: August 4, 2010Date of Patent: May 28, 2013Assignee: Texas Instruments IncorporatedInventors: Brian K. Kirkpatrick, James Joseph Chambers
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Publication number: 20130109164Abstract: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein the semiconductor device has a substrate comprising an oxide layer formed thereon, exposing an exposed surface of the oxide layer to the nitrogen-containing radicals, and incorporating nitrogen in the exposed surface of the oxide layer of the substrate.Type: ApplicationFiled: October 23, 2012Publication date: May 2, 2013Applicant: Applied Materials, Inc.Inventor: Applied Materials, Inc.
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Patent number: 8415258Abstract: Provided is a method of manufacturing a semiconductor device. The method includes: loading a substrate into a process vessel; performing a process to form an film on the substrate by alternately repeating: (a) forming a layer containing an element on the substrate by supplying at least two types of source gases into the process vessel, each of the at least two types of source gases containing the element, and (b) changing the layer containing the element by supplying reaction gas into the process vessel, the reaction gas being different from the at least two types of source gases; and unloading the processed substrate from the process vessel.Type: GrantFiled: November 1, 2011Date of Patent: April 9, 2013Assignee: Hitachi Kokusai Electric Inc.Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota, Ryota Sasajima
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Publication number: 20130072031Abstract: Methods and apparatus for a low k dielectric layer of porous SiCOH. A method includes placing a semiconductor substrate into a vapor deposition chamber; introducing reactive gases into the vapor deposition chamber to form a dielectric film comprising SiCOH and a decomposable porogen; depositing the dielectric film to have a ratio of Si—CH3 to SiOnetwork bonds of less than or equal to 0.25; and performing a cure for a cure time to remove substantially all of the porogen from the dielectric film. In one embodiment the porogen comprises a cyclic hydrocarbon. The porogen may be UV curable. In embodiments, different lowered Si—CH3 to SiOnetwork ratios for the deposition of the dielectric film are disclosed. An apparatus of a semiconductor device including the low k dielectric layers is disclosed.Type: ApplicationFiled: September 16, 2011Publication date: March 21, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Yun Peng, Keng-Chu Lin, Joung-Wei Liou, Hui-Chun Yang
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Publication number: 20130065404Abstract: Provided are processes for the low temperature deposition of silicon-containing films using carbosilane precursors containing a carbon atom bridging at least two silicon atoms. Certain methods comprise providing a substrate; in a PECVD process, exposing the substrate surface to a carbosilane precursor containing at least one carbon atom bridging at least two silicon atoms; exposing the carbosilane precursor to a low-powered energy sourcedirect plasma to provide a carbosilane at the substrate surface; and densifying the carbosilanestripping away at least some of the hydrogen atoms to provide a film comprising SiC. The SiC film may be exposed to the carbosilane surface to a nitrogen source to provide a film comprising SiCN.Type: ApplicationFiled: September 11, 2012Publication date: March 14, 2013Applicant: Applied Materials, Inc.Inventors: Timothy W. Weidman, Todd Schroeder
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Patent number: 8377827Abstract: A method for forming a gate, which can improve the etching uniformity of the sidewalls of the gate, includes the following steps: forming a dielectric layer on a semiconductor substrate; forming a polysilicon layer on the dielectric layer; etching the polysilicon layer; performing an isotropic plasma etching process on the etched polysilicon layer by using a mixed gases containing a fluorine-based gas and oxygen gas; and cleaning the semiconductor substrate subjected to the isotropic plasma etching process, thereby forming a gate. The present invention further provides a method for forming a shallow trench isolation region, which can improve the filling quality of a subsequent spacer and the electrical properties of the resultant shallow trench isolation region, and a method for planarizing an etched surface of silicon substrate, which can improve the etching uniformity of the surface of silicon substrate.Type: GrantFiled: August 12, 2011Date of Patent: February 19, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Qiuhua Han, Haiyang Zhang, Qingtian Ma
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Patent number: 8372763Abstract: A process for forming a protective layer at a surface of an aluminum bond pad. The aluminum bond pad is exposed to a solution containing silicon, ammonium persulfate and tetramethylammonium hydroxide, which results in the formation of the protective layer. This protective layer protects the bond pad surface from corrosion during processing of an imager, such as during formation of a color filter array or a micro-lens array.Type: GrantFiled: May 14, 2012Date of Patent: February 12, 2013Assignee: Aptina Imaging CorporationInventor: Mattia Cichocki
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Patent number: 8367554Abstract: A method for forming a gate, which can improve the etching uniformity of the sidewalls of the gate, includes the following steps: forming a dielectric layer on a semiconductor substrate; forming a polysilicon layer on the dielectric layer; etching the polysilicon layer; performing an isotropic plasma etching process on the etched polysilicon layer by using a mixed gases containing a fluorine-based gas and oxygen gas; and cleaning the semiconductor substrate subjected to the isotropic plasma etching process, thereby forming a gate. The present invention further provides a method for forming a shallow trench isolation region, which can improve the filling quality of a subsequent spacer and the electrical properties of the resultant shallow trench isolation region, and a method for planarizing an etched surface of silicon substrate, which can improve the etching uniformity of the surface of silicon substrate.Type: GrantFiled: August 12, 2011Date of Patent: February 5, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Qiuhua Han, Haiyang Zhang, Qingtian Ma
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Publication number: 20130017690Abstract: In a plasma nitriding method, a processing gas containing nitrogen gas and rare gas is introduced into a processing chamber of a plasma processing apparatus by setting a flow rate thereof as a total flow rate [mL/min(sccm)] of the processing gas per 1 L volume of the processing chamber within a range from 1.5 (mL/min)/L to 13 (mL/min)/L. Further, a nitriding process is performed on oxygen-containing films of target objects to be processed by generating a nitrogen-containing plasma in the processing chamber and while exchanging the target objects.Type: ApplicationFiled: March 30, 2011Publication date: January 17, 2013Applicant: TOKYO ELECTRON LIMITEDInventors: Koichi Takatsuki, Kazuyoshi Yamazaki, Hideyuki Noguchi, Daisuke Tamura, Tomohiro Saito
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Patent number: 8349746Abstract: Embodiments of the present invention pertain to the formation of microelectronic structures. Low k dielectric materials need to exhibit a dielectric constant of less than about 2.6 for the next technology node of 32 nm. The present invention enables the formation of semiconductor devices which make use of such low k dielectric materials while providing an improved flexural and shear strength integrity of the microelectronic structure as a whole.Type: GrantFiled: February 23, 2010Date of Patent: January 8, 2013Assignee: Applied Materials, Inc.Inventors: Bo Xie, Alexandros T. Demos, Daemian Raj, Sure Ngo, Kang Sub Yim
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Patent number: 8349745Abstract: A method is provided for fabricating a semiconductor nanoparticle embedded Si insulating film for short wavelength luminescence applications. The method provides a bottom electrode, and deposits a semiconductor nanoparticle embedded Si insulating film, including the element of N, O, or C, overlying the bottom electrode. After annealing, a semiconductor nanoparticle embedded Si insulating film has a peak photoluminescence (PL) at a wavelength in the range of 475 to 750 nanometers.Type: GrantFiled: November 10, 2008Date of Patent: January 8, 2013Assignee: Sharp Laboratory of America, Inc.Inventors: Pooran Chandra Joshi, Hao Zhang, Jiandong Huang, Apostolos T. Voutsas
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Patent number: 8318608Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.Type: GrantFiled: August 25, 2008Date of Patent: November 27, 2012Assignee: Cypress Semiconductor CorporationInventors: Krishnaswamy Ramkumar, Sagy Levy, Jeong Byun
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Publication number: 20120295449Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.Type: ApplicationFiled: August 3, 2012Publication date: November 22, 2012Applicant: ASM JAPAN K.K.Inventor: Atsuki Fukazawa
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Patent number: 8304333Abstract: A method for manufacturing a semiconductor device includes forming a gate electrode over a gate dielectric. The gate dielectric is formed by forming a lanthanide metal layer over a nitrided silicon oxide layer, and then performing an anneal to inter-diffuse atoms to form a lanthanide silicon oxynitride layer. A gate electrode layer may be deposited before or after the anneal. In an embodiment, the gate electrode layer includes a non-lanthanide metal layer, a barrier layer formed over the non-lanthanide metal layer, and a polysilicon layer formed over the barrier layer. Hafnium atoms may optionally be implanted into the nitrided silicon oxide layer.Type: GrantFiled: September 21, 2010Date of Patent: November 6, 2012Assignee: Texas Instruments IncorporatedInventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
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Patent number: 8304352Abstract: According to an embodiment, there is provided a method of manufacturing a semiconductor device, including forming a nitride film by nitriding a surface of an underlying region having a semiconductor region containing silicon as a main component and an insulating region containing silicon and oxygen as a main component and adjacent to the semiconductor region, carrying out oxidation with respect to the nitride film to convert a portion of the nitride film which is formed on the insulating region into an oxide film and to leave a portion of the nitride film which is formed on the semiconductor region as at least part of a charge storage insulating film, forming a block insulating film on the charge storage insulating film, and forming a gate electrode film on the block insulating film.Type: GrantFiled: March 18, 2011Date of Patent: November 6, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Tanaka, Kazuhiro Matsuo, Yoshio Ozawa
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Patent number: 8298965Abstract: Disclosed herein are precursors and methods for their use in the manufacture of semiconductor, photovoltaic, TFT-LCD, or flat panel type devices.Type: GrantFiled: September 3, 2009Date of Patent: October 30, 2012Assignee: American Air Liquide, Inc.Inventors: James J. F. McAndrew, Francois Doniat
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Patent number: 8294224Abstract: Electronic apparatus and methods of forming the electronic apparatus include a silicon oxynitride layer on a semiconductor device for use in a variety of electronic systems. The silicon oxynitride layer may be structured to control strain in a silicon channel of the semiconductor device to modify carrier mobility in the silicon channel, where the silicon channel is configured to conduct current under appropriate operating conditions of the semiconductor device.Type: GrantFiled: April 6, 2006Date of Patent: October 23, 2012Assignee: Micron Technology, Inc.Inventors: Arup Bhattacharyya, Leonard Forbes
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Publication number: 20120261803Abstract: The present invention forms Hf1-xSixOy having a cubic phase or a tetragonal phase by doping a specific amount of SiO2 component into the high-K gate dielectric material HfO2 in combination with an optimized thermal processing technique, to thereby acquire a high-K gate dielectric thin film material having a greater bandgap, a higher K value and high thermal stability. Besides, the high-K gate dielectric thin film and a preparation method thereof proposed in the present invention are helpful to solve the problem of crystallization of ultra-thin films.Type: ApplicationFiled: October 17, 2011Publication date: October 18, 2012Inventors: Wenwu Wang, Chao Zhao, Kai Han, Dapeng Chen
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Patent number: 8283261Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed Thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.Type: GrantFiled: May 21, 2008Date of Patent: October 9, 2012Assignee: Cypress Semiconductor CorporationInventor: Krishnaswamy Ramkumar
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Patent number: 8268654Abstract: The number of photomasks is reduced in a method for manufacturing a liquid crystal display device which operates in a fringe field switching mode, whereby a manufacturing process is simplified and manufacturing cost is reduced. A first transparent conductive film and a first metal film are sequentially stacked over a light-transmitting insulating substrate; the first transparent conductive film and the first metal film are shaped using a multi-tone mask which is a first photomask; an insulating film, a first semiconductor film, a second semiconductor film, and a second metal film are sequentially stacked; the second metal film and the second semiconductor film are shaped using a multi-tone mask which is a second photomask; a protective film is formed; the protective film is shaped using a third photomask; a second transparent conductive film is formed; and the second transparent conductive film is shaped using a fourth photomask.Type: GrantFiled: December 1, 2008Date of Patent: September 18, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Saishi Fujikawa, Yoko Chiba
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Patent number: 8263501Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.Type: GrantFiled: December 15, 2010Date of Patent: September 11, 2012Assignee: United Microelectronics Corp.Inventors: Chien-Liang Lin, Yu-Ren Wang, Ying-Wei Yen
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Publication number: 20120225567Abstract: A process for forming a protective layer at a surface of an aluminum bond pad. The aluminum bond pad is exposed to a solution containing silicon, ammonium persulfate and tetramethylammonium hydroxide, which results in the formation of the protective layer. This protective layer protects the bond pad surface from corrosion during processing of an imager, such as during formation of a color filter array or a micro-lens array.Type: ApplicationFiled: May 14, 2012Publication date: September 6, 2012Inventor: Mattia Cichocki
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Patent number: 8252659Abstract: The present disclosure is related to method for producing a semiconductor device comprising the steps of: providing a semiconductor substrate (1), comprising active components on the surface of said substrate, depositing a top layer (2) of dielectric material on the surface of said substrate or on other dielectric layers present on said surface, etching at least one first opening (7) at least through said top layer, filling said opening(s) at least with a first conductive material (8), and performing a first CMP step, to form said first conductive structures (3,26), etching at least one second opening (13) at least through said top layer, filling said opening(s) at least with a second conductive material (10), and performing a second CMP step, to form said second conductive structures (4,24), wherein the method comprises the step of depositing a common CMP stopping layer (5,25) on said dielectric top layer, before the steps of etching and filling said first opening(s), so that said same CMP stopping layer isType: GrantFiled: December 1, 2009Date of Patent: August 28, 2012Assignee: IMECInventors: Cedric Huyghebaert, Jan Vaes, Jan Van Olmen
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Publication number: 20120214318Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.Type: ApplicationFiled: February 18, 2011Publication date: August 23, 2012Applicant: ASM JAPAN K.K.Inventors: Atsuki Fukazawa, Noboru Takamure
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Patent number: 8247331Abstract: A method for forming an insulating film includes a step of preparing a substrate, which is to be processed and has silicon exposed on the surface; a step of performing first nitriding to the silicon exposed on the surface of the substrate, and forming a silicon nitride film having a thickness of 0.2 nm but not more than 1 nm on the surface of the substrate; and a step of performing first heat treatment to the silicon nitride film in N2O atmosphere and forming a silicon nitride film. This method may further include a step of performing second nitriding to the silicon oxynitride film, and furthermore, may include a step of performing second heat treatment to the silicon oxynitride film after the second nitriding.Type: GrantFiled: December 20, 2007Date of Patent: August 21, 2012Assignee: Tokyo Electron LimitedInventors: Minoru Honda, Yoshihiro Sato, Toshio Nakanishi
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Publication number: 20120196450Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.Type: ApplicationFiled: February 2, 2012Publication date: August 2, 2012Applicant: Applied Materials, Inc.Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
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Patent number: 8227346Abstract: Disclosed is a producing method of a semiconductor device comprising a first step of supplying a first reactant to a substrate to cause a ligand-exchange reaction between a ligand of the first reactant and a ligand as a reactive site existing on a surface of the substrate, a second step of removing a surplus of the first reactant, a third step of supplying a second reactant to the substrate to cause a ligand-exchange reaction to change the ligand after the exchange in the first step into a reactive site, a fourth step of removing a surplus of the second reactant, and a fifth step of supplying a plasma-excited third reactant to the substrate to cause a ligand-exchange reaction to exchange a ligand which has not been exchange-reacted into the reactive site in the third step into the reactive site, wherein the first to fifth steps are repeated predetermined times.Type: GrantFiled: November 29, 2011Date of Patent: July 24, 2012Assignee: Hitachi Kokusai Electric Inc.Inventors: Hironobu Miya, Kazuyuki Toyoda, Norikazu Mizuno, Taketoshi Sato, Masanori Sakai, Masayuki Asai, Kazuyuki Okuda, Hideki Horita
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Patent number: 8227358Abstract: Novel silicon precursors for low temperature deposition of silicon films are described herein. The disclosed precursors possess low vaporization temperatures, preferably less than about 500° C. In addition, embodiments of the silicon precursors incorporate a —Si—Y—Si— bond, where Y may comprise an amino group, a substituted or unsubstituted hydrocarbyl group, or oxygen. In an embodiment a silicon precursor has the formula: where Y is a hydrocarbyl group, a substituted hydrocarbyl group, oxygen, or an amino group; R1, R2, R3, and R4 are each independently a hydrogen group, a hydrocarbyl group, a substituted hydrocarbyl group, a heterohydrocarbyl group, wherein R1, R2, R3, and R4 may be the same or different from one another; X1, X2, X3, and X4 are each independently, a hydrogen group, a hydrocarbyl group, a substituted hydrocarbyl group, or a hydrazine group, wherein X1, X2, X3, and X4 may be the same or different from one another.Type: GrantFiled: March 28, 2011Date of Patent: July 24, 2012Assignee: Air Liquide Electronics U.S. LPInventors: Ziyun Wang, Ashutosh Misra, Ravi Laxman
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Publication number: 20120178267Abstract: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.Type: ApplicationFiled: March 19, 2012Publication date: July 12, 2012Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.Inventors: Ziyun Wang, Chongying Xu, Ravi K. Laxman, Thomas H. Baum, Bryan Hendrix, Jeffrey Roeder
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Publication number: 20120171874Abstract: The present invention is a process of plasma enhanced cyclic chemical vapor deposition of silicon nitride, silicon carbonitride, silicon oxynitride, silicon carboxynitride, and carbon doped silicon oxide from alkylaminosilanes having Si—H3, preferably of the formula (R1R2N)SiH3 wherein R1 and R2 are selected independently from C2 to C10 and a nitrogen or oxygen source, preferably ammonia or oxygen has been developed to provide films with improved properties such as etching rate, hydrogen concentrations, and stress as compared to films from thermal chemical vapor deposition.Type: ApplicationFiled: February 27, 2012Publication date: July 5, 2012Applicant: Air Products and Chemicals, Inc.Inventors: Hareesh Thridandam, Manchao Xiao, Xinjian Lei, Thomas Richard Gaffney, Eugene Joseph Karwacki, JR.