Tertiary Silicon Containing Compound Formation (e.g., Oxynitride Formation, Etc.) Patents (Class 438/786)
  • Publication number: 20090124087
    Abstract: A vertical plasma processing apparatus for a semiconductor process for performing a plasma process on target substrates all together includes an exciting mechanism configured to turn at least part of a process gas into plasma. The exciting mechanism includes first and second electrodes provided to a plasma generation box and facing each other with a plasma generation area interposed therebetween, and an RF power supply configured to supply an RF power for plasma generation to the first and second electrodes and including first and second output terminals serving as grounded and non-grounded terminals, respectively. A switching mechanism is configured to switch between a first state where the first and second electrodes are connected to the first and second output terminals, respectively, and a second state where the first and second electrodes are connected to the second and first output terminals, respectively.
    Type: Application
    Filed: October 15, 2008
    Publication date: May 14, 2009
    Inventors: Nobutake Nodera, Jun Sato, Masanobu Matsunaga, Kazuhide Hasebe, Hisashi Inoue
  • Publication number: 20090117715
    Abstract: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing a halogen element. With this semiconductor device, a silicon nitride film which contains the halogen element is formed over the sides of the gate electrode when an SiGe layer is formed over the Si substrate. Therefore, the SiGe layer epitaxial-grows over the Si substrate with high selectivity. As a result, an OFF-state leakage current which flows between, for example, the gate electrode and source/drain regions is suppressed and a manufacturing process suitable for actual mass production is established.
    Type: Application
    Filed: October 14, 2008
    Publication date: May 7, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Masahiro Fukuda, Yosuke Shimamune, Masaaki Koizuka, Katsuaki Ookoshi
  • Patent number: 7528434
    Abstract: The invention concerns a semiconductor component and an associated production process having a silicon-bearing layer, a praseodymium oxide layer and a mixed oxide layer arranged between the silicon-bearing layer and the praseodymium oxide layer and containing silicon, praseodymium and oxygen. It is possible because of the mixed oxide layer on the one hand to improve the capacitance of the component and on the other hand to achieve a high level of charge carrier mobility without the necessity for a silicon oxide intermediate layer.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: May 5, 2009
    Assignee: IHP GmbH - Innovations For High Performance
    Inventor: Hans-Joachim Müssig
  • Patent number: 7521325
    Abstract: A permeation preventing film of a silicon nitride film 16 is inserted between a silicon substrate 10 and a High-k gate insulation film 18 to thereby prevent the High-k gate insulation film 18 from being deprived of oxygen, while oxygen anneal is performed after a gate electrode layer 20 has been formed to thereby supplement oxygen. The silicon nitride film 16, which is the permeation preventing film, becomes a silicon oxide nitride film 17 without changing the film thickness, whereby characteristics deterioration of the High-k gate insulation film 18 due to the oxygen loss can be prevented without lowering the performance of the transistor. The semiconductor device having the gate insulation film formed of even a high dielectric constant material can be free from the shift of the threshold voltage.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 21, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tsunehisa Sakoda, Masaomi Yamaguchi, Hiroshi Minakata, Yoshihiro Sugita, Kazuto Ikeda
  • Patent number: 7521305
    Abstract: A method for fabricating a semiconductor device includes the steps of: providing a semiconductor device formed with a plurality of transistors; forming a first stress layer with a plurality of layers on the semiconductor device; forming a second stress layer with a plurality of layers on another surface of the semiconductor device; covering photo resist on a region of the first stress layer to cover at least one of the transistors; and performing ion implantation on the part of the semiconductor device that is not covered by the photo resist. In another embodiment, the second stress layers can be formed after the ion implantation. The method can simultaneously enhance the device performance of the PMOS and NMOS on the same wafer. It also solves the problem of procedure integration caused by the produced compressive stress and tensile stress.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: April 21, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Cha-Hsin Lin, Zing-Way Pei, Ming-Jinn Tsai, Shing-Chii Lu
  • Patent number: 7521380
    Abstract: A method is provided for fabricating a semiconductor device on a semiconductor substrate. A plurality of narrow gate pitch transistors (NPTs) and wide gate pitch transistors (WPTs) are formed on and in the semiconductor substrate. The NPTs are spaced apart by a first distance, and the WPTs are spaced apart by a second distance greater than the first distance. A first stress liner layer is deposited overlying the NPTs, the WPTs and the semiconductor layer, an etch stop layer is deposited overlying the first stress liner layer, and a second stress liner layer is deposited overlying the etch stop layer. A portion of the second stress liner layer which overlies the WPTs is covered, and an exposed portion of the second stress liner layer which overlies the NPTs is removed to expose an exposed portion of the etch stop layer. The exposed portion of the etch stop layer which overlies the NPTs is removed.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: April 21, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Andrew M. Waite, Scott Luning, Frank (Bin) Yang
  • Patent number: 7517818
    Abstract: A method and system for forming a nitrided germanium-containing layer by plasma processing. The method includes providing a germanium-containing substrate in a process chamber, generating a plasma from a process gas containing N2 and a noble gas, where the plasma conditions are selected effective to form plasma excited N2 species while controlling formation of plasma excited N species, and exposing the substrate to the plasma to form a nitrided germanium-containing layer on the substrate. A method is also provided that includes exposing a germanium-containing dielectric layer to liquid or gaseous H2O to alter the thickness and chemical composition of the layer.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 14, 2009
    Assignees: Tokyo Electron Limited, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Takuya Sugawara, Paul C. McIntyre
  • Patent number: 7507678
    Abstract: Uniform oxynitride and nitride films can be formed by low-temperature and high-speed nitriding reaction not dependent on the nitriding time or nitriding temperature. A solid dielectric is provided on at least one of opposed surfaces of a pair of electrodes opposed to each other under a pressure of 300 (Torr) or higher, a nitrogen gas containing an oxide equal to or lower than 0.2% is introduced into a space between the pair of opposed electrodes, an electric field is applied to the nitrogen gas, and the resulting N2 (2nd p.s.) or N2 (H.I.R) active species is brought into contact with an object to be processed to form an oxynitride film/nitride film on a surface of the object to be processed.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: March 24, 2009
    Assignee: Sekesui Chemical Co., Ltd.
    Inventors: Norifumi Fujimura, Ryoma Hayakawa, Hiroya Kitahata, Tsuyoshi Uehara, Takuya Yara
  • Patent number: 7507652
    Abstract: Some methods that are provided form a composite dielectric structure on a substrate. A first dielectric layer that includes metal and oxygen is formed on a substrate. A preliminary dielectric layer that includes silicon is formed on the first dielectric layer. A plasma nitriding treatment is performed on the preliminary dielectric layer to change it into a second dielectric layer. The composite dielectric structure includes the second dielectric layer and the first dielectric layer. Other methods form a semiconductor device that includes the composite dielectric structure.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hag-Ju Cho, Yu-Gyun Shin
  • Patent number: 7504330
    Abstract: A method of forming an insulative film includes a step of vacuum laminating an insulative organic material on a substrate that has a peripheral ring electrode formed in a peripheral region of the substrate and a device element(s) formed inside the peripheral region, and has a surface configuration including raised parts. A first dummy pattern is formed in a region between the peripheral ring electrode and the device element on the substrate.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: March 17, 2009
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Takayuki Hirose, Masaharu Edo, Akira Sato
  • Patent number: 7501352
    Abstract: The present invention generally provides a method for preparing an oxynitride film on a substrate. A surface of the substrate is exposed to oxygen radicals formed by ultraviolet (UV) radiation induced dissociation of a first process gas comprising at least one molecular composition comprising oxygen to form an oxide film on the surface. The oxide film is exposed to nitrogen radicals formed by plasma induced dissociation of a second process gas comprising at least one molecular composition comprising nitrogen using plasma based on microwave irradiation via a plane antenna member having a plurality of slits to nitridate the oxide film and form the oxynitride film.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: March 10, 2009
    Assignees: Tokyo Electron, Ltd., International Business Machines Corporation (“IBM”)
    Inventors: Masanobu Igeta, Cory Wajda, David L. O'Meara, Kristen Scheer, Toshihara Eurakawa
  • Patent number: 7501335
    Abstract: A manufacturing method of a semiconductor device disclosed herein, comprises: forming a silicate film containing metal on a substrate; and introducing nitrogen and deuterium into the silicate film by using ND3 gas.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: March 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Sekine, Yoshitaka Tsunashima, Seiji Inumiya, Akio Kaneko, Motoyuki Sato, Kazuhiro Eguchi
  • Patent number: 7498270
    Abstract: A method for forming a densified silicon oxynitride film with tensile stress and a semiconductor device including the densified silicon oxynitride film. The densified silicon oxynitride film can be formed by depositing a porous SiNC:H film on a substrate in a LPCVD process, and exposing the porous SiNC:H film to an oxygen-containing gas to incorporate oxygen into the SiNC:H film, thereby forming a densified SiONC:H film having a greater density than the porous SiNC:H film. The densified silicon oxynitride film can be included on a substrate including the semiconductor device.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 3, 2009
    Assignee: Tokyo Electron Limited
    Inventor: John Gumpher
  • Publication number: 20090047799
    Abstract: A method of manufacturing a semiconductor device comprising forming a gate oxide layer over a substrate subjecting the gate oxide layer to a first nitridation process, subjecting the gate oxide layer to a first anneal process after the first nitridation process, subjecting the gate oxide layer to a second nitridation process after the first anneal process, subjecting the gate oxide layer to a second anneal process after the second nitridation process, and forming a gate electrode over the gate oxide.
    Type: Application
    Filed: August 15, 2007
    Publication date: February 19, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Matt Yeh, Da-Yuan Lee, Chi-Chun Chen, Hun-Jan Tao
  • Patent number: 7491655
    Abstract: A semiconductor device using a TFT structure with high reliability is realized. As an insulating film used for the TFT, for example, a gate insulating film, a protecting film, an under film, an interlayer insulating film, or the like, a silicon nitride oxide film (SiNXBYOZ) containing boron is formed by a sputtering method. As a result, the internal stress of this film becomes ?5×1010 dyn/cm2 to 5×1010 dyn/cm2, preferably ?1010 dyn/cm2 to 1010 dyn/cm2, and the film has high thermal conductivity, so that it typically becomes possible to prevent deterioration due to heat generated at the time of an on operation of the TFT.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: February 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20090042406
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Application
    Filed: October 9, 2008
    Publication date: February 12, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Publication number: 20090035950
    Abstract: A substrate processing method comprises the step of forming an oxide film on a silicon substrate surface, and introducing nitrogen atoms into the oxide film by exposing the oxide film to nitrogen radicals excited in plasma formed by a microwave introduced via a planar antenna.
    Type: Application
    Filed: August 29, 2008
    Publication date: February 5, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Seijii Matsuyama, Takuya Sugawara, Shigenori Ozaki, Toshio Nakanishi, Masaru Sasaki
  • Patent number: 7482286
    Abstract: Method for producing a metal silicon (oxy)nitride by introducing a carbon-free silicon source (for example, (SiH3)3N), a metal precursor with the general formula MXn (for example, Hf(NEt2)4), and an oxidizing agent (for example, O2) into a CVD chamber and reacting same at the surface of a substrate. MsiN, MSIo and/or MSiON films may be obtained. These films are useful are useful as high k dielectrics films.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: January 27, 2009
    Assignee: L'Air Liquide, Societe Anonyme A Directoire et Conseil de Surveillance pour l'Etude et l'Exploitation des Procedes Georges Claude
    Inventors: Ashutosh Misra, Matthew Fisher, Benjamin Jurcik, Christian Dussarrat, Eri Tsukada, Jean-Marc Girard
  • Publication number: 20090023300
    Abstract: A method of forming a shadow layer on a wafer bevel region is provided. First, a substrate having the wafer bevel region and a central region is provided. Thereafter, an upper insulator and a lower insulator are provided. The upper insulator is disposed on an upper surface of the substrate and at least covers the central region. The lower insulator is disposed on a lower surface of the substrate and at least covers the central region. A shadow layer is then formed on the upper surface which is not covered by the upper insulator and on the lower surface which is not covered by the lower insulator. Next, the upper insulator and the lower insulator are removed.
    Type: Application
    Filed: December 9, 2007
    Publication date: January 22, 2009
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Wen-Chieh Wang, Jin-Tau Huang, Wei-Hui Hsu, Tse-Yao Huang
  • Patent number: 7479462
    Abstract: Thin films are disclosed that are suitable as dielectrics in IC's and for other similar applications. In particular, the invention concerns thin films comprising compositions obtainable by hydrolysis of two or more silicon compounds, which yield an at least partially cross-linked siloxane structure. The invention also concerns a method for producing such films by preparing siloxane compositions by hydrolysis of suitable reactants, by applying the hydrolyzed compositions on a substrate in the form of a thin layer and by curing the layer to form a film. In one example, a thin film comprising a composition is obtained by hydrolyzing a monomeric silicon compound having at least one hydrocarbyl radical, containing an unsaturated carbon-to-carbon bond, and at least one hydrolyzable group attached to the silicon atom of the compound with another monomeric silicon compound having at least one aryl group and at least one hydrolyzable group attached to the silicon atom of the compound to form a siloxane material.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: January 20, 2009
    Assignee: Silecs Oy
    Inventors: Juha T. Rantala, Jason S. Reid, Nungavram S. Viswanathan, T.Teemu T. Tormanen
  • Publication number: 20080308807
    Abstract: It is an object to provide a manufacturing method by which display devices can be manufactured in quantity without degrading the characteristics of thin film transistors. In a display device including a thin film transistor in which a microcrystalline semiconductor film, a gate insulating film in contact with the microcrystalline semiconductor film, and a gate electrode overlap with each other, an antioxidant film is formed on a surface of the microcrystalline semiconductor film. The antioxidant film on the surface of the microcrystalline semiconductor film can prevent a surface of a microcrystal grain from being oxidized, thereby preventing the mobility of the thin film transistor from decreasing.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 18, 2008
    Inventors: Shunpei Yamazaki, Mitsuhiro Ichijo, Tetsuhiro Tanaka, Takashi Ohtsuki, Seiji Yasumoto, Kenichi Okazaki
  • Patent number: 7459404
    Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: December 2, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Lihua Li, Tzu-Fang Huang, Jerry Sugiarto, legal representative, Li-Qun Xia, Peter Wai-Man Lee, Hichem M'Saad, Zhenjiang Cui, Sohyun Park, Dian Sugiarto
  • Patent number: 7452830
    Abstract: Semiconductor devices and methods for manufacturing the same are disclosed. An example method includes loading a first substrate to be provided with an oxynitride layer along with a second substrate having a nitride layer in a boat, and forming the oxynitride layer on the first substrate by placing the boat into a furnace and thermally treating the boat under an oxygen atmosphere.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: November 18, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Chul-Ho Shin, Tae-Hong Kim
  • Publication number: 20080277715
    Abstract: In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
    Type: Application
    Filed: October 31, 2007
    Publication date: November 13, 2008
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Masaki Hirayama, Yasuyuki Shirai
  • Patent number: 7446394
    Abstract: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing a halogen element. With this semiconductor device, a silicon nitride film which contains the halogen element is formed over the sides of the gate electrode when an SiGe layer is formed over the Si substrate. Therefore, the SiGe layer epitaxial-grows over the Si substrate with high selectivity. As a result, an OFF-state leakage current which flows between, for example, the gate electrode and source/drain regions is suppressed and a manufacturing process suitable for actual mass production is established.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: November 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Masahiro Fukuda, Yosuke Shimamune, Masaaki Koizuka, Katsuaki Ookoshi
  • Publication number: 20080265336
    Abstract: A method for manufacturing a semiconductor device. The method comprises forming a dielectric layer. Forming the dielectric layer includes depositing a silicon oxide layer on a semiconductor substrate, nitridating the silicon oxide layer to form a nitrided silicon oxide layer and incorporating lanthanide atoms into the nitrided silicon oxide layer to form a lanthanide silicon oxynitride layer.
    Type: Application
    Filed: April 27, 2007
    Publication date: October 30, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Publication number: 20080268657
    Abstract: The application of oxynitriding treatment to electronic appliances involve the problem that N2 ions are formed to thereby damage any oxynitride film. It is intended to provide a method of plasma treatment capable of realizing high-quality oxynitriding and to provide a process for producing an electronic appliance in which use is made of the method of plasma treatment. There is provided a method of plasma treatment, comprising generating plasma with a gas for plasma excitation and introducing a treating gas in the plasma to thereby treat a treatment subject, wherein the treating gas contains nitrous oxide gas, this nitrous oxide gas introduced in a plasma of <2.24 eV electron temperature, so that the generation of ions tending to damage any insulating film is reduced to thereby realize high-quality oxynitriding. Further, there is provided a process for producing an electronic appliance in which use is made of the method of plasma treatment.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 30, 2008
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Hiroshi Yamauchi, Yukio Hayakawa
  • Patent number: 7439195
    Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: October 21, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Timothy A. Quick
  • Patent number: 7435640
    Abstract: A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: October 14, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Yun-Ren Wang, Ying-Wei Yen, Shu-Yen Chan, Kuo-Tai Huang
  • Patent number: 7429538
    Abstract: A method of forming a silicon oxynitride gate dielectric. The method includes incorporating nitrogen into a dielectric film using a plasma nitridation process to form a silicon oxynitride film. The silicon oxynitride film is annealed in a first ambient. The first ambient comprises an inert ambient with a first partial pressure of oxygen at a first temperature. The silicon oxynitride film is then annealed in a second ambient comprising a second partial pressure of oxygen at a second temperature. The second partial pressure of oxygen is greater than the first partial pressure of oxygen.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 30, 2008
    Assignee: Applied Materials, Inc.
    Inventor: Christopher S. Olsen
  • Patent number: 7429540
    Abstract: A method for processing a semiconductor substrate in a chamber includes forming a silicon oxynitride film using a two-step anneal process. The first anneal step includes annealing the silicon oxynitride film in the presence of an oxidizing gas that has a partial pressure of about 1 to about 100 mTorr, and the second anneal step includes annealing the silicon oxynitride film with oxygen gas that has a flow rate of about 1 slm. The first anneal step is performed at a higher chamber temperature and higher chamber pressure than the second anneal step.
    Type: Grant
    Filed: April 3, 2006
    Date of Patent: September 30, 2008
    Assignee: Applied Materials, Inc.
    Inventor: Christopher S. Olsen
  • Patent number: 7407820
    Abstract: A method for monitoring oxide film deposition is disclosed. The method utilizes monitor wafers having silicon nitride films thereon instead of bare wafers to monitor the growth of silicon oxide films in a furnace. The method for monitoring oxide film deposition includes the following steps. First of all, a monitor wafer having silicon nitride film and a process wafer are provided. Next an oxide layer is formed on the monitor wafer and the process wafer, and the thickness of the oxide layer is controlled substantially equally on the monitor wafer and the process wafer. Then the thickness of the oxide layer on the monitor wafer and the process wafer is measured.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: August 5, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Mao-Chan Chiu, May-Jun Chou, Ching-Tang Wang, Keng-Hui Su
  • Patent number: 7399714
    Abstract: The invention includes a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nitrogen within the silicon dioxide is at least 10 ? above the substrate. After the nitrogen is formed within the silicon dioxide layer, conductively doped silicon is formed on the silicon dioxide layer.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: July 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Kevin L. Beaman, John T. Moore
  • Patent number: 7396729
    Abstract: A semiconductor device is formed by providing a substrate. A trench is formed in the substrate. Beveled surfaces are formed at upper portions of sidewalls of the trench opposite a bottom surface of the trench, respectively. An oxide layer is formed in the trench such that the oxide layer is thicker on the beveled surfaces of the trench than on other surfaces of the trench.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: July 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Jeong, Wook-Hyoung Lee
  • Patent number: 7390757
    Abstract: The present invention relates to fluorinated silicate glass (FSG) with low dielectric constant and improved gap-fill characteristics. In the present method, a fluorinated silicon source, an optional fluorine source, an optional carbon source, a hydrogen source, and an oxygenator are used as the reactant gases. Inert or carrier gas(es) may also be used. In accordance with the present invention, the reactant gas mixture does not comprise a silane compound having the general formula SixHy, wherein x has a range of 1 to 2, y has a range of 4 to 6. The material deposited is thus referred to herein alternatively as “SixFy-only FSG” or “SixFy-only fluorinated oxide” (“SOFO”).
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: June 24, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Seong-Oh Woo, Jun Tae Choi
  • Patent number: 7387972
    Abstract: In-situ steam generation (ISSG) is used to reduce the nitrogen concentration in silicon and silicon oxide areas.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: June 17, 2008
    Assignee: Promos Technologies Pte. Ltd.
    Inventors: Zhong Dong, Chiliang Chen, Ching-Hwa Chen
  • Patent number: 7384880
    Abstract: A method for making a semiconductor device is described. That method comprises converting a hydrophobic surface of a substrate into a hydrophilic surface, and forming a high-k gate dielectric layer on the hydrophilic surface.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: June 10, 2008
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Jack Kavalieros, Mark L. Doczy, Matthew V. Metz, Suman Datta, Robert S. Chau
  • Publication number: 20080132085
    Abstract: A light absorption layer for use in fabricating semiconductor devices is provided with a high Si concentration. For example, a semiconductor device comprises a substrate and an Si-rich dielectric light absorption layer, such as an SiON or SiOX layer having an Si concentration of at least 68%. A second dielectric antireflective coating layer is optionally formed over the Si-rich dielectric light absorption layer.
    Type: Application
    Filed: January 22, 2008
    Publication date: June 5, 2008
    Applicant: Macronix International Co., Ltd.
    Inventors: Shing Ann Luo, Chin Ta Su
  • Patent number: 7378358
    Abstract: A substrate-processing apparatus (100, 40) comprises a radical-forming unit (26) for forming the nitrogen radicals and oxygen radicals through a high-frequency plasma, a processing vessel (21) in which a substrate (W) to be processed is held, and a gas-supplying unit (30) which is connected to the radical-forming unit. The gas-supplying unit (30) controls the mixture ratio between a first raw material gas containing the nitrogen and a second raw material gas containing oxygen, and supplies a mixture gas of a desired mixture ratio to the radical-forming unit. By supplying the nitrogen radicals and oxygen radicals mixed at the controlled mixture ratio to the surface of the substrate, an insulating film having a desired nitrogen concentration is formed on the surface of the substrate.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: May 27, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Igeta, Shintaro Aoyama, Hiroshi Shinriki
  • Patent number: 7375040
    Abstract: A SiOC layer and/or a SiC layer of an etch stop layer may be improved by altering the process used to form them. In a bi-layer structure, a SiOC layer and/or a SiC layer may be improved to provide better reliability. A silicon carbide (SiC) layer may be used to form a single-layer etch stop layer, while also acting as a glue layer to improve interface adhesion. Preferably, the SiC layer is formed in a reaction chamber having a flow of substantially pure trimetholsilane (3MS) streamed into and through the reaction chamber under a pressure of less than about 2 torr therein. Preferably, the reaction chamber is energized with high frequency RF power of about 100 watts or more. Preferably, the SiOC layer is formed in a reaction chamber having a flow of 3MS and CO2, and is energized with low frequency RF power of about 100 watts or more.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: May 20, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Simon S. H. Lin, Weng Chang, Syun-Ming Jang, Mong Song Liang
  • Patent number: 7374994
    Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jin Cho, Yo-sep Min, Young-soo Park, Jung-hyun Lee, June-key Lee, Yong-kyun Lee
  • Patent number: 7361613
    Abstract: A gate insulating film made of silicon oxynitride is disposed on the partial surface area of a semiconductor substrate. A gate electrode is disposed on the gate insulating film. Source and drain regions are disposed on both sides of the gate electrode. An existence ratio of subject nitrogen atoms to a total number of nitrogen atoms in the gate insulating film is 20% or smaller, wherein three bonds of each subject nitrogen atom are all coupled to silicon atoms and remaining three bonds of each of three silicon atoms connected to the subject nitrogen atom are all coupled to other nitrogen atoms.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: April 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Mitsuaki Hori, Naoyoshi Tamura, Mayumi Shigeno
  • Publication number: 20080076254
    Abstract: Yield loss in semiconductor processing is mitigated by forming a resist over an active side of a semiconductor workpiece or wafer, as well as around the edge of the wafer. The resist mitigates the creation of contaminants, such as nitride flakes, for example, that can develop when an oxide, nitride, oxide (ONO) layer is removed from the back or in-active side of the wafer. In the absence of the resist, such flakes may migrate to the front or active side of the wafer and cause defects to form therein, which can result in yield loss.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 27, 2008
    Inventors: Scott Cuong Nguyen, Keith David Fenstermacher, David Michael Smith, Courtney Michael Hazelton
  • Patent number: 7348282
    Abstract: A method of forming a gate insulating layer and nitrogen density measuring method thereof, by which a transistor having enhanced electric characteristics can be fabricated without employing separate ion implantation in a manner of providing parameters for enhancing perfection of the transistor via nitridation measurement. The method includes forming a first oxide layer on a silicon substrate having first to fourth regions defined thereon, patterning the first oxide layer in the first and fourth regions to have a predetermined thickness, and forming a nitride layer on the oxide layer in the third and fourth regions.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: March 25, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Sang Yong Lee
  • Patent number: 7348644
    Abstract: Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: March 25, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Koike, Masato Koyama, Tsunehiro Ino, Yuuichi Kamimuta, Akira Takashima, Masamichi Suzuki, Akira Nishiyama
  • Publication number: 20080070421
    Abstract: A method is provided for processing a substrate surface by delivering a first gas mixture comprising a first organosilicon compound, a first oxidizing gas, and one or more hydrocarbon compounds into a chamber at deposition conditions sufficient to deposit a first low dielectric constant film on the substrate surface. A second gas mixture having a second organosilicon compound and a second oxidizing gas is delivered into the chamber at deposition conditions sufficient to deposit a second low dielectric constant film on the first low dielectric constant film. The flow rate of the second oxidizing gas into the chamber is increased, and the flow rate of the second organosilicon compound into the chamber is decreased to deposit an oxide rich cap on the second low dielectric constant film.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 20, 2008
    Inventors: Ping Xu, Christopher Dennis Bencher
  • Publication number: 20080061403
    Abstract: A semiconductor structure and methods for forming the same. The structure includes (a) a substrate; (b) a first device and a second device each being on the substrate; (c) a device cap dielectric layer on the first and second devices and the substrate, wherein the device cap dielectric layer comprises a device cap dielectric material; (d) a first dielectric layer on top of the device cap dielectric layer, wherein the first dielectric layer comprises a first dielectric material; (e) a second dielectric layer on top of the first dielectric layer; and (f) a first electrically conductive line and a second electrically conductive line each residing in the first and second dielectric layers. The first dielectric layer physically separates the first and second electrically conductive lines from the device cap dielectric layer. A dielectric constant of the first dielectric material is less than that of the device cap dielectric material.
    Type: Application
    Filed: September 8, 2006
    Publication date: March 13, 2008
    Inventors: Zhong-Xiang He, Ning Lu, Anthony Kendall Stamper
  • Publication number: 20080050932
    Abstract: The present invention generally provides an apparatus and method for reducing defects on films deposited on semiconductor substrates. One embodiment of the present invention provides a method for depositing a film on a substrate. The method comprises treating the substrate with a first plasma configured to reduce pre-existing defects on the substrate, and depositing a film comprising silicon and carbon on the substrate by applying a second plasma generated from at least one precursor and at least one reactant gas.
    Type: Application
    Filed: August 23, 2006
    Publication date: February 28, 2008
    Inventors: Annamalai Lakshmanan, Vu NT Nguyen, Sohyun Park, Ganesh Balasubramanian, Steven Reiter, Tsutomu Kiyohara, Francimar Schmitt, Bok Hoen Kim
  • Patent number: 7320944
    Abstract: A method of forming a phosphosilicate glass, includes flowing a pre-deposition gas comprising an inert gas into a deposition chamber containing a substrate, where the temperature of the substrate is at a pre-deposition temperature of at least 400° C; continuously increasing the temperature of gas in the chamber to a deposition temperature and simultaneously continuously increasing a flow rate of phosphine and silane until a phosphine:silane deposition ratio is achieved; and depositing the phosphosilicate glass on the substrate at the deposition temperature and at the phosphine:silane deposition ratio.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: January 22, 2008
    Assignee: Cypress Semiconductor Corporation
    Inventors: Michal Efrati Fastow, Ryan Holler
  • Publication number: 20070281497
    Abstract: Methods are provided for processing a substrate comprising a bilayer barrier film thereon. In one aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and ultraviolet curing the dielectric layer. In another aspect, a method comprises depositing a first barrier layer, depositing a second barrier layer on the first barrier layer, depositing a dielectric layer on the bilayer barrier film formed by the first barrier layer and the second barrier layer, and curing the dielectric layer with an electron beam treatment.
    Type: Application
    Filed: May 21, 2007
    Publication date: December 6, 2007
    Inventors: Yijun Liu, Huiwen Xu, Li-Qun Xia, Chad Peterson, Hichem M'saad