Organic Reactant Patents (Class 438/789)
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Patent number: 6933247Abstract: A method for forming a minute pattern includes forming a mask layer on an object being patterned. The mask layer is patterned to form a first mask pattern having a first width larger than a predetermined width. The first mask pattern is thermally treated to form a second mask pattern having a second width smaller than the first width. A polymer layer is formed on the second mask pattern. The polymer layer reacts with the second mask pattern to form a hardened layer on a boundary surface between the polymer layer and the second mask pattern, thereby forming a third mask pattern having a third width substantially identical to the predetermined width. The limits of the present photolithography equipment are overcome. Also, a semiconductor device having a CD of below about 100 nm is manufactured.Type: GrantFiled: February 11, 2004Date of Patent: August 23, 2005Assignee: Samsung Electronics, Co., Ltd.Inventors: Sung-Hwan Byun, Dae-Youp Lee, Bong-Cheol Kim
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Patent number: 6930061Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.Type: GrantFiled: August 26, 2003Date of Patent: August 16, 2005Assignee: Applied Materials Inc.Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
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Patent number: 6914014Abstract: A method for depositing a low dielectric constant film on a substrate. The method includes depositing a low dielectric constant film comprising silicon, carbon, oxygen and hydrogen on the substrate disposed in a chemical vapor deposition chamber, introducing a gas mixture comprising a hydrogen-containing gas to the chemical vapor deposition chamber, forming a plasma of the gas mixture proximate the low dielectric constant film using a radio frequency power, and applying a direct current bias to at least one of the substrate or a gas distribution plate to cure the low dielectric constant film.Type: GrantFiled: January 13, 2003Date of Patent: July 5, 2005Assignee: Applied Materials, Inc.Inventors: Lihua Li, Tzu-Fang Huang, Li-Qun Xia, Juan Carlos Rocha-Alvarez, Maosheng Zhao
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Patent number: 6913796Abstract: Low dielectric constant porous materials with improved elastic modulus and hardness. The process of making such porous materials involves providing a porous dielectric material and plasma curing the porous dielectric material to produce a plasma cured porous dielectric material. Plasma curing of the porous dielectric material yields a material with improved modulus and hardness. The improvement in elastic modulus is typically greater than or about 50%, more typically greater than or about 100%, and more typically greater than or about 200%. The improvement in hardness is typically greater than or about 50%. The plasma cured porous dielectric material can optionally be post-plasma treated. The post-plasma treatment of the plasma cured porous dielectric material reduces the dielectric constant of the material while maintaining an improved elastic modulus and hardness as compared to the plasma cured porous dielectric material.Type: GrantFiled: September 14, 2001Date of Patent: July 5, 2005Assignees: Axcelis Technologies, Inc., Dow Corning CorporationInventors: Ralph Albano, Cory Bargeron, Ivan L. Berry, III, Jeff Bremmer, Phil Dembowski, Orlando Escorcia, Qingyuan Han, Nick Sbrockey, Carlo Waldfried
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Patent number: 6890850Abstract: Methods are provided for depositing an oxygen-doped dielectric layer. The oxygen-doped dielectric layer may be used for a barrier layer or a hardmask. In one aspect, a method is provided for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas comprising an oxygen-containing organosilicon compound, carbon dioxide, or combinations thereof, and an oxygen-free organosilicon compound to the processing chamber, and reacting the processing gas to deposit an oxygen-doped dielectric material on the substrate, wherein the dielectric material has an oxygen content of about 15 atomic percent or less. The oxygen-doped dielectric material may be used as a barrier layer in damascene or dual damascene applications.Type: GrantFiled: July 15, 2002Date of Patent: May 10, 2005Assignee: Applied Materials, Inc.Inventors: Ju-Hyung Lee, Ping Xu, Shankar Venkataraman, Li-Qun Xia, Fei Han, Ellie Yieh, Srinivas D. Nemani, Kangsub Yim, Farhad K. Moghadam, Ashok K. Sinha, Yi Zheng
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Patent number: 6887780Abstract: A process for forming an interlayer dielectric layer is disclosed. The method comprises first forming a carbon-doped oxide (CDO) layer with a first concentration of carbon dopants therein. Next, the CDO layer is further formed with a second concentration of carbon dopants therein, wherein the first concentration is different than the second concentration.Type: GrantFiled: August 31, 2001Date of Patent: May 3, 2005Assignee: Intel CorporationInventors: Ebrahim Andideh, Mark Bohr
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Patent number: 6881683Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The silicon-containing hydrocarbon compound includes a cyclosiloxan compound or a linear siloxan compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.Type: GrantFiled: December 11, 2002Date of Patent: April 19, 2005Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato, Shinya Kaneko, Devendra Kumar, Seijiro Umemoto
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Patent number: 6869896Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.Type: GrantFiled: August 26, 2003Date of Patent: March 22, 2005Assignee: Applied Materials, Inc.Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
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Patent number: 6864561Abstract: The fixed charge in a borophosphosilicate glass insulating film deposited on a semiconductor device is reduced by reacting an organic precursor such as TEOS with O3. When done at temperatures higher than approximately 480 degrees C., the carbon level in the resulting film appears to be reduced, resulting in a higher threshold voltage for field transistor devices.Type: GrantFiled: December 4, 2003Date of Patent: March 8, 2005Assignee: Micron Technology, Inc.Inventors: Ravi Iyer, Randhir P. S. Thakur, Howard E. Rhodes
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Patent number: 6852650Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.Type: GrantFiled: November 5, 2002Date of Patent: February 8, 2005Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato
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Patent number: 6852647Abstract: A method is provided for processing a substrate including removing amorphous carbon material disposed on a low k dielectric material with minimal or reduced defect formation and minimal dielectric constant change of the low k dielectric material. In one aspect, the invention provides a method for processing a substrate including depositing at least one dielectric layer on a substrate surface, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less, forming amorphous carbon material on the at least one dielectric layer, and removing the one or more amorphous carbon layers by exposing the one or more amorphous carbon layers to a plasma of a hydrogen-containing gas.Type: GrantFiled: March 7, 2003Date of Patent: February 8, 2005Assignee: Applied Materials, Inc.Inventor: Christopher Dennis Bencher
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Patent number: 6852651Abstract: The present invention relates to a semiconductor device in which an interlayer insulating film having a low dielectric constant is formed by covering wiring primarily made of a copper film, and to a method of manufacturing the same. In manufacturing the semiconductor device an insulating film having a low dielectric constant is formed on a substrate by converting a film-forming gas into a plasma for reaction. The method includes forming a low-pressure insulating film on the substrate by coverting the film-forming gas at a first gas pressure into a plasma and forming a high-pressure insulating film on the low-pressure insulating film by converting the film-forming gas at second gas pressure, higher than the first gas pressure, into a plasma and reaction.Type: GrantFiled: October 2, 2001Date of Patent: February 8, 2005Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Yuichiro Kotake, Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda
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Patent number: 6849562Abstract: A method for depositing a low k dielectric film comprising silicon, carbon, and nitrogen is provided. The low k dielectric film is formed by a gas mixture comprising a silicon source, a carbon source, and NR1R2R3, wherein R1, R2, and R3 are selected from the group consisting of alkyl and phenyl groups. The low k dielectric film may be used as a barrier layer, an etch stop, an anti-reflective coating, or a hard mask.Type: GrantFiled: March 4, 2002Date of Patent: February 1, 2005Assignee: Applied Materials, Inc.Inventors: Chi-I Lang, Li-Qun Xia, Ping Xu, Louis Yang
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Patent number: 6841489Abstract: A semiconductor device manufacturing method includes the steps of (a) introducing a first substrate into a first CVD chamber; (b) raising the first substrate temperature to a predetermined value; (c) growing a film on the first substrate by supplying vapor phase material in a material line to the first chamber; (d) introducing a second substrate into a second CVD chamber; (e) raising the second substrate temperature to the predetermined value; and (f) growing a film on the second substrate by supplying the vapor phase material to the second chamber. Steps (c) and (f) supply the vapor phase material selectively to the first and second chambers, respectively. In step (f) after step (c), the chamber to which the vapor phase material is supplied is switched from the first chamber to the second chamber so that the pressure of the vapor phase material in the material line is kept substantially constant.Type: GrantFiled: February 12, 2003Date of Patent: January 11, 2005Assignee: Fujitsu LimitedInventors: Shigeyoshi Umemiya, Kenji Maruyama
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Patent number: 6838393Abstract: Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also includes a barrier layer. Methods for depositing oxygen-doped silicon carbide barrier layers are also provided. The silicon carbide layer may be deposited by reacting a gas mixture comprising an organosilicon compound, an aliphatic hydrocarbon comprising a carbon-carbon double bond or a carbon-carbon triple bond, and optionally, helium in a plasma. Alternatively, the silicon carbide layer may be deposited by reacting a gas mixture comprising hydrogen or argon and an organosilicon compound in a plasma.Type: GrantFiled: September 19, 2002Date of Patent: January 4, 2005Assignee: Applied Materials, Inc.Inventors: Kang Sub Yim, Melissa M. Tam, Dian Sugiarto, Chi-I Lang, Peter Wai-Man Lee, Li-Qun Xia
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Patent number: 6833331Abstract: An SOG film 16 obtained by heat-treating a polysilazan type SOG film at high temperature of about 800° C. is used as a planarized insulating film to be formed on the gate electrode (9; see FIGS. 31 and 32) of a MISFET (Qs, Qn, Qp) A polysilazan SOG film (57) not subjected to such a heat treatment is used as interlayer insulating film arranged among upper wiring layers (54, 55, 56, 62, 63).Type: GrantFiled: November 26, 2002Date of Patent: December 21, 2004Assignees: Hitachi Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Masayoshi Saito, Katsuhiko Hotta, Masayoshi Hirasawa, Masayuki Kojima, Hiroyuki Uchiyama, Hiroyuki Maruyama, Takuya Fukuda
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Patent number: 6815374Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.Type: GrantFiled: June 9, 2003Date of Patent: November 9, 2004Assignee: Micron Technology, Inc.Inventor: Ravi Iyer
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Patent number: 6815373Abstract: A method for depositing a low dielectric constant film having a dielectric constant of about 3.5 or less is provided by blending one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, and one or more low molecular weight aliphatic hydrocarbon compounds. In one aspect, a gas mixture comprising one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, one or more aliphatic hydrocarbon compounds, one or more oxidizing gases, and a carrier gas is reacted at conditions sufficient to deposit a low dielectric constant film on a substrate surface.Type: GrantFiled: April 16, 2002Date of Patent: November 9, 2004Assignee: Applied Materials Inc.Inventors: Vinita Singh, Srinivas D. Nemani, Yi Zheng, Lihua Li, Tzu-Fang Huang, Li-Qun Xia, Ellie Yieh
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Patent number: 6812164Abstract: A method for ionization film formation to form a deposited film by ionizing vaporized particles with an ionization mechanism of the hot-cathode system and injecting the ionized particles into a substrate is provided. The method includes the step of introducing He gas inside the ionization mechanism.Type: GrantFiled: January 24, 2003Date of Patent: November 2, 2004Assignee: Canon Kabushiki KaishaInventors: Hirohito Yamaguchi, Masahiro Kanai, Atsushi Koike, Katsunori Oya
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Publication number: 20040209005Abstract: Disclosed is a film-forming method, comprising supplying into a plasma processing chamber at least three kinds of gases including a silicon compound gas, an oxidizing gas, and a rare gas, the percentage of the partial pressure of the rare gas (Pr) based on the total pressure being not smaller than 85%, i.e., 85%≦Pr<100%, and generating a plasma within the plasma processing chamber so as to form a film of silicon oxide on a substrate to be processed.Type: ApplicationFiled: April 12, 2004Publication date: October 21, 2004Inventors: Masashi Goto, Kazufumi Azuma, Yukihiko Nakata
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Publication number: 20040198070Abstract: A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.Type: ApplicationFiled: April 20, 2004Publication date: October 7, 2004Inventors: Li-Qun Xia, Ping Xu, Louis Yang
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Patent number: 6800571Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilane or organosiloxane compound and an oxidizing gas at a low RF power level from 10-250 W. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, or dimethylsilane, (CH3)2SiH2, and nitrous oxide, N2O, at an RF power level from about 10 to 200 W or a pulsed RF power level from about 20 to 250 W during 10-30% of the duty cycle.Type: GrantFiled: December 17, 2002Date of Patent: October 5, 2004Assignee: Applied Materials Inc.Inventors: David Cheung, Wai-Fan Yau, Robert R. Mandal
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Patent number: 6797607Abstract: A process for forming a substantially planarized nanoporous dielectric silica coating on a substrate suitable for preparing a semiconductor device, and semiconductor devices produced by the methods of the invention. The process includes the steps of applying a composition that includes at least one silicon-based dielectric precursor to a substrate, and then, (a) gelling or aging the applied coating, (b) contacting the coating with a planarization object with sufficient pressure to transfer a planar impression to the coating without substantially impairing formation of desired nanometer-scale pore structure, (c) separating the planarized coating from the planarization object, (d) curing said planarized coating; wherein steps (a)-(d) are conducted in any one of the following sequences: (a), (b), (c) and (d); (a), (d), (b) and (c); (b), (a), (d) and (c); and (b), (c), (a) and (d).Type: GrantFiled: October 26, 2001Date of Patent: September 28, 2004Assignee: AlliedSignal Inc.Inventors: Denis H. Endisch, James S. Drage
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Patent number: 6794270Abstract: A method for forming thoroughly deposited shallow trench isolation. A first oxide layer is formed conformally over the surface of a semiconductor substrate and on a trench thereon with an aspect ratio greater than 3. A liquid etching shield is filled in the trench by spin-spraying to cover the oxide layer in the trench. An etchant is then sprayed over the surface of the semiconductor substrate to remove the uncovered oxide layer and expose the surface of the semiconductor substrate. The density of the etchant is less than that of the liquid etching shield. A second oxide layer is deposited in the trench to form isolation without voids or seams.Type: GrantFiled: March 21, 2003Date of Patent: September 21, 2004Assignee: Nanya Technology CorporationInventors: Pei-Ing Lee, Chang Rong Wu, Tzu En Ho, Yi-Nan Chen, Hsien Wen Su
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Patent number: 6790788Abstract: A method is provided for processing a substrate including providing a processing gas comprising hydrogen gas and an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.Type: GrantFiled: January 13, 2003Date of Patent: September 14, 2004Assignee: Applied Materials Inc.Inventors: Lihua Li, Tzu-Fang Huang, Li-Qun Xia
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Patent number: 6787445Abstract: A fluorine-containing organic film is deposited on a semiconductor substrate using a material gas containing fluorocarbon as a main component in a reactor chamber of a plasma processing apparatus. The fluorine-containing organic film is then exposed to plasma of a rare gas in the same reactor chamber to densify the fluorine-containing organic film.Type: GrantFiled: November 8, 2000Date of Patent: September 7, 2004Assignee: Matsushita Electric Industry Co., Ltd.Inventors: Nobuhiro Jiwari, Shinichi Imai
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Patent number: 6784123Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus, and depositing a siloxan polymer film by plasma polymerization at a temperature of −50° C.-100° C. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant such as 2.5.Type: GrantFiled: March 27, 2003Date of Patent: August 31, 2004Assignee: ASM Japan K.K.Inventors: Nobuo Matsuki, Yoshinori Morisada, Yasuyoshi Hyodo, Seijiro Umemoto
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Patent number: 6784122Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.Type: GrantFiled: February 21, 2003Date of Patent: August 31, 2004Assignee: Micron Technology, Inc.Inventor: Ravi Iyer
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Patent number: 6784121Abstract: A xerogel aging system includes an aging chamber (190) with inlets and outlet and flows a gel catalyst in gas phase over a xerogel precursor film on a semiconductor wafer. Preferred embodiments use an ammonia and water vapor gas mixture catalyst.Type: GrantFiled: October 23, 1998Date of Patent: August 31, 2004Assignee: Texas Instruments IncorporatedInventors: Changming Jin, Richard Scott List, Joseph D. Luttmer
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Patent number: 6784118Abstract: In order to vaporize an organic monomer at a high temperature and a high saturated vapor pressure in good efficiency and to grow an organic polymer film at a high rate in high vacuum by a plasma polymerization reaction of the resulting organic monomer gas, a liquid divinylsiloxanebisbenzocyclobutene (DVS-BCB) monomer is mixed with a carrier gas, and the mixture is then sprayed on a vaporization vacuum chamber held at a high temperature to form an aerosol made of liquid fine particles of the organic monomer, and a BCB monomer (organic monomer) is instantaneously vaporized via the aerosol to generate a BCB monomer gas (organic monomer gas). Consequently, the aerosol having a large specific surface area has a large vaporization area, and vaporization occurs by heating at a high temperature before a polymerization reaction occurs. Thus, 0.1 g/min or more of the BCB monomer gas can be formed at 200° C.Type: GrantFiled: April 20, 2001Date of Patent: August 31, 2004Assignee: NEC CorporationInventors: Yoshihiro Hayashi, Jun Kawahara, Hirofumi Ono
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Patent number: 6784092Abstract: Disclosed is a method for forming an insulating layer, including coating a substrate with an insulating film material to form a coated film, the insulating film material containing at least first and second polymers differing from each other in average molecular weight, and heating the coated film while irradiating the coated film with an electron beam.Type: GrantFiled: March 26, 2002Date of Patent: August 31, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Hideshi Miyajima, Miyoko Shimada, Rempei Nakata
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Publication number: 20040166665Abstract: A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about 3, and depositing a silicon and carbon containing layer on the dielectric layer. The dielectric constant of a dielectric layer deposited by reaction of an organosilicon compound having three or more methyl groups is significantly reduced by further depositing an amorphous hydrogenated silicon carbide layer by reaction of an alkylsilane in a plasma of a relatively inert gas.Type: ApplicationFiled: February 27, 2004Publication date: August 26, 2004Applicant: Applied Materials, Inc.Inventors: Frederic Gaillard, Li-Qun Xia, Tian-Hoe Lim, Ellie Yieh, Wai-Fan Yau, Shin-Puu Jeng, Kuowei Liu, Yung-Cheng Lu
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Publication number: 20040166664Abstract: A thin film made of an amorphous material having a supercooled liquid phase region is formed on a substrate. Then, the thin film is heated to a temperature within the supercooled liquid phase region and is deformed by its weight, mechanical external force, electrostatic external force or the like, thereby to form a thin film-structure. Thereafter, the thin film-structure is cooled down to room temperature, which results in the prevention of the thin film's deformation.Type: ApplicationFiled: March 1, 2004Publication date: August 26, 2004Applicant: Tokyo Institute of TechnologyInventors: Akira Shimokohbe, Seiichi Hata
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Patent number: 6777325Abstract: Disclosed is a semiconductor device having a dielectric film of a stacked structure, comprising a low dielectric constant film containing silicon, oxygen and carbon a modified layer for the low dielectric constant film containing silicon, oxygen, carbon and fluorine and a dielectric protection film formed successively on a semiconductor substrate, the semiconductor device being manufactured by applying a plasma treatment using a fluorine-containing gas to the surface of an organic siloxane film to form a modified layer and then forming a dielectric protection film, which can improve the adhesivity with the dielectric protection film without increasing the dielectric constant of the organic siloxane film to prevent delamination.Type: GrantFiled: April 16, 2003Date of Patent: August 17, 2004Assignee: Hitachi, Ltd.Inventors: Daisuke Ryuzaki, Takeshi Furusawa
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Patent number: 6777349Abstract: Hermetic amorphous doped silicon carbide is deposited on an integrated circuit substrate in a PECVD reactor. Nitrogen-doping of an SiC film is conducted by flowing nitrogen-containing molecules, preferably nitrogen or ammonia gas, into the reactor chamber together with an organosilane, preferably tetramethylsilane, and forming a plasma. Oxygen-doping is conducted by flowing oxygen-containing molecules into the reaction chamber.Type: GrantFiled: June 28, 2002Date of Patent: August 17, 2004Assignee: Novellus Systems, Inc.Inventors: Haiying Fu, Ka Shun Wong, Xingyuan Tang, Judy Hsiu-Chih Huang, Bart Jan van Schravendijk
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Patent number: 6774058Abstract: A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the substrate. In particular, the method is applicable to removing water from a water-containing layer on the substrate by contacting the layer with a hygroscopic liquid. Trenches on a substrate can be isolated by filling the trenches with a water-containing gel formed by reacting silane and hydrogen peroxide. The gel is contacted with sulfuric acid to remove a portion of the water from the gel before annealing to form silica in the trenches. Unlike filled trenches formed by conventional technology, there are no voids in the bottom of the trenches. The method is also applicable to forming dielectric layers which cover metal lines, low-dielectric layers, and interlayer dielectric layers.Type: GrantFiled: December 20, 2001Date of Patent: August 10, 2004Assignee: Micron Technology, Inc.Inventor: Li Li
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Publication number: 20040152342Abstract: Methods of forming an oxide layer such as high aspect ratio trench isolations, and treating the oxide substrate to remove carbon, structures formed by the method, and devices and systems incorporating the oxide material are provided.Type: ApplicationFiled: February 4, 2003Publication date: August 5, 2004Applicant: Micron Technology, Inc.Inventors: Li Li, Weimin Li
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Patent number: 6770574Abstract: Methods for fabricating a dielectric layer are provided. In one embodiment, a silicon-containing material is deposited on a substrate. The deposited material is processed with a reactive agent to react with silicon atoms of the deposited material to form the dielectric layer. The silicon-containing dielectric layer can allow for improved or smaller semiconductor devices. Improved or smaller semiconductor devices may be accomplished by reducing leakage and increasing the dielectric constant.Type: GrantFiled: February 21, 2002Date of Patent: August 3, 2004Assignee: Micron Technology, Inc.Inventors: Don Carl Powell, Garry Anthony Mercaldi
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Patent number: 6770572Abstract: A process for treating a silica film on a substrate, which includes reacting a suitable silica film with an effective amount of a surface modification agent, wherein the silica film is present on a substrate. The reaction is conducted under suitable conditions and for a period of time sufficient for the surface modification agent to form a hydrophobic coating on the film. The surface modification agent includes at least one type of oligomer or polymer reactive with silanols on the silica film. Dielectric films and integrated circuits including such films are also disclosed.Type: GrantFiled: January 20, 2000Date of Patent: August 3, 2004Assignee: AlliedSignal Inc.Inventors: Hui-Jung Wu, James S. Drage
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Patent number: 6770556Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH3SiH3, and N2O.Type: GrantFiled: November 21, 2002Date of Patent: August 3, 2004Assignee: Applied Materials Inc.Inventors: Wai-Fan Yau, David Cheung, Shin-Puu Jeng, Kuowei Liu, Yung-Cheng Yu
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Patent number: 6764965Abstract: A method for improving the coating capability of low dielectric layer is disclosed. The method includes steps of an etching stop layer is deposited a semiconductor substrate, an adhesion promoter layer is spun-on the etching stop layer. The pre-wetting process being performed on the adhesion promoter layer to enhance the coating capability of the low-k dielectric layer, and thus improve the coating quality through the pre-wetting process of baked adhesion promoter layer before the low-k dielectric layer is applied.Type: GrantFiled: August 17, 2001Date of Patent: July 20, 2004Assignee: United Microelectronics Corp.Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Chih-An Huang
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Patent number: 6759098Abstract: Low dielectric constant film materials with improved elastic modulus. The method of making such film materials involves providing a porous methyl silsesquioxane based dielectric film material produced from a resin molecule containing at least 2 Si—CH3 groups and plasma curing the porous film material to convert the film into porous silica. Plasma curing of the porous film material yields a film with improved modulus and outgassing properties. The improvement in elastic modulus is typically greater than or about 100%, and more typically greater than or about 200%. The plasma cured porous film material can optionally be annealed. The annealing of the plasma cured film may reduce the dielectric constant of the film while maintaining an improved elastic modulus as compared to the plasma cured porous film material. The annealed, plasma cured film has a dielectric constant between about 1.1 and about 2.4 and an improved elastic modulus.Type: GrantFiled: July 16, 2001Date of Patent: July 6, 2004Assignees: Axcelis Technologies, Inc., Chemat Technology, Inc.Inventors: Qingyuan Han, Carlo Waldfried, Orlando Escorcia, Ralph Albano, Ivan L. Berry, III, Jeff Jang, Ian Ball
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Publication number: 20040127069Abstract: In forming various types of insulating films in manufacture of a semiconductor device, carbon is gasified into CHx, COH etc. during film formation by adding active hydrogen and nitrogen oxide to reduce the carbon content during the film formation, and the effect of blocking impurities such as alkali metals is improved.Type: ApplicationFiled: December 18, 2003Publication date: July 1, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd. a Japan corporationInventors: Shunpei Yamazaki, Mitsunori Sakama, Takeshi Fukada
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Patent number: 6753270Abstract: The present invention relates to a method for providing a dielectric film having a low dielectric constant that is particularly useful as an intermetal dielectric layer. The method of the present invention deposits a porous oxide gap fill layer from a process gas of ozone and TEOS. The gap fill layer is deposited over a surface sensitive lining layer (as opposed to a non-surface sensitive layer as is commonly done in the industry) using deposition conditions that maximize the amount of carbon that is incorporated into the gap fill layer and result in a porous silicon oxide film. A typical SACVD ozone/TEOS gap fill layer has a carbon content of about 2-3 atomic percent (at. %). An SACVD ozone/TEOS gap fill layer deposited according to the present, however, has a carbon content of at least 5 at. % and preferably has a carbon content of between about 7-8 at. %.Type: GrantFiled: August 4, 2000Date of Patent: June 22, 2004Assignee: Applied Materials Inc.Inventors: Fabrice Geiger, Frederic Gaillard
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Patent number: 6750137Abstract: A method for forming an interlayer insulating film includes the steps of forming an underlying insulating film on a substrate; forming a film containing B (boron), C (carbon) and H2O) on the underlying insulating film by plasma enhanced chemical vapor deposition using a source gas containing an Si—C—O—H compound, an oxidative gas and a compound containing B (boron); releasing C (carbon) and H2O in the film from the film by annealing the film, and thereby forming a porous SiO2 film containing B (boron); and subjecting to the porous SiO2 film containing B (boron) to H (hydrogen) plasma treatment, and then forming a cover insulating film.Type: GrantFiled: March 6, 2000Date of Patent: June 15, 2004Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventor: Kazuo Maeda
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Patent number: 6746970Abstract: A passivation layer is deposited onto the surface of a substrate followed by deposition of a polymer layer, through the application of a plasma enhanced chemical vapor deposition process, in which the substrate is placed on a chuck within a reaction chamber and fluorocarbon gas is introduced into the reaction chamber under the influence of at least one plasma source. The fluorocarbon gas can be a CFX gas. The at least one plasma source can include a first plasma source that ionizes the fluorocarbon gas by applying RF plasma energy, and a second plasma source that applies a near-zero self-bias to the substrate at an RF frequency during deposition of the passivation layer and a greater bias during deposition of the polymer layer. The passivation layer is deposited prior to the polymer layer to protect the surface of the substrate from damage during the deposition of the polymer layer.Type: GrantFiled: June 24, 2002Date of Patent: June 8, 2004Assignee: Macronix International Co., Ltd.Inventors: Ming-Chung Liang, Chung Tai Chen, Hsin-Yi Tsai
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Publication number: 20040106302Abstract: A method of forming a PE-TEOS layer of a semiconductor IC device provides uniformly thick PE-TEOS layers on a batch of wafers. First, a loading wafer cassette is prepared to provide the wafers to be processed. Next, a process atmosphere is pre-created in a processing chamber. Then the wafers are supplied in sequence into the chamber from the loading wafer cassette and the wafers are mounted on a heater table in the chamber. Next, the PE-TEOS layer is deposited on the wafers by spraying a process gas into the chamber through showerheads. Next, the wafers are discharged from the chamber. Once the chamber is cleared of wafers, the inside of the chamber is cleaned by supplying a cleaning gas into the chamber, and exciting the cleaning gas with RF power. Subsequently, more TEOS gas is supplied into the chamber through the showerheads without being excited by RF power to especially reduce the temperature of the showerheads and that prevailing inside the chamber.Type: ApplicationFiled: October 27, 2003Publication date: June 3, 2004Inventor: Bong-Jun Jang
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Patent number: 6743737Abstract: A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to water or a hydrophobic-imparting surfactant such as hexamethyldisilazane, and curing the silicon oxide based film at an elevated temperature. Dissociation of the oxidizing gas can be increased in a separate microwave chamber to assist in controlling the carbon content of the deposited film. The moisture resistance of the silicon oxide based films is enhanced.Type: GrantFiled: August 22, 2002Date of Patent: June 1, 2004Assignee: Applied Materials, Inc.Inventors: Wai-Fan Yau, David Cheung, Nasreen Gazala Chopra, Yung-Cheng Lu, Robert Mandal, Farhad Moghadam
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Patent number: 6740593Abstract: The invention includes a semiconductor processing method in which a semiconductor substrate is exposed to reactive ion etching conditions. The reactive ion etching conditions comprise subjecting exposed surfaces of the substrate to a gas having components therein which are reactive with the exposed surfaces. A total concentration of the reactive components within the gas is less than 4.5%, by volume. In particular aspects, the total concentration of the reactive components can be less than 2% by volume, or less than 1% by volume. Exemplary reactive components are fluorine-containing components, such as NF3.Type: GrantFiled: January 25, 2002Date of Patent: May 25, 2004Assignee: Micron Technology, Inc.Inventors: Kevin J. Torek, Satish Bedge
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Patent number: 6737365Abstract: A dielectric layer is made porous by treating the dielectric material after metal interconnects are formed in or through that layer. The porosity lowers the dielectric constant of the dielectric material. The dielectric material may be subjected to an electron beam or a sonication bath to create the pores. The structure has smooth sidewalls for metal interconnects extending through the dielectric layer.Type: GrantFiled: March 24, 2003Date of Patent: May 18, 2004Assignee: Intel CorporationInventors: Grant M. Kloster, Kevin P. O'Brien, Justin K. Brask, Michael D. Goodner, Donald Bruner