Utilizing Electromagnetic Or Wave Energy (e.g., Photo-induced Deposition, Plasma, Etc.) Patents (Class 438/792)
  • Publication number: 20120214318
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: adsorbing a precursor on a surface of a substrate; supplying a reactant gas over the surface; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least one halogen attached to silicon in its molecule.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: ASM JAPAN K.K.
    Inventors: Atsuki Fukazawa, Noboru Takamure
  • Patent number: 8236674
    Abstract: A substrate micro-processing method and a semiconductor device manufacturing method in which a stained part does not remain in a finished product even if a residual ion-injected part stays in the finished product. The substrate micro-processing method is one that carries out processing of a substrate by dividing the substrate depthwise, and comprises a proton injection step S11 in which protons are injected from one principal surface side of the substrate and an irradiation step S12 in which the substrate is irradiated with light having the wavelength nearly equal to the absorption wavelength of the defect level formed within the substrate due to the proton injection in order to divide the substrate.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: August 7, 2012
    Assignee: Japan Atomic Energy Agency
    Inventor: Shintaro Ishiyama
  • Publication number: 20120196450
    Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 2, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
  • Patent number: 8231800
    Abstract: There is provided a plasma processing apparatus including a plasma generating unit for generating a plasma in a processing chamber in which a set processing is performed on a substrate serving as an object to be processed. The plasma processing apparatus further includes a particle moving unit for electrostatically driving particles in a region above the substrate to be removed out of the region above the substrate in the processing chamber while the processing on the substrate is performed by using the plasma. In addition, there is provided a plasma processing method of a plasma processing apparatus including the steps of generating plasma in a processing chamber in which a set processing is performed on a substrate serving as an object to be processed; and performing the processing on the substrate by the plasma.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: July 31, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Moriya, Hiroyuki Nakayama
  • Patent number: 8232217
    Abstract: A method of manufacturing a semiconductor device has supplying a first reactant gas into buffer chamber provided in a reaction chamber of the film deposition apparatus to form a first film over an inner wall surface of the buffer chamber, and supplying a second reactant gas into the reaction chamber to form a second film over a semiconductor substrate.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Katsuaki Ookoshi
  • Publication number: 20120178268
    Abstract: A plasma processing apparatus generates plasma by introducing microwaves into a processing chamber by using a planar antenna having a plurality of slots. By using the plasma processing apparatus, a nitrogen containing gas and a silicon containing gas introduced into the processing chamber are brought into the plasma state, and at the time of depositing by using the plasma a silicon nitride film on the surface of the a substrate to be processed, stress to the silicon nitride film to be formed is controlled by the combination of the type and the processing pressure of the nitrogen containing gas.
    Type: Application
    Filed: March 19, 2012
    Publication date: July 12, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masayuki KOHNO, Tatsuo NISHITA, Toshio NAKANISHI
  • Publication number: 20120153442
    Abstract: Provided is a process of forming a silicon nitride film having concentration of hydrogen atoms below or equal to 9.9×1020 atoms/cm3 in the silicon nitride film by using a plasma CVD device, which generates plasma by introducing microwaves into a process chamber by using a planar antenna having a plurality of apertures, by setting the pressure inside a process chamber within a range from 0.1 Pa to 6.7 Pa and by performing a plasma CVD by using a raw material gas for film formation including SiCl4 gas and nitrogen gas.
    Type: Application
    Filed: June 20, 2011
    Publication date: June 21, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Masayuki Kohno
  • Patent number: 8202810
    Abstract: A method for forming a single damascene and/or dual damascene, contact and interconnect structure, comprising: performing front end processing, depositing copper including a copper barrier, annealing the copper in at least 90% N2 with less than 10% H2, performing planarization, performing in-situ low-H NH3 plasma treatment and low Si—H SiN etch stop layer deposition, and performing remaining back end processing.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: June 19, 2012
    Assignee: Spansion LLC
    Inventors: Alexander H. Nickel, Allen L. Evans, Minh Quoc Tran, Lu You, Minh Van Ngo, Pei-Yuan Gao, William S. Brennan, Erik Wilson, Sung Jin Kim, Hieu Trung Pham
  • Patent number: 8178436
    Abstract: Interconnect structures having improved adhesion and electromigration performance and methods to fabricate thereof are described. A tensile capping layer is formed on a first conductive layer on a substrate. A compressive capping layer is formed on the tensile capping layer. Next, an interlayer dielectric layer is formed on the compressive capping layer. Further, a first opening is formed in the ILD layer using a first chemistry. A second opening is formed in the tensile capping layer and the compressive capping layer using a second chemistry. Next, a second conductive layer is formed in the first opening and the second opening.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: May 15, 2012
    Assignee: Intel Corporation
    Inventors: Sean King, Jason Klaus
  • Patent number: 8178448
    Abstract: Disclosed is a method for using a film formation apparatus to form a silicon nitride film by CVD on target substrates while suppressing particle generation. The apparatus includes a process container and an exciting mechanism attached on the process container. The method includes conducting a pre-coating process by performing pre-cycles and conducting a film formation process by performing main cycles. Each of the pre-cycles and main cycles alternately includes a step of supplying a silicon source gas and a step of supplying a nitriding gas with steps of exhausting gas from inside the process container interposed therebetween. The pre-coating process includes no period of exciting the nitriding gas by the exciting mechanism. The film formation process repeats a first cycle set that excites the nitriding gas by the exciting mechanism and a second cycle that does not excite the nitriding gas by the exciting mechanism.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: May 15, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Nobutake Nodera, Masanobu Matsunaga, Kazuhide Hasebe, Koto Umezawa, Pao-Hwa Chou
  • Patent number: 8173554
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: May 8, 2012
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu, Deakyun Jeong
  • Patent number: 8168548
    Abstract: A method of forming a semiconductor device includes providing a substrate in a vacuum processing tool, the substrate having a strained Ge-containing layer on the substrate and a Si-containing layer on the strained Ge-containing layer, maintaining the substrate at a temperature less than 700° C., and exposing the Si-containing layer to oxidation radicals in an UV-assisted oxidation process to form a Si-containing dielectric layer while minimizing oxidation and strain relaxation in the underlying strained Ge-containing layer. A semiconductor device containing a substrate, a strained Ge-containing layer on the substrate, and a Si-containing dielectric layer formed on the strained Ge-containing layer is provided. The semiconductor device can further contain a gate electrode layer on the Si-containing dielectric layer or a high-k layer on the Si-containing dielectric layer and a gate electrode layer on the high-k layer.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: May 1, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Gert Leusink
  • Patent number: 8138104
    Abstract: Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with alternative embodiments, a deposited silicon nitride film is exposed to curing with ultraviolet (UV) radiation at an elevated temperature, thereby helping remove hydrogen from the film and increasing film stress. In accordance with still other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: March 20, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor Nguyen, Li-Qun Xia, Derek R. Witty, Hichem M'Saad, Mei-Yee Shek, Isabelita Roflox
  • Patent number: 8129291
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: March 6, 2012
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu, Deakyun Jeong
  • Patent number: 8124484
    Abstract: To manufacture a MOS memory device having a dielectric film laminate in which adjacent dielectric films have band-gaps of different magnitudes, a plasma processing device which transmits microwaves to a chamber by means of a planar antenna having a plurality of holes is used to perform plasma CVD under pressure conditions that differ from at least pressure conditions used when forming the adjacent dielectric films, and the dielectric films are sequentially formed by altering the band-gaps of the adjacent dielectric films that constitute the dielectric film laminate.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: February 28, 2012
    Assignees: Tohoku University, Tokyo Electron Limited
    Inventors: Tetsuo Endoh, Masayuki Kohno, Syuichiro Otao, Minoru Honda, Toshio Nakanishi
  • Publication number: 20120045904
    Abstract: Embodiments of the disclosure generally provide methods of forming a hydrogen free silicon containing layer in TFT devices. The hydrogen free silicon containing layer may be used as a passivation layer, a gate dielectric layer, an etch stop layer, or other suitable layers in TFT devices, photodiodes, semiconductor diode, light-emitting diode (LED), or organic light-emitting diode (OLED), or other suitable display applications. In one embodiment, a method for forming a hydrogen free silicon containing layer in a thin film transistor includes supplying a gas mixture comprising a hydrogen free silicon containing gas and a reacting gas into a plasma enhanced chemical vapor deposition chamber, wherein the hydrogen free silicon containing gas is selected from a group consisting of SiF4, SiCl4, Si2Cl6, and forming a hydrogen free silicon containing layer on the substrate in the presence of the gas mixture.
    Type: Application
    Filed: August 20, 2011
    Publication date: February 23, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventor: Soo Young Choi
  • Patent number: 8119544
    Abstract: A film formation process is performed to form a silicon nitride film on a target substrate within a process field configured to be selectively supplied with a first process gas containing a silane family gas and a second process gas containing a nitriding gas. The method is preset to compose the film formation process of a main stage with an auxiliary stage set at one or both of beginning and ending of the film formation process. The main stage includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism. The auxiliary stage includes no excitation period of supplying the second process gas to the process field while exciting the second process gas by the exciting mechanism.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: February 21, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Nobutake Nodera, Eun-jo Lee
  • Patent number: 8119545
    Abstract: Provided is a plasma CVD device. In the plasma CVD device, in producing a silicon nitride film while controlling the size of a band gap by CVD, microwaves are introduced into a treatment vessel by a flat antenna having a plurality of holes. The plasma CVD is carried out under a given treatment pressure selected from a pressure range of not less than 0.1 Pa and not more than 1333 Pa at a flow ratio between a silicon-containing compound gas and a nitrogen gas (silicon-containing compound gas flow rate/nitrogen gas flow rate) selected from a range of not less than 0.005 and not more than 0.2, whereby the Si/N ratio in the film is controlled to form a silicon nitride film having a band gap size of not less than 2.5 eV and not more than 7 eV.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: February 21, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Minoru Honda, Toshio Nakanishi, Masayuki Kohno, Tatsuo Nishita, Junya Miyahara
  • Patent number: 8119540
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing an oxygen-containing or an oxygen- and nitrogen-containing gas excited by plasma induced dissociation based on microwave irradiation via a plane antenna member having a plurality of slots, wherein the plane antenna member faces the substrate surface containing the silicon nitride film. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: February 21, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Robert D Clark
  • Patent number: 8114790
    Abstract: A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave generation source through the slots into the process chamber; a gas supply mechanism configured to supply a film formation source gas into the process chamber; and an RF power supply configured to apply an RF power to the worktable. The apparatus is preset to turn a nitrogen-containing gas and a silicon-containing gas supplied in the process chamber into plasma by the microwaves, and to deposit a silicon nitride film on a surface of the target substrate by use of the plasma, while applying the RF power to the worktable.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: February 14, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi
  • Patent number: 8105959
    Abstract: A method for manufacturing a semiconductor device includes the steps of: forming a SiO2 layer on a silicon substrate; forming on the SiO2 layer an SiN film having a N/Si composition ratio smaller than the stoichiometric composition ratio of SiN by using the ALD technique; and performing a plasma-nitriding process on the SiN layer at a substrate temperature of 550 degrees C. or below.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: January 31, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Takuo Ohashi
  • Patent number: 8101531
    Abstract: Methods and hardware for depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method for forming a thin conformal film comprises, in a first phase, generating precursor radicals off of a surface of the substrate and adsorbing the precursor radicals to the surface to form surface active species; in a first purge phase, purging residual precursor from the process station; in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the surface active species and generate the thin conformal film; and in a second purge phase, purging residual reactant from the process station.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: January 24, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien LaVoie
  • Patent number: 8101476
    Abstract: A method for forming a tensile SiN stress layer for stress memorization enhancement of NMOS transistors with a high Si—H/N—H bond ratio that does not degrade PMOS transistors. A CMOS integrated circuit is processed through a NMOS source and drain implant but not through NMOS source and drain anneal. A SiN dielectric layer is deposited such that an area ratio of a Si—H peak to a N—H peak in a FTIR spectrum is greater than 7 and a tensile stress of the SiN dielectric is greater than 150 MPa. The CMOS integrated circuit is annealed after deposition of the SiN dielectric layer and the SiN dielectric layer is removed from at least a part of the integrated circuit.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: January 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Kanan Garg, Haowen Bu, Mahalingam Nandakumar, Song Zhao
  • Publication number: 20120009803
    Abstract: A dual channel gas distributor can simultaneously distribute plasma species of an first process gas and a non-plasma second process gas into a process zone of a substrate processing chamber. The gas distributor has a localized plasma box with a first inlet to receive a first process gas, and opposing top and bottom plates that are capable of being electrically biased relative to one another to define a localized plasma zone in which a plasma of the first process gas can be formed. The top plate has a plurality of spaced apart gas spreading holes to spread the first process gas across the localized plasma zone, and the bottom plate has a plurality of first outlets to distribute plasma species of the plasma of the first process gas into the process zone. A plasma isolated gas feed has a second inlet to receive the second process gas and a plurality of second outlets to pass the second process gas into the process zone.
    Type: Application
    Filed: August 17, 2011
    Publication date: January 12, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Kee Bum Jung, Dale R. Du Bois, Lun Tsuei, Lihua Li Huang, Martin Jay Seamons, Soovo Sen, Reza Arghavani, Michael Chiu Kwan
  • Patent number: 8080290
    Abstract: A film formation method is used for forming a silicon nitride film on a target substrate by repeating a plasma cycle and a non-plasma cycle a plurality of times, in a process field configured to be selectively supplied with a first process gas containing a silane family gas and a second process gas containing a nitriding gas and communicating with an exciting mechanism for exciting the second process gas to be supplied. The method includes obtaining a relation formula or relation table that represents relationship of a cycle mixture manner of the plasma cycle and the non-plasma cycle relative to a film quality factor of the silicon nitride film; determining a specific manner of the cycle mixture manner based on a target value of the film quality factor with reference to the relation formula or relation table; and arranging the film formation process in accordance with the specific manner.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: December 20, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Nobutake Nodera, Masanobu Matsunaga, Jun Satoh, Pao-Hwa Chou
  • Patent number: 8053338
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Publication number: 20110266609
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Application
    Filed: June 21, 2011
    Publication date: November 3, 2011
    Inventors: Sung Jin KIM, Alexander NICKEL, Minh-Van NGO, Hieu Trung PHAM, Masato TSUBOI, Sinich IMADA
  • Patent number: 8030220
    Abstract: A method for forming a dielectric layer is provided. The method may include providing a semiconductor surface and etching a thin layer of the semiconductor substrate to expose a surface of the semiconductor surface, wherein the exposed surface is hydrophobic. The method may further include treating the exposed surface of the semiconductor substrate with plasma to neutralize a hydrophobicity associated with the exposed surface, wherein the exposed surface is treated using plasma with a power in a range of 100 watts to 500 watts and for duration in a range of 1 to 60 seconds. The method may further include forming a metal-containing layer on a top surface of the plasma treated surface using an atomic layer deposition process.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: October 4, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Dina H. Triyoso, Olubunmi O. Adetutu
  • Patent number: 8030224
    Abstract: A method of manufacturing a semiconductor device including a semiconductor layer and a dielectric layer deposited on the semiconductor layer, including: forming the semiconductor layer; performing a surface treatment for removing a residual carbon compound, on a surface of the semiconductor layer formed; forming a dielectric film under a depositing condition corresponding to a surface state after the surface treatment, on at least a part of the surface of the semiconductor layer on which the surface treatment has been performed; and changing a crystalline state of at least a partial region of the semiconductor layer by performing a heat treatment on the semiconductor layer on which the dielectric film has been formed.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: October 4, 2011
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Hidehiro Taniguchi, Takeshi Namegaya, Etsuji Katayama
  • Patent number: 7989365
    Abstract: Methods of seasoning a remote plasma system are described. The methods include the steps of flowing a silicon-containing precursor into a remote plasma region to deposit a silicon containing film on an interior surface of the remote plasma system. The methods reduce reactions with the seasoned walls during deposition processes, resulting in improved deposition rate, improved deposition uniformity and reduced defectivity during subsequent deposition.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: August 2, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soonam Park, Soo Jeon, Toan Q. Tran, Jang-Gyoo Yang, Qiwei Liang, Dmitry Lubomirsky
  • Patent number: 7988875
    Abstract: A method and apparatus is provided for controlling the etch profile of a multilayer layer stack by depositing a first and second material layer with differential etch rates in the same or different processing chamber.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: August 2, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Gaku Furuta
  • Patent number: 7985188
    Abstract: Methods for processing a vessel, for example to provide a gas barrier or lubricity, are disclosed. First and second PECVD or other vessel processing stations or devices and a vessel holder comprising a vessel port are provided. An opening of the vessel can be seated on the vessel port. The interior surface of the seated vessel can be processed via the vessel port by the first and second processing stations or devices. Vessel barrier, lubricity and hydrophobic coatings and coated vessels, for example syringes and medical sample collection tubes are disclosed. A vessel processing system and vessel inspection apparatus and methods are also disclosed.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: July 26, 2011
    Assignee: CV Holdings LLC
    Inventors: John T. Felts, Thomas E. Fisk, Robert S. Abrams, John Ferguson, Johathan R. Freedman, Robert J. Pangborn, Peter J. Sagona
  • Patent number: 7985674
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: July 26, 2011
    Assignee: Spansion LLC
    Inventors: Sung Jin Kim, Alexander Nickel, Minh-Van Ngo, Hieu Trung Pham, Masato Tsuboi, Shinich Imada
  • Patent number: 7981814
    Abstract: A method for the duplication of microscopic patterns from a master to a substrate is disclosed, in which a replica of a topographic structure on a master is formed and transferred when needed onto a receiving substrate using one of a variety of printing or imprint techniques, and then dissolved. Additional processing steps can also be carried out using the replica before transfer, including the formation of nanostructures, microdevices, or portions thereof. These structures are then also transferred onto the substrate when the replica is transferred, and remain on the substrate when the replica is dissolved. This is a technique that can be applied as a complementary process or a replacement for various lithographic processing steps in the fabrication of integrated circuits and other microdevices.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: July 19, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventor: Charles Daniel Schaper
  • Patent number: 7972980
    Abstract: A method of forming a conformal dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced chemical vapor deposition (PECVD) includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space; and introducing a hydrogen-containing silicon precursor as a first precursor and a hydrocarbon gas as a second precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a conformal dielectric film doped with carbon and having Si—N bonds on the substrate.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: July 5, 2011
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Akira Shimizu
  • Patent number: 7972946
    Abstract: Provided are a plasma treatment method and a plasma treatment device capable of forming a silicon nitride film having high compressive stress. In the plasma treatment method for depositing the silicon nitride film on a process target substrate by use of plasma of raw material gas containing silicon and hydrogen and of nitrogen gas, ion energy for disconnecting nitrogen-hydrogen bonding representing a state of bonding between the hydrogen in the raw material gas and the nitrogen gas is applied to the process target substrate so as to reduce an amount of nitrogen-hydrogen bonding contained in the silicon nitride film.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: July 5, 2011
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Tadashi Shimazu, Masahiko Inoue, Toshihiko Nishimori, Yuichi Kawano
  • Publication number: 20110151679
    Abstract: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times a cycle alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing or nitriding the adsorption layer on the surface of the target substrate. The second step includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism.
    Type: Application
    Filed: March 4, 2011
    Publication date: June 23, 2011
    Applicant: Tokyo Electron Limited
    Inventors: Kazuhide HASEBE, Shigeru Nakajima, Jun Ogawa
  • Patent number: 7960293
    Abstract: A method for forming an insulating film includes forming a silicon nitride film on a silicon surface by subjecting a target substrate wherein silicon is exposed in the surface to a treatment for nitriding the silicon, forming a silicon oxynitride film by heating the target substrate provided with the silicon nitride film in an N2O atmosphere, and nitriding the silicon oxynitride film.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: June 14, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Minoru Honda, Yoshihiro Sato, Toshio Nakanishi
  • Patent number: 7960294
    Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: June 14, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Francimar Campana Schmitt, Li-Qun Xia, Son Van Nguyen, Shankar Venkataraman
  • Publication number: 20110086516
    Abstract: A method of forming dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a hydrogen-containing silicon precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the silicon precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 14, 2011
    Applicant: ASM JAPAN K.K.
    Inventors: Woo Jin Lee, Kuo-wei Hong, Akira Shimizu, Deakyun Jeong
  • Publication number: 20110086517
    Abstract: Disclosed is a plasma CVD device. In the plasma CVD device, in producing a silicon nitride film while controlling the size of a band gap by CVD, microwaves are introduced into a treatment vessel by a flat antenna having a plurality of holes. The plasma CVD is carried out under a given treatment pressure selected from a pressure range of not less than 0.1 Pa and not more than 1333 Pa at a flow ratio between a silicon-containing compound gas and a nitrogen gas (silicon-containing compound gas flow rate/nitrogen gas flow rate) selected from a range of not less than 0.005 and not more than 0.2, whereby the Si/N ratio in the film is controlled to form a silicon nitride film having a band gap size of not less than 2.5 eV and not more than 7 eV.
    Type: Application
    Filed: March 30, 2009
    Publication date: April 14, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Minoru Honda, Toshio Nakanishi, Masayuki Kohno, Tatsuo Nishita, Junya Miyahara
  • Patent number: 7919416
    Abstract: A method of forming a conformal dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced chemical vapor deposition (PECVD) includes: introducing a nitrogen- and hydrogen-containing reactive gas and an additive gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space; and introducing a hydrogen-containing silicon precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a conformal dielectric film having Si—N bonds on the substrate.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: April 5, 2011
    Assignee: ASM Japan K.K.
    Inventors: Woo-Jin Lee, Akira Shimizu, Atsuki Fukazawa
  • Patent number: 7910474
    Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: March 22, 2011
    Assignees: NEC Corporation, Renesas Electronics Corporation
    Inventors: Tatsuya Usami, Noboru Morita, Koichi Ohto, Kazuhiko Endo
  • Patent number: 7884035
    Abstract: We have discovered that adding H2 to a precursor gas composition including SiH4, NH3, and N2 is effective at improving the wet etch rate and the wet etch rate uniformity across the substrate surface of a-SiNx:H films which are deposited on a substrate by PECVD. Wet etch rate is an indication of film density. Typically, the lower the wet etch rate, the denser the film. The addition of H2 to the SiH4/NH3/N2 precursor gas composition did not significantly increase the variation in deposited film thickness across the surface of the substrate. The uniformity of the film across the substrate enables the production of flat panel displays having surface areas of 25,000 cm2 and larger.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: February 8, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Beom Soo Park, Soo Young Choi, Tae Kyung Won, John M. White
  • Publication number: 20110027989
    Abstract: A silicon-based low-k dielectric material is formed on the basis of a single precursor material, such as OMTCS, without incorporating a porogen species. To this end, the initial deposition of the low-k dielectric material may be formed on the basis of a reduced process temperature, while a subsequent treatment, such as a UV treatment, may allow the adjustment of the final material characteristics without causing undue out-gassing of volatile organic components.
    Type: Application
    Filed: July 23, 2010
    Publication date: February 3, 2011
    Inventors: Ulrich MAYER, Hartmut RUELKE, Christof STRECK
  • Publication number: 20110014795
    Abstract: A method of forming stress-tuned dielectric films having Si—N bonds on a semiconductor substrate by modified plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen-and hydrogen-containing reactive gas and an additive gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space using a high frequency RF power source and a low frequency RF power source; and introducing a hydrogen-containing silicon precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a stress-tuned dielectric film having Si—N bonds on the substrate.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 20, 2011
    Applicant: ASM JAPAN K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu
  • Patent number: 7867920
    Abstract: There is provided a method for modifying a high-k dielectric thin film provided on the surface of an object using a metal organic compound material. The method includes a preparation process for providing the object with the high-k dielectric thin film formed on the surface thereof, and a modification process for applying UV rays to the highly dielectric thin film in an inert gas atmosphere while maintaining the object at a predetermined temperature to modify the high-k dielectric thin film. According to the above constitution, the carbon component can be eliminated from the high-k dielectric thin film, and the whole material can be thermally shrunk to improve the density, whereby the occurrence of defects can be prevented and the film density can be improved to enhance the specific permittivity and thus to provide a high level of electric properties.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: January 11, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kazuyoshi Yamazaki, Shintaro Aoyama, Koji Akiyama
  • Patent number: 7867918
    Abstract: A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon dioxide layer. In addition, a method is provided which includes growing an oxide film upon a semiconductor topography in the presence of an ozonated substance and depositing a silicon nitride film upon the oxide film. In some embodiments, the method may include growing the oxide film in a first chamber at a first temperature and transferring the semiconductor topography from the first chamber to a second chamber while the semiconductor topography is exposed to a substantially similar temperature as the first temperature. In either embodiment, the method may be used to form a semiconductor device including an oxide-nitride gate dielectric having an electrical equivalent oxide gate dieletric thickness of less than approximately 20 angstroms.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: January 11, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Krishnaswamy Ramkumar
  • Patent number: 7838444
    Abstract: A fabrication method of a semiconductor device includes forming a silicon nitride layer on a compound semiconductor layer with a plasma CVD method and selectively treating the compound semiconductor layer with use of the silicon nitride layer for a mask. The silicon nitride layer has a refraction index of less than 1.85. The compound semiconductor layer includes Ga.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: November 23, 2010
    Assignee: Eudyna Devices Inc.
    Inventor: Hiroyuki Oguri
  • Patent number: 7820558
    Abstract: A film with small hysteresis and high voltage resistance is obtained by reducing the carbon content in a gate insulating film on a SiC substrate. Specifically, the carbon content in the gate insulating film is set to 1×1020 atoms/cm3 or less. For this, using a plasma processing apparatus, a silicon oxide film is formed on the SiC substrate and then the formed silicon oxide film is reformed by exposure to radicals containing nitrogen atoms. Thus, the gate insulating film excellent in electrical properties is obtained.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: October 26, 2010
    Assignees: Tohoku University, Foundation for Advancement of International Science
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Koutaro Tanaka