Connected By Transversely Inserted Pin Patents (Class 439/75)
  • Patent number: 5971280
    Abstract: The card reading device has a contact carrier part and a card carrier part. The card carrier part receives a card to be read in a card receiving portion and the card carrier part can be inserted together with the card at least partially into or onto the contact carrier part. The card carrier part of the novel card reading device has a partial ejection mechanism with at least one lever. The lever is formed and disposed such that a swivel of the lever translates into an interaction between the lever and a supporting point lying outside the card carrier part. As a consequence of the interaction, the card receiving portion is at least partially drawn out or ejected from the contact carrier part.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: October 26, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Albert Hoolhorst
  • Patent number: 5920461
    Abstract: The present invention relates to a method and apparatus for manufacturing a surface mount power supply device having effective thermal management. The surface mount power supply device comprises a printed circuit board mounted to a thermal plastic lead frame attach by means of vertically-extending aluminum pins embedded in the lead frame attach. A cylindrical member is centered within the lead frame attach by means of inwardly protruding arms transversely connected to the lead frame attach to allow for a pick-and-place operation.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: July 6, 1999
    Assignee: Lambda Electronics, Inc.
    Inventor: Peter T. Brune
  • Patent number: 5825630
    Abstract: A computer baseboard providing localized support for high pin count, high density components. The baseboard includes a first circuit board capable of supporting low pin count electrical components. The first circuit board has a surface onto which the low pin count electrical components are mounted, and an area to which a second, smaller, circuit board is connected in a parallel arrangement with the first circuit board. The second circuit board has a first surface onto which high pin count electrical components are mounted, and a second surface physically and electrically connected to the area on said first substrate. The first and second circuit boards together provide support for electrical components having higher pin counts and densities than the first circuit board can support individually, such as high performance microprocessors and chipsets.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: October 20, 1998
    Assignee: NCR Corporation
    Inventors: Billy K. Taylor, Richard I. Mellitz
  • Patent number: 5790651
    Abstract: Automatic distribution equipment for connecting and disconnecting lines includes a frame body, a plurality of matrix-switch-board units arranged in the frame body in a stack formation, and a robot provided in a side of the frame body. Each of the matrix-switch-board units has two wiring-pattern arrays which are respectively formed in opposite sides of each of the units so as to be electrically isolated from each other and to cross each other, wherein when a connection pin is inserted into one of through holes formed at cross points of the two wiring-pattern arrays, respective wiring patterns of the two wiring-pattern arrays are connected to each other. The robot moves between two of the matrix-switch-board units, and inserts-and-extracts the connection pin into-and-from a designated through hole to connect-and-disconnect designated lines.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: August 4, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Suzuki, Naoto Kaneko, Eiichi Kakihara, Koichi Shimamura, Yasunori Hachiyama, Hirofumi Oosawa, Hitoshi Isobe
  • Patent number: 5781415
    Abstract: A semiconductor package is described which is constructed from a rectangular tape film, a wiring pattern formed on the tape film constituted by wiring composed of a conductive material, a semiconductor chip electrically connected to one end of the wiring pattern, and holes formed on the other end of the wiring pattern for connection by insertion of lead-pins. A method is then described for stacking and mounting a plurality of semiconductor packages on a wiring substrate by first vertically positioning lead-pins on a wiring substrate and then passing these lead-pins through the holes in the semiconductor packages.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: July 14, 1998
    Assignee: NEC Corporation
    Inventor: Nobuyuki Itoh
  • Patent number: 5761050
    Abstract: A press-fit or compliant section or deformable pin electrical connector. The connector is designed to be inserted into several plated through holes in printed circuit boards. Specifically, the pin connector can electrically and mechanically connect two or more printed circuit boards (PCBs). Uniquely, it is possible to have a single pin that is both electrically and mechanically connected to two PCBs and have the pin extending through a plated through hole of a third PCB without establishing any electrical or mechanical contact with the third PCB. Additionally, the pin has at least two compliant sections for press fitting into a plated through-hole in a PCB or the like. Each compliant section has a different size diameter. Specifically, the top compliant section is the smallest, the bottom compliant section is the largest in diameter, and the remaining compliant sections will gradually increase in size as they are located from the tip to the base of the pin.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: June 2, 1998
    Assignee: CTS Corporation
    Inventor: Ian Archer
  • Patent number: 5754796
    Abstract: A bus port transmission device for signal transmission between the first extension card and the mother board of a computer system, the device including at least one coupling device, each of the at least one coupling device including a first connector at one end connected to the contact for exclusive signal of one bus interface slot of the first extension card, a second connector connected to the exclusive signal of the corresponding extension slot of the mother board, wherein the signals of the extension slots of the mother board can be transmitted through the at least one coupling device to the interface slots of the first extension card, enabling the interface slots of the first extension card to provide the respective exclusive signals.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: May 19, 1998
    Inventors: Daniel Wang, David Yow
  • Patent number: 5743004
    Abstract: A multi-layer printed circuit board or card including at least one passage in at least one of the layers of the circuit board or card for preventing the diffusion of heat throughout the circuit board or card during the securing or removal of components in plated through holes in the circuit board or card by the heating of the plating material to a temperature above a melting point of the plating material.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: April 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Ivan Ivor Chobot, John Arthur Covert, Randy Lee Haight, Keith David Mansfield, Donald Wayne Miller, Reinaldo Anthony Neira, Alexander Petrovich, Paul Camilo Sviedrys, Louise Ann Tiemann, Gerald Arthur Valenta, Thurston Bryce Youngs, Jr.
  • Patent number: 5715595
    Abstract: An electrical connection pin blank having at least one compliant section is affixed to a first circuit board by compressive deformation in such a way that the compliant section of the pin blank projects outwardly from the surface of the first circuit board. The end of the pin projecting from the first circuit board is then inserted into a corresponding opening in a second circuit board and the two boards brought together until the second circuit board is firmly affixed to the complaint section of the pin by compliant pin connection.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: February 10, 1998
    Assignee: International Business Machines Corporation
    Inventors: Stephen Joseph Kman, John Arthur Stubecki, William Richard Sondej
  • Patent number: 5712768
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: January 27, 1998
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5691041
    Abstract: A socket for attaching a flip chip die or ball grid array devices to a printed circuit board substrate having a pattern of solder covered lands, with resources for removing the flip chip die or ball grid array device, resources for directly aligning the solder balls of the flip chip die or ball grid array device to the printed circuit board, resources for using an interposer of dendrite coated vias or pads to electrically and physically connect the solder balls of the flip chip die or ball grid array devices to the solder deposits of the printed circuit board, resources for having the interposer reconfigure the wiring for testing or replacement purposes, resources for utilizing the flexibility and resilience of the interposer to improve dendrite connections, and resources for heat sinking the flip chip die or ball grid array device by direct thermal contact.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: November 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Richard Francis Frankeny, Jerome Albert Frankeny, Danny Edward Massey, Keith Allan Vanderlee
  • Patent number: 5667389
    Abstract: A modular buss center for an automotive vehicle is provided including a first plug connector; an intermediate terminal having a first male end and a second female end and at least one arm, the first end being electrically connected to the first plug connector; a first template with a hole for receipt of the intermediate terminal; at least one flex circuit, the flex circuit having at least one cut-out flag, the flag making contact with the intermediate terminal arm; a second template separated from the first template by the flex circuit, the second template having a hole for receipt of the intermediate terminal second end; and an electrical component positioned on the second template opposite the flex circuit, the electrical component being electrically connected to the intermediate terminal second end.
    Type: Grant
    Filed: October 16, 1995
    Date of Patent: September 16, 1997
    Assignee: General Motors Corporation
    Inventors: Richard Louis Kidd, Daniel Griffith Mathey, Paul Di Liello, David Glen Siegfried, Robert William Rimko, Anthony Joseph Corso
  • Patent number: 5618129
    Abstract: An apparatus configured to facilitate mounting a first device to a second device where the first device has a plurality of first apertures and the second device has a plurality of second apertures. The apparatus includes a base member and a plurality of post members affixed to the base member at a plurality of attachment loci. Each post member is substantially in register with a first aperture and with a second aperture when the first device, the second device, and the apparatus are in a mounting orientation. Each post member includes a tab member and a mounting aperture which traverses the post member. For each post member and for each first aperture, the tab member is configured to flex from an initial position to pass through the first aperture when the post member is urged into the first aperture. The tab member returns to the initial position when the post member passes a predetermined distance into the first aperture to captively retain the first device intermediate the tab member and the base member.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: April 8, 1997
    Assignee: Paragon Electric Company, Inc.
    Inventor: Edwin L. Skarivoda
  • Patent number: 5613033
    Abstract: An interconnect system is provided in which one or more laminated modules embodying electrical devices can be stacked in a three dimensional configuration upon a printed circuit board. One or more electrical devices is surface mounted to a recessed area at the upper surface of each laminated module, and each laminated module includes male pins and female sockets. The male pins can be releasibly engaged within sockets upon a printed circuit board. Additionally, the male pins of one laminated module can be engaged within female sockets of another laminated module in building-block fashion. Conductive paths are formed entirely through the laminated module between respective sockets and pins. The conductive paths are arranged in a less dense fashion than bond locations adjacent each electrical device. The bond locations are therefore offset from conductive paths to provide fan-out and redistribution features.
    Type: Grant
    Filed: January 18, 1995
    Date of Patent: March 18, 1997
    Assignee: Dell USA, LP
    Inventors: N. Deepak Swamy, Tom J. Kocis
  • Patent number: 5599595
    Abstract: A conductive component for carrying electrical signals constructed from a molded polymer substrate and a conductive coating adhered to the substrate, the coating defining a continuous electrical pathway between at least two terminals. Preferably, molded plastic such as liquid crystal polymer is formed to make circuits having conductive ink adhered thereto in order to provide inexpensive and versatile printed circuit boards for carrying electrical traces and other components and to provide printed formed contacts. The conductive solderable inks can be adhered to the substrate, for example, via screen printing, brush, spraying, dipping, masking, vacuum plating or vacuum deposition with subsequent oven drying, reflowing in a vapor phase, post curing or plating.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: February 4, 1997
    Assignee: Methode Electronics, Inc.
    Inventors: William J. McGinley, John R. Cannon, William J. Green, Richard P. Zanardo
  • Patent number: 5567167
    Abstract: A new printed wiring board connection apparatus is provided. The apparatus comprises a spacer made of synthetic resin insulation material with pin support spaces bored within it, connection pins of elastic wire each having at least one bent portion with an end thereof being bent outwardly are inserted into the pin support spaces of the spacer such that they are resiliently secured therewithin with the aid of pin engagement holes formed in the pin support spaces which receive the bent ends of the connection pins while the bent portions and opposite ends thereto of the connection pins protrude from the spacer. The aforesaid apparatus is used to connect two printed wiring boards in such a way that protruding portions of the connection pins are inserted into throughholes of the printed wiring boards.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: October 22, 1996
    Assignee: Mac Eight Co., Ltd.
    Inventor: Akihiko Hayashi
  • Patent number: 5566347
    Abstract: A multiple interface driver circuit for transmitting data in a channel according to one of several different signal protocols. In the exemplary embodiment, two separate bus driver circuits are connected to a common output terminal and may be selected under software control. When one such driver is selected, the other remains in an inactive state, presenting a high output impedance to the driver signal from the other. In an alternative embodiment, one interface driver circuit is connected to the output terminal and the driver circuit output signal is either left unchanged or modified under software control by a second pullup driver circuit. The unconditioned output signal conforms to a first interface protocol. After conditioning by the second pullup driver circuit, the output signal conforms to a second interface protocol.
    Type: Grant
    Filed: September 24, 1992
    Date of Patent: October 15, 1996
    Assignee: Conner Peripherals, Inc.
    Inventor: Edward H. Patrick
  • Patent number: 5565654
    Abstract: The invention is directed to a printed circuit board arrangement for plug-type connections composed of a blade connector and spring clip, whereby the individual contact passages are surrounded by electrically conductive shield plates that are connected to contactings carrying shield potential that are attached both at the backplane side as well as at the assembly side, and whereby both the contact blades and contact springs as well as the contactings are contacted and secured with press-in technique in the printed circuit boards fashioned as multi-layer multilayers. In order to create an adequate interconnect lead-through width between the contactings, the shield potential in the printed circuit board arrangement of the invention is conducted in a separate shield printed circuit board (3) that is electrically separated from the multilayer (1) by an insulating foil (2).
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: October 15, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karl Zell, Juergen Seibold, Peter Seidel
  • Patent number: 5563400
    Abstract: A multi-applications portable card that can be plugged in notably into a reader of a personal computer comprises a first connector designed for a connection with the reader and positioned on the periphery of a pack. The portable card comprises, firstly, a mobile rack positioned on an edge of the card that gets fitted into a cavity of the pack, the mobile rack further including a housing provided with a bottom and designed to receive a chip borne by a token and, secondly, a second connector electronically linked to the first connector. The disclosed device can be applied in particular to PCMCIA cards.
    Type: Grant
    Filed: October 12, 1994
    Date of Patent: October 8, 1996
    Assignee: Gemplus Card International
    Inventor: Jean-Yves Le Roux
  • Patent number: 5548486
    Abstract: An electrical connection pin blank having at least one compliant section is affixed to a first circuit board by compressive deformation in such a way that the compliant section of the pin blank projects outwardly from the surface of the first circuit board. The end of the pin projecting from the first circuit board is then inserted into a corresponding opening in a second circuit board and the two boards brought together until the second circuit board is firmly affixed to the complaint section of the pin by compliant pin connection.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: August 20, 1996
    Assignee: International Business Machines Corporation
    Inventors: Stephen J. Kman, John A. Stubecki, William R. Sondej
  • Patent number: 5536177
    Abstract: An assembly (10) of circuit boards (12,14,16) stacked in a parallel array, having first connectors (40) about the periphery of first circuit boards (12,16) and second connectors (90) about the periphery of second circuit board (14) defining aligned connector stacks. Contacts (52) of the first connectors (40) include socket contact sections (56) along mating faces (48) and post sections (58) extending through board through-holes to ends matable with the socket contact sections of the connector adjacent thereto in the stack and are joined as desired to associated traces of the first circuit board through which they extend. Contacts (104) of second connectors (90) terminate within the connector housing and include post sections (106) extending similarly through second circuit board (14) to mate with contacts (52) of an adjacent first connector (40).
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: July 16, 1996
    Assignee: The Whitaker Corporation
    Inventor: Daniel T. Casey
  • Patent number: 5537295
    Abstract: A universal reconfigurable printed circuit board that provides multiple sockets that can receive field reprogrammable logic devices, hard-wired interconnection circuits, or field reprogrammable interconnection devices interchangeably. Optimized interconnection topologies provide a large number of options for a variety of applications. A versatile interface circuit is used to interface with a personal computer bus during board configuration, and then can be reconfigured to perform application-specific functions.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: July 16, 1996
    Assignee: Altera Corporation
    Inventors: David E. Van Den Bout, Harry L. Tredennick
  • Patent number: 5515241
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 7, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5513076
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 30, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5481436
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed. The interconnect board can have layers assigned to specific voltages, in a power-translation design.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: January 2, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5481435
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: January 2, 1996
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5479319
    Abstract: Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: December 26, 1995
    Assignee: Interconnect Systems, Inc.
    Inventor: William E. Werther
  • Patent number: 5470245
    Abstract: In a connector for use in connection between a pair of connection objects opposite to each other, each having a number of contact holes arranged in rows and columns in a contact matrix, a plurality of flat and elastic multi-contact members are used for connecting contacts in the contact holes of one connection object with contacts in the contact holes of the other connection object. Each of the multi-contact members comprises a flexible and flat insulator sheet and conductive layers formed on opposite surfaces of the sheet. At least one of the conductive layers are separated into a plurality of conductive strips corresponding to contact holes in one row of the contact matrix. The conductive strips are fitted into contact holes in the corresponding row of contact matrix at opposite ends of each of the multi-contact members.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: November 28, 1995
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventor: Yoshiaki Ichimura
  • Patent number: 5462442
    Abstract: In a connector having a plurality of first contact groups arranged in a predetermined pattern, conductors whose one ends are connected to the first contact groups, and a plurality of second contact groups arranged in a pattern corresponding to the pattern of the first contact groups, the conductors for connecting the first contact groups and the second contact groups cause portions of the first contact groups to be connected to the second contact groups at different positions within the above-described pattern. Accordingly, even when the contacts of the same sort of signal lines having one-to-one correspondence are allocated to the contact conductors located at the same positions within the boards for constituting the respective modules, the one-to-one correspondence can be maintained, and thus the printed-circuit boards of the modules can be commonly utilized.
    Type: Grant
    Filed: February 17, 1994
    Date of Patent: October 31, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masaya Umemura, Toshihiko Ogura, Hideki Osaka, Masatsugu Shinozaki
  • Patent number: 5460531
    Abstract: An interconnect structure is provided for converting or adapting select signals sent between a printed circuit board (PCB) and an electrical component. The interconnect structure comprises an adapter card placed between the PCB and the electrical component, wherein the adapter card includes one or more pass-through vias and non pass-through vias extending completely through the adapter card in parallel spaced relation to one another. Pass-through vias are used to couple signals having critical timing paths between the electrical component and the PCB without substantially modifying or changing the critical path switch points. The pass-through vias also provide connection of signals of non critical timing between the PCB and the component. A signal converter may be used to convert non-critical signals and place those signals at select pins upon the electrical component.
    Type: Grant
    Filed: January 27, 1994
    Date of Patent: October 24, 1995
    Assignee: Dell USA, L.P.
    Inventor: Joseph A. Vivio
  • Patent number: 5445526
    Abstract: A multiple-pin terminal adapter comprising a substrate and a multiplicity of electrical contact pins extending from above and below the substrate for connection with printed circuit boards. A first group of contact pins extend downwardly for connection with the underlying printed circuit board, while a second group of contact pins extend upwardly out of axial alignment with the first group to assume a generally meander or otherwise random formation whereby adjacent contact pins in the second group are spaced a sufficient distance apart from one another to facilitate access for solder connection. A relay socket means is also provided for use in combination with the terminal adapter to provide easy access for connection to printed circuit boards packed with high density electrical components.
    Type: Grant
    Filed: February 17, 1994
    Date of Patent: August 29, 1995
    Assignees: JC Electronics Corporation, Toshiba Chemical Corporation
    Inventors: Masayoshi Hoshino, Masakazu Yayoshi
  • Patent number: 5415559
    Abstract: In a connector for connecting a pair of connection objects (60) having electroconductive inner surfaces or sockets (63). A long pin contact (10) is made of an electroconductive elastic material. Opposite ends of the pin contact are brought into a press contact with the inner surfaces or sockets (63), with a resulting elastic deformation of a longitudinal intermediate portion of the pin contact. The connection objects are opposite to each other in a first direction (Y) and have a relative position changeable between a first and a second position in a second direction (X) which is perpendicular to the first direction. Before the connection is carried out, the opposite ends of the pin are inserted into opposed spaces, respectively. The opposite ends are loosely fitted in the spaces when the relative position is the first position.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: May 16, 1995
    Assignee: Japan Aviation Electronics Industry, Ltd.
    Inventor: Yoshiaki Ichimura
  • Patent number: 5411400
    Abstract: A plurality of inserts (12) formed on a first substrate (11). A plurality of sockets (14) formed on a second substrate (13). Each socket of the plurality of sockets (14) on the second substrate (13) has a corresponding insert from the plurality of inserts (12) which physically aligns for coupling. At least one of the first (11) or second (13) substrates must be a semiconductor substrate. This arrangement allows for electrically connecting a semiconductor device or structure to another device for testing, burn-in, or final assembly.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: May 2, 1995
    Assignee: Motorola, Inc.
    Inventors: Ravichandran Subrahmanyan, Ravinder K. Sharma, William H. Lytle, Barry C. Johnson
  • Patent number: 5410452
    Abstract: An adaptor pin for connection to a printed circuit board includes an elongated electrically conductive pin having an enlarged portion adjacent one end for forming a mechanical interference fit with a hole partially drilled through the circuit board. The pin has an enlarged cross-sectional solder portion intermediate the enlarged portion and the opposite end of the pin so as to limit the extent of penetration of the pin into the hole of the circuit board. The enlarged portion of each pin is electrically connected by soldering to a circuit path on the circuit board. By this arrangement, a rigid mechanical connection between the pin and the circuit board is effected, and thus subsequent reheating of the board for connecting a surface mounted chip to the opposite side of the board will not interfere with the electrical and mechanical connection between the adaptor pin and the circuit board.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: April 25, 1995
    Assignee: Aries Electronics, Inc.
    Inventors: William Y. Sinclair, James P. Walter
  • Patent number: 5400222
    Abstract: An extensible bus assembly provides very short, uniform stub lengths from a bus transceiver to the bus assembly. The extensible bus assembly includes a bus termination cap, a plurality of extenders and an anchor. Each bus assembly element is L-shaped so that the bus transceiver, or some similar bus driver, may be positioned in close proximity to the bus assembly by placing the bus transceiver in the "corner" of the L; this ensures short, uniform stub lengths. Conductive surfaces are vertically positioned within the termination cap and plurality of extenders. The conductive surfaces may be compliant pins and/or spring-loaded wire conductors.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: March 21, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Stephen P. Nelsen, Samuel M. Babb
  • Patent number: 5398165
    Abstract: To prevent the lead terminals of an electronic circuit component from being bent due to the vibration of the component after being mounted on a circuit board, each lead terminal has a tapered portion formed between an inserted tip portion and a cut dumb bar portion and having a width which decreases from the dumb bar portion toward the tip portion to prevent stresses from concentrating in the terminal.
    Type: Grant
    Filed: May 3, 1993
    Date of Patent: March 14, 1995
    Assignee: Rohm Co., Ltd.
    Inventor: Koichi Niinou
  • Patent number: 5390081
    Abstract: Fault-tolerant power distribution system for back-mounted hardware in which a backplane arrangement delivers alternative sources of system power in a prioritized pattern to each of a plurality of fault-tolerant electronic cards via a plurality of system slots, each slot including a power port having electrical contacts in a common system pinout, and the cooperating system cards have electrical contacts in the same common system pinout. Any of the system cards can be installed in any system slot and will receive the system power in one of a plurality of fault-tolerant prioritizations.
    Type: Grant
    Filed: March 22, 1993
    Date of Patent: February 14, 1995
    Assignee: Stratus Computer, Inc.
    Inventor: Keith St. Pierre
  • Patent number: 5381496
    Abstract: A connector assembly for interconnecting optical and/or electrical conductors comprises a first connector part with a first guiding plate with one or more guiding channels for first conductors and a second connector part to be coupled with the first connector part and having a second guiding plate with one or more guiding channels provided in a corresponding manner for second conductors to be connected with the first conductors. The guiding plates comprise positioning means for mutually positioning the guiding plates in the coupled position of the connector parts, said positioning means comprising a first lug and a first slot with cooperating straight reference surfaces extending in x-direction and a second lug and second slot with cooperating straight reference surfaces extending in y-direction. All said reference surfaces are located at a predetermined location with respect to the guiding channels.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: January 10, 1995
    Assignee: Framatome Connectors International
    Inventors: Danny L. Morlion, Luc O. Jonckheere
  • Patent number: 5373110
    Abstract: When an external connection I/O pin which is formed on a multilayer ceramic circuit board is broken off together with a part of a ceramic substrate, an electrically conductive adhesive is filled in the area where the I/O pin broke and was removed, and together with standing a new pin in this place and connecting it electrically, the new pin is bridged and secured to the surrounding I/O pins using a fixation plate. In so doing, it is possible to restore the broken I/O pin to have the same electrical and mechanical characteristics as before.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: December 13, 1994
    Assignee: NEC Corporation
    Inventor: Jun Inasaka
  • Patent number: 5340319
    Abstract: Disclosed is an improvement in an electric connector for connecting two spaced apart parallel printed circuit boards having a plurality of needle-like pin terminals arranged laterally at regular intervals between its upper and lower wafers, the upper and lower extensions of the needle-like pin terminals extend beyond the upper and lower wafers being connected to selected conductors on upper and lower printed circuit boards. According to the present invention the needle-like pin terminals freely pass through the longitudinal pin-receiving openings made in the upper and lower wafers, and metal tie rods are press-fit in opposite longitudinal rod-insertion apertures made at the opposite ends of the upper and lower wafers, and are detachably fixed thereto, thereby constituting a rigid integrity.
    Type: Grant
    Filed: August 2, 1993
    Date of Patent: August 23, 1994
    Assignee: Molex Incorporated
    Inventors: Masahiro Enomoto, Minoru Fukushima
  • Patent number: 5334030
    Abstract: An extender card for extending a PCMCIA bus, to permit development of a PCMCIA board on a host notebook computer which also may be the intended target notebook computer on which the PCMCIA board will be used. The extender card includes a PCMCIA header, a PCMCIA receptacle, and a plurality of wirewrap pins, all coupled by a plurality of conductors. A ground plane and a plurality of ground conductors provide noise immunity. A power plane provides good conductivity for VCC. The extender card is sized and shaped to be inserted into the notebook computer through a conventional access opening into a PCMCIA receptacle within the notebook computer, and to extend out that opening to permit easy access. A PCMCIA board under development may be coupled to the extended PCMCIA bus lines via the extender card's wirewrap pins or its PCMCIA receptacle.
    Type: Grant
    Filed: July 28, 1993
    Date of Patent: August 2, 1994
    Assignee: National Semiconductor Corporation
    Inventor: Al W. Brilliott
  • Patent number: 5329428
    Abstract: Packaging for an electronics assembly. A base card has a row of elongated slots. A number of individually insertable subassemblies have standoff feet and a pair of offset hooks at their sides. The hooks snap into the slots in such a way that each slot can hold the hooks for four different subassemblies, which are positioned adjacent each other and on both sides of the base card.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: July 12, 1994
    Assignee: International Business Machines Corporation
    Inventors: Timothy R. Block, David P. Gaio, Ronald L. Soderstrom
  • Patent number: 5321884
    Abstract: An electronic package which includes a rigid first substrate (e.g., ceramic) having a plurality of conductive pins spacedly located therein. These pins each include one end portion extending below an undersurface of the substrate for positioning and electrically coupling within a second substrate (e.g., printed circuit board), while also including an opposite end portion which projects from an opposite, upper surface of the first substrate. These upwardly projecting end portions are designed for accommodating, in stacked orientation, a plurality of thin film, flexible circuitized substrates thereon, each of these substrates being electrically coupled to a respective pin, if desired, using a solder composition.
    Type: Grant
    Filed: May 20, 1993
    Date of Patent: June 21, 1994
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Ameen, Joseph Funari, David W. Sissenstein, Jr.
  • Patent number: 5302923
    Abstract: An interconnection plate apparatus provides high frequency signal paths for communication among multiple pc boards and/or high frequency system components. The apparatus includes an interconnection plate which is a conductor having cross-sectional channels at which transmission line structures are formed. The transmission line structure includes a through-plate conductor concentrically surrounded by a through-plate insulator concentrically surrounded by the channel walls. An RF ground ring is positioned between the interconnection plate and a pc board at the transmission line structure. The interconnection plate provides a common ground reference and a common ground path for each board mounted to the interconnection plate. The ground ring structures assure a stable ground connection between the interconnection plate and the pc board ground planes. Different transmission line structures implement different signal transformation functions. The transmission line structure may simply pass the signal.
    Type: Grant
    Filed: July 16, 1992
    Date of Patent: April 12, 1994
    Assignee: Hewlett-Packard Company
    Inventors: Roy L. Mason, Paul A. Richer, James K. Pietsch
  • Patent number: 5290970
    Abstract: An improved rework method and rework pin for repairing and reworking multilayer printed circuit boards are described. The rework pin is constructed of conductive material having a configuration that accommodates the configuration of through holes in a multilayer printed circuit board assembly. The rework pin includes a cup-like structure at one end for cooperating with component leads, an elongated electrically insulated portion and an electrically conductive tip portion extending beyond the thickness of the multilayer board.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: March 1, 1994
    Assignee: Unisys Corporation
    Inventor: Thomas P. Currie
  • Patent number: 5277595
    Abstract: In a system including a motherboard and a daughterboard a receptacle is disposed in an insulated housing mounted on the motherboard while a pin is disposed on the daughterboard. The receptacle comprises a socket and an integral threaded shank, the socket portion having an enlarged collar with an abutment surface thereon. The receptacle has a central and axial passage. The collar is larger than the dimension of an opening extending through the motherboard while the shank is sized to pass therethrough and to present the threads to the second surface thereof. A threaded nut engages with the threads on the shank accessible from the second surface of the motherboard. When the nut is threaded onto the shank the receptacle is held mechanically to the motherboard and into electrical connection with a conductive path thereon.
    Type: Grant
    Filed: June 29, 1992
    Date of Patent: January 11, 1994
    Assignee: E. I. Du Pont de Nemours and Company
    Inventor: Stephen L. Clark
  • Patent number: 5268819
    Abstract: A printed circuit board upon which are mounted a number of electronic components is provided with a connector strip for electrically coupling the components to respective components on a second circuit board located underneath. The strip comprises a body portion and pins projecting thereform. The pins have a stepwise configuration with a first end portion extending through apertures in the upper circuit board and connected to a second connector strip on the second circuit board, a second end portion extending through the body portion, and a middle portion which abuts the surface of the upper circuit board and by which the strip is connected to the upper circuit board by means of a solder joint. Components on the upper circuit board are electrically coupled by means of tracks which are connected to the components at one end by a solder joint and at the other end by a solder joint, via pins, to the second connector strip and tracks on the lower circuit board.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: December 7, 1993
    Assignee: Nokia Mobile Phones Ltd.
    Inventor: Pekka S. Lonka
  • Patent number: 5233505
    Abstract: A security device for protecting electronically-stored data comprising a protected circuit board which has a memory device for storing data code and a battery, a plurality of protective circuit boards respectively overlaid on each side of the protected circuit board, and a plurality of connectors connected between the protected circuit board and the protective circuit boards, wherein the printed circuit on each protective circuit board is respectively connected to the printed circuit on the protected circuit board forming into a series electronic circuit. Detaching either protective circuit board from said protected circuit board or damaging either protective circuit board will break the series electronic circuit causing any code data stored in the memory device to be erased.
    Type: Grant
    Filed: December 30, 1991
    Date of Patent: August 3, 1993
    Assignee: Yeng-Ming Chang
    Inventors: Yeng-Ming Chang, Wing-Fai Chun
  • Patent number: 5225968
    Abstract: A computer functional card connecting apparatus comprised of a base having two parallel channel frames at two opposite ends thereof at right angles, wherein the base has a step block longitudinally disposed at the top with pin holes formed thereon, an elongated groove longitudinally disposed on the bottom with vertical contact pins made thereon for connecting to a mother board, transverse contact pins on an inner side for electrically connecting a computer functional card that has been inserted in between the two parallel channel frames, and a circuit board set between the step block and the bottom groove for electrically connecting said transverse contact pins, the vertical contact pins and the pin holes.
    Type: Grant
    Filed: March 10, 1992
    Date of Patent: July 6, 1993
    Inventor: Hsi K. Ma
  • Patent number: 5217383
    Abstract: A contact arrangement for establishing electrical contact between the plug prongs (4) of an electrical component (1) and contact bores in another electrical component (5). To permit the force-free insertion of the plug prongs (4) into the associated contact bores (6) the free width of the contact bore (6) is greater than the external dimensions of the associated plug prongs (4). To establish contact, the two components (1) and (5) are displaced relative to one another essentially perpendicularly to the direction of the plug prongs (4) and are held in the displaced position. The plug prongs (4) are deflected laterally and clamped between the upper and lower inner edges of the contact bores (6).
    Type: Grant
    Filed: October 7, 1991
    Date of Patent: June 8, 1993
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventors: Egon Hildebrandt, Achim Walz