Abstract: In an embodiment, an oversampled data converter includes a lowpass filter having a filter stage comprising a dynamic limiter, where the dynamic limiter having a limit set by an signal level at an input to the oversampled data converter. The oversampled data converter also includes a quantizing block comprising an input coupled to an output of the lowpass filter and an output coupled to an input of the lowpass filter.

Abstract: The wireless receiver of the present invention accommodates dual-carrier Evolved EDGE without significantly impacting existing receiver architectures. The inventive receiver comprises a shared local oscillator and two image-rejecting downconverters. The local oscillator generates a local oscillator frequency between two carrier frequencies of adjacent radio channels. The receiver receives a signal in each of the adjacent radio channels. In a dual-carrier mode, a first image-rejecting downconverter uses the local oscillator frequency to downconvert a first signal received in the first radio channel while rejecting a second signal received in the second radio channel. A second image-rejecting downconverter uses the local oscillator frequency to downconvert the second signal while rejecting the first signal.

Abstract: Computer implemented methods and systems for the prediction of the reception of a desired in-band on-channel digital audio broadcast signal (IBOC DAB) are described. A method includes computing a first ratio of a weaker undesired adjacent broadcast signal to a stronger undesired adjacent broadcast signal; computing a second ratio of the desired IBOC DAB signal to the stronger undesired adjacent roadcast signal. The method also includes computing a minimum allowable reception ratio based on the second ratio and the slope and intercept of a line, wherein the slope and intercept of the line is based on both (i) a plurality of ratios of a weaker adjacent broadcast signal to a stronger adjacent broadcast signal and (ii) a plurality of ratios of a desired IBOC DAB signal to a stronger adjacent broadcast signal. Reception is predicted when the computed minimum allowable reception ratio is less than the first ratio.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: Aspects of a method and system for frequency selection using microstrip transceivers for high-speed applications may include determining an operating frequency for operating one or both of a transmitter and a receiver. A frequency response and/or impedance of one or more transmission lines that may be utilized by the transmitter and/or the receiver may be controlled by adjusting one or more capacitances, communicatively coupled to the transmission lines based on the determined operating frequency. The capacitances may be coupled to the one or more transmission line at arbitrary physical spots, and may comprise capacitors and/or varactors. The capacitors and/or the varactors may be adjusted with a digital signal or an analog signal. The capacitances may comprise a matrix arrangement of capacitors and/or varactors. The one or more transmission lines may comprise a microstrip.

Abstract: A system comprises a first clock module configured to generate a first clock reference that is not corrected using automatic frequency correction (AFC). A global position system (GPS) module is configured to receive the first clock reference. An integrated circuit for a cellular transceiver includes a system phase lock loop configured to receive the first clock reference, to perform AFC, and to generate a second clock reference that is AFC corrected.

Abstract: A communications subsystem for a wireless device for correcting errors in a reference frequency signal. The communications subsystem comprises a frequency generator for generating the reference frequency signal and a closed loop reference frequency correction module that generates a reference frequency adjustment signal for correcting the reference frequency signal when the communications subsystem operates in closed loop mode. The subsystem further includes an open loop frequency correction means that that samples values of the reference frequency adjustment signal during the closed loop mode and generates a frequency correction signal for correcting the reference frequency signal when the communications subsystem operates in a mode other than closed loop mode.

Abstract: A device is provided for dividing a clock signal by even and odd integers. The device includes a divider, a delay portion and a duty cycle corrector. The divider is arranged to receive the clock signal and can divide the clock signal and output a divided clock signal. The delay portion can output a delayed signal based on the divided clock signal. The duty cycle corrector can output a first signal based on the delayed signal and the divided clock signal.

Abstract: Systems and methods of clock generation for radio frequency receiver. In radio frequency receiver, the system requires accurate local oscillating (LO) signal and system clocks for proper operation and to ensure high quality performance. In order to achieve accurate LO frequency and system clock, a crystal or and accurate reference clock is provide to the clock generation circuit. How a low-cost receiver, it is desirable to eliminate the requirement for a crystal or an accurate reference clock. The present invention discloses systems and methods to utilize a pilot signal embedded in the transmitted signal. The pilot signal usually has very accurate frequency which is particular true for broadcast system such as FM broadcast. In various embodiments of the present invention, the systems and methods measure the relation between the frequency of the pilot signal and the current clock generated.

Abstract: An oscillator circuit having a source of an oscillating signal, a tank circuit including an inductor and a capacitor, and a discretely switchable capacitance module configured to control an amount of capacitance in the oscillator circuit. The discretely switchable capacitance module includes, in one embodiment, a capacitor coupled between a first node and a second node, a switch, having a control node, coupled between the second node and a third node; and a DC feed circuit, having a first end coupled to the second node and a second end configured to receive a first or second control signal. The control node of the switch is tied to a predetermined bias voltage. When the first control signal is applied, the capacitor is coupled between the first node and the third node via the switch such that the capacitor is coupled in parallel with the capacitor of the tank circuit, and when the second control signal is applied the capacitor is decoupled from the tank circuit.

Abstract: An adaptive current control circuit for reduced power consumption and minimized gain shift in a variable gain amplifier. An automatic gain control circuit provides gain control voltages in response to a gain control signal. The gain control voltages are used by the variable gain amplifier to set the gain of the output signal for wireless transmit operations. The adaptive current control circuit receives the same gain control voltages for reducing current to the variable gain amplifier during low gain operation, while providing higher currents during high gain operation. The current that is provided is a hybrid mix of proportional to absolute temperature (PTAT) current and complementary to absolute temperature (CTAT) current for minimizing temperature effects on the gain. The ratio of PTAT current and CTAT current is adjustable for specific temperature ranges to further minimize temperature effects on the gain.

Abstract: The present disclosure is directed to systems and methods for utility meter reading. The present disclosure provides inexpensive, easy to install, devices that can collect and report utility usage data from a remote location automatically, or on-demand. The disclosed systems may be used to monitor up to sixty-four meters per system, wherein each of the sixty-four meters is monitored at least once per second. Methods for using the disclosed systems also are disclosed.

Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: A system and method for implementing an IQ generator includes a master latch that generates an I signal in response to a clock input signal, and a slave latch that generates a Q signal in response to an inverted clock input signal. A master selector is configured to provide a communication path from the master latch to the slave latch, and a slave selector is configured to provide a feedback path from the slave latch to the master latch. The foregoing I and Q signals are output directly from the respective master and slave latches without any intervening electronic circuitry.

Abstract: An open loop frequency calibration algorithm is employed whereby frequency counters are utilized to provide frequency information concerning the difference in frequency between a local oscillator and a reference signal prior to obtaining phase locked operation of a phase locked loop (PLL). The frequency difference is then used to adjust the local oscillator's frequency to be changed by a value that is proportional to the frequency difference measured. Through adaptive calibration of the local oscillator's frequency prior to closed loop PLL operations, a substantial reduction in the amount of time required to obtain phase/frequency coherent operation of the PLL is realized.

Abstract: Methods and systems for correcting a frequency error in a digital portion of a radio broadcast signal are disclosed. The methods and systems include the steps of receiving a radio broadcast signal having an analog portion and a digital portion, separating the analog portion of the radio broadcast signal and the digital portion of the radio broadcast signal, determining a coarse frequency offset of the analog portion of the radio broadcast signal, generating an error signal for adjusting a frequency of the digital portion of the radio broadcast signal, wherein the error signal is based on the coarse frequency offset of the analog portion of the radio broadcast signal, and adjusting the frequency of the digital portion of the radio broadcast signal with the error signal that is based on the coarse frequency offset of the analog portion of the radio broadcast signal, such that a frequency error in the digital portion of the radio broadcast signal is reduced below a predetermined amount.

Abstract: A method and apparatus for using a conventional oscillator in a cellular telephone transceiver as a source of a reference signal for a GPS receiver. In one embodiment, the method comprises using a voltage-controlled oscillator (“VCXO”) within a cellular telephone transceiver to generate a reference frequency signal for the GPS receiver. Circuitry within the telephone transceiver generates a frequency error signal. Both of these signals are coupled to GPS circuitry and used to control a carrier numerically controlled oscillator (“NCO”) and a code NCO. The NCOs produce a tuning signal and a timing signal, respectively. The GPS circuitry uses the NCO generated signals to process GPS signals.

Abstract: In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more calibration techniques to quickly and precisely calibrate the VCO. In this manner, the analog gain of the VCO can be significantly reduced, which may improve performance of the wireless communication device. Also, the initial state of the PLL may be improved to reduce lock time of the PLL, which may enhance performance of the wireless communication device.

Abstract: Methods and systems for processing a signal with a corresponding noise profile are disclosed. Aspects of the method may comprise analyzing spectral content of the noise profile. At least one noise harmonic within the signal may be filtered based on said analyzed spectral content. The filtered signal may be limited. The noise profile may comprise a phase noise profile. The signal may comprise at least one of a sinusoidal signal and a noise signal. At least one filter coefficient that is used to filter said at least one noise harmonic may be determined. The filtering may comprise low pass filtering and the limiting may comprise hard-limiting the filtered signal. The signal may be modulated prior to the filtering. The signal may be downconverted prior to the modulating. At least one signal component of the signal may be downconverted.

Abstract: A technique for improving frequency synthesizer performance by frequency-compensating charge pump current in order to maintain a consistent loop bandwidth over a wide operating frequency range is described. A relationship between the capacitance value associated with a voltage controlled oscillator resonant tank and the magnitude of current pulses in a related charge pump is exploited to bound the loop bandwidth of the frequency synthesizer over both operating frequency and process variation. A control state machine generates digital coarse tune values that dynamically select a capacitance for the resonant tank, such that the voltage controlled oscillator operates within an optimal control voltage range. Each dynamically selected capacitance value is then used to determine the magnitude of current pulses in the charge pump.

Abstract: A disclosed method tunes a signal from a channelized spectrum having a predetermined channel spacing. A signal of interest having a predetermined maximum bandwidth is mixed with a local oscillator signal, which has a frequency that is an integer multiple of the channel spacing or one-half of a channel spacing displaced from an integer multiple of the channel spacing. The local oscillator signal is selected to frequency translate the signal of interest to within a near-baseband passband whose lower edge is spaced from DC by at least about the maximum bandwidth of the signal of interest. Problems associated with 1/f noise, DC offsets, and self-mixing products are avoided or substantially diminished. Other methods and systems are also disclosed.

Abstract: An RFID transceiver device is proposed capable of carrier sensing even when the difference with respect to the carrier frequency employed by the other system is close to “0”.

Abstract: A circuit receives a first signal (for example, a baseband signal) and mixes it with a local oscillator (LO) signal, and outputs a second signal (for example, an RFOUT signal). The circuit includes multiple identical Mixer and Frequency Divider Pair (MFDP) circuits. Each MFDP can be enabled separately. Each MFDP includes a mixer and a frequency divider that provides the mixer with a local version of the LO signal. The MFDP outputs are coupled together so that the output power of the second signal (RFOUT) is the combined output powers of the various MFDPs. By controlling the number of enabled MFDPs, the output power of the second signal is controlled. Because the MFDPs all have identical layouts, accuracy of output power step size is improved. Because LO signal power within the circuit automatically changes in proportion to the number of enabled MFDPs, local oscillator leakage problems are avoided.

Abstract: Systems and methods are disclosed herein for using a switched mode TCXO or VC-TCXO in a satellite navigation receiver where the switched mode TCXO or VC-TCXO may operate either in an active compensation mode to compensate for temperature induced frequency error or in a second fixed compensation mode where the TCXO or VC-TCXO is not compensated for temperature. The switched mode TCXO or VC-TCXO is operated in the active compensation mode when satellite acquisition performance may be improved from a reduction in the range of oscillator frequency error. The switched mode TCXO or VC-TCXO may be switched to operate in the fixed compensation mode when satellite tracking performance is sensitive to discontinuities in the phase, frequency, and/or frequency rate of the oscillator clock when temperature compensation is applied.

Abstract: Certain aspects of a method and system for simultaneous FM transmission and FM reception using a shared antenna and a direct digital frequency synthesizer (DDFS) may be disclosed. In a FM transceiver that receives FM signals at a frequency f1 and transmits FM signals at a frequency f2, aspects of the method may include generating via a DDFS, a signal corresponding to a difference between f1 and f2 to enable simultaneous transmission and reception of FM signals via shared antenna.

Abstract: A phase detector includes a plurality of phase detectors located in a phase correction loop, each phase detector configured to receive as input a radio frequency (RF) input signal and an RF reference signal, each of the plurality of phase detectors also configured to provide a signal representing a different phase offset based on the phase difference between the RE input signal and the RF reference signal; and a switch configured to receive an output of each of the plurality of phase detectors and configured to select the output representing the phase offset, that is closest to a phase of an output of an amplifier.

Abstract: A modulation circuit for use in a radiofrequency transmitter includes a local oscillator circuit configured to generate one or more local oscillator signals at a desired frequency and with a duty cycle at or about twenty-five percent, and a modulator configured to generate one or more modulated signals responsive to the one or more local oscillator signals and one or more baseband information signals. In at least one embodiment, the modulation circuit includes a modulator comprising a combined mixing and transconductance circuit that includes a transistor circuit for each baseband information signal serving as a modulation input to the modulator. Each transistor circuit comprises a first transistor driven by the baseband information signal and coupling a modulator output node to a corresponding transconductance element, and a second transistor driven by one of the one or more local oscillator signals and coupling the corresponding transconductance element to a signal ground node.

Abstract: A sigma delta modulated phase lock loop reduces quantization noise by using phase interpolation to increase an effective frequency resolution of the dividing ratio of a divider.

Abstract: A method for processing signals is disclosed and may include performing using one or more circuits in a multiband radio, functions including receiving an input signal from an oscillator that generates signals for each of a plurality of bands handled by the multiband radio. The received input signal may be divided. A feedback loop reference signal may be generated from the input signal. A coarse calibration signal and/or a fine calibration signal may be generated from the generated feedback loop reference signal. The oscillator may be calibrated utilizing the coarse calibration signal and/or the fine calibration signal. The input signal generated by the oscillator may be between about 3.4 GHz and 4 GHz. The receive input signal may be buffered. The generated feedback loop reference signal may also be buffered.

Abstract: A noise test measurement system configured to measure a noise component of a transmitted RF signal is described. The noise test measurement system may include an antenna, a low-noise amplifier, a local oscillator, a first coupler, a first variable phase-shifter, a first mixer, and a processor.

Abstract: A local oscillator communicates a signal of relatively low frequency across an integrated circuit to the location of a mixer. Near the mixer, a frequency-multiplying SubHarmonically Injection-Locked Oscillator (SHILO) receives the signal and generates therefrom a higher frequency signal. If the SHILO outputs I and Q quadrature signals, then the I and Q signals drive the mixer. If the SHILO does not generate quadrature signals, then a quadrature generating circuit receives the SHILO output signal and generates therefrom I and Q signals that drive the mixer. In one advantageous aspect, the frequency of the signal communicated over distance from the local oscillator to the SHILO is lower than the frequency of the I and Q signals that drive the mixer locally. Reducing the frequency of the signal communicated over distance can reduce power consumption of the LO signal distribution system by more than fifty percent as compared to conventional systems.

Abstract: A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

Abstract: Shockline-based samplers of a vector-network analyzer (VNA) have enhanced dynamic range by using a dynamic bias network applied to the non-linear transmission lines (NLTLs) or shocklines. The bias voltage applied to the NLTL provides direct control over the falling-edge shockline compression, and thus the insertion loss and overall RF bandwidth of the sampler. Alternating between a forward bias voltage to turn off a shockline sampler when it is not needed and thereby reducing spurious generation and improving isolation can be alternatively applied with a reverse bias voltage to turn on the shockline sampler in a normal operation mode. By measuring the shockline output and providing feedback in the reverse-bias mode, the bias voltage can be dynamically adjusted to significantly increase the performance of the NLTL based sampler. In the presence of a strong positive bias voltage, the incoming LO and its harmonics experience large ohmic losses thus preventing gating pulses from forming in the shockline.

Abstract: The invention proposes an LNB using two transposition frequencies chosen on either side of the reception band so as to obtain a transposition of supradyne type and a transposition of infradyne type according to the frequency used. This choice of transposition frequencies makes it possible to have an overlap zone in the middle of the reception band which is transposed with the aid of the two oscillation frequencies but at different frequencies. This makes it possible to choose between the two transpositions in the case where the frequency transposed with the aid of an oscillator corresponds to a particularly noisy frequency.

Abstract: A frequency synthesizer comprises: a single-tone signal generator which outputs signals of a single frequency; a frequency multiplier which generates one or more intermediate signals having different frequencies based on frequencies of input signals and outputs the same as output signals; a frequency selector; a mixer; and a frequency synthesizer control circuit which includes a frequency synthesizer control terminal, wherein an output of the single-tone signal generator is set as an input of the frequency multiplier, one or more outputs of the frequency multiplier are set as one or more inputs of the frequency selector, an output of the frequency selector and one output of the outputs of the frequency multiplier are set as first and second inputs of the mixer, and an output of the mixer is set as an output of the frequency synthesizer.

Abstract: A radio signal receiver includes an input for receiving an input signal having an input carrier frequency modulated by a payload signal to be detected. A frequency converter changes the carrier frequency of the input signal and produces an intermediate signal that is an image of the input signal, and has a carrier frequency equal to an intermediate frequency. A filter circuit filters the intermediate signal. A demodulator eliminates a component, with a frequency equal to the intermediate frequency, from the filtered intermediate frequency, and produces the payload signal. The receiver also includes a detection circuit to produce a level signal representative of a level of the payload signal. A control circuit applies a control signal representative of the level signal to a control input of the frequency converter, the filter circuit and the demodulator.

Abstract: A chopped intermediate frequency (IF) wireless receiver is disclosed. The wireless receiver includes a local oscillator (LO), a first and a second mixers, an LO frequency control module, an IF filter, a digital down converter and a down conversion controller. The LO provides a local oscillating signal to the first and second mixers. The first and second mixers converts a received radio frequency signal to an in-phase IF signal and a quadrature IF signal, respectively. The LO frequency control module alternately down converts a channel frequency by changing an oscillation frequency of the LO. Coupled to the digital down converter, the down conversion controller adjusts a complex sine wave within the digital down converter while the in-phase IF signal and the quadrature IF signal are being down-converted by the digital down converter to a baseband signal.

Abstract: A method of controlling a phase locked loop in a mobile station and a mobile station of a cellular telecommunications system are provided. The mobile station comprises an integrated phase locked loop for generating output frequencies; a frequency control unit for providing a frequency control word for the phase locked loop, according to which frequency control word an output frequency is generated; and a tuning unit for providing a synchronized tuning word for the phase locked loop, the tuning unit being configured to output the synchronized tuning word to the phase locked loop in synchronization with the output of the frequency control word. The invention reduces the settling time of a mobile station when an operating frequency is changed from one to another.

Abstract: The present invention is related to a method and apparatus for automatic frequency correction of a local oscillator. The apparatus receives a carrier signal. The carrier signal includes a code sequence known to the apparatus. The apparatus downconverts the carrier signal to a baseband signal using the local oscillator. The apparatus performs a block correlation of the samples of the baseband signal with the known code sequence to generate a frequency error signal. The frequency error signal is fed back to the local oscillator to correct the frequency error.

Abstract: An oscillation controlling apparatus for controlling an oscillation frequency of an oscillation circuit to be a target frequency comprises a variable range dividing unit configured to dividing a variable range of a control signal into a plurality of portions, the control signal increasing or decreasing the oscillation frequency of the oscillation circuit as a value thereof is increased or decreased; and a determining unit configured to determining the portion including the control signal setting the oscillation frequency to the target frequency, by outputting the control signal at a boundary of each portion divided by the variable range dividing unit and by acquiring the oscillation frequency of the oscillation circuit, wherein the variable range dividing unit is configured to divide repeatedly the variable range until the oscillation frequency of the oscillation circuit is set to the target frequency with using the portion determined by the determining unit as the variable range.

Abstract: Frequency converters include waveguides configured for a local oscillator (LO) signal, an intermediate frequency (IF) signal, and an RF signal. A multimode IF waveguide can be used for selectively coupling of an IF signal and to reduce signal contributions produced by the LO signal. Typically, the multimode waveguide is situated to that the IF signal and the LO signal propagate in different waveguide modes, and a selected one of these signals can be selectively attenuated. In some examples, a periodically stepped waveguide is used to enhance propagation of a selected waveguide mode or a lossy conductor is used to attenuate a selected waveguide mode.

Abstract: A radio frequency (RF) receiver includes an intermediate frequency (IF) mixer that generates an output signal based on mixing a hybrid in-band, on-channel (IBOC) signal with an intermediate frequency signal. An oscillator generates the intermediate frequency signal; wherein the intermediate frequency is less than a bandwidth of the IBOC signal.

Abstract: A technique includes generating an analog voltage to control a frequency for an oscillator. The analog signal is converted into a digital signal, and the frequency is controlled in response to the digital signal.

Abstract: A system and method is shown for automatic frequency correction in a receiver, where the number of clock cycles in a baseband data signal, such as an I or Q channel of the receiver or an XOR of the I and Q channels, for a “1” state and a “0” state of a received data signal are each determined and the difference between the two is used to calculate a subsequent frequency offset correction value. The subsequent frequency offset correction value is added to a current offset correction value to obtain an actual offset correction value. The actual offset correction value is then used to adjust the frequency of the receiver clock.

Abstract: A tunable multiple frequency source system employing offset signal phasing includes a first frequency source, a phase delay element, and a second frequency source configured to operate concurrently with the first frequency source. The first frequency source includes an input coupled to receive a reference input signal and an output for providing a first frequency source signal. The phase delay includes an input coupled to receive the input reference signal, and an output, the phase delay element operable to apply a predefined phase delay to the input reference signal to produce a phase-delayed input signal. The second frequency source includes an input coupled to receive the phase-delayed input signal and an output for providing a second frequency source signal.

Abstract: Various embodiments are disclosed relating to techniques to reduce spurs in wireless transceivers. In an example embodiment, a first fractional-N divide ratio for a first frequency synthesizer may be set based on a selected channel. A second fractional-N divide ratio for a second frequency synthesizer may be set to a fixed value independent of the selected channel. The second fractional-N divide ratio may be set to a value that is sufficiently distant from an integer value so as to decrease the likelihood of at least some type(s) of spurs.

Abstract: A receiver which is arranged to receive an RF multi-carrier signal (60) comprises an in-phase mixer (51) for frequency down converting the RF multi-carrier signal to an in-phase multi-carrier signal (I) and a quadrature mixer (52) for frequency down converting the RF multi-carrier signal (60) to a quadrature multi-carrier signal. The receiver further comprises a local oscillator (60) arranged to generate in-phase and quadrature mixing signals (64,65) for the in-phase and quadrature mixers (51,52). The local oscillator (60) is further arranged to add a frequency offset to the in-phase and quadrature mixing signals (65, 65) so as to minimize an error vector magnitude of the in-phase and quadrature multi-carrier signals (I, Q).

Abstract: A fast switching, dual frequency phase locked loop comprising dual phase/frequency detectors, dual charge pumps, a pair of loop filters, and a low leakage voltage controlled oscillator. Each phase/frequency detector and associated tuning ports of the voltage controlled oscillator can be activated and deactivated separately without disturbing the charge on the loop filters.