Abstract: The present invention discloses a new type of extremely low-noise phase-frequency detector (PFD) 500, broadband from DC to multi-GHz RF frequencies for PLL synthesizer applications. Free of any feedback mechanisms, thus inherently fast, it operates close to transition frequency fT of IC processes or frequency limits of discrete mixers. The PFD 500 utilizes complex SSB conversion in both the in-phase and quadrature arms, delaying the in-phase arm in 530, beating the delayed signal 124 with the un-delayed quadrature signal 122 in mixer 126. The output 128 contains both the frequency difference and the phase difference information between the two signals 118 and 520, providing both the frequency-discrimination (FD) and the phase detection (PD) functions. Utilizing standard mixers the PFD 500 can achieve superior CNRs of 180 dBc/Hz at multi-GHz RF. Additionally, utilizing the FD/FM demodulation capability, the present invention improves phase noise of various signals and linearity of FM modulators.

Abstract: A differential and quadrature harmonic voltage controlled oscillator (VCO), and a method for generating a differential and quadrature harmonic signal. The VCO may include a first oscillation unit for generating a first and a third signal, a first combining unit for combining the first and the third signal, a second oscillation unit for generating a second and a fourth signal, and a second combining unit for combining the second and the fourth signal. The phase of the second signal is determined through a phase-invert and delay using the first signal, the phase of the third signal is determined through a phase-invert and delay using the second signal, the phase of the fourth signal is determined through a phase-invert and delay using the third signal, and the phase of the first signal is determined through a phase-invert and delay using the fourth signal.

Abstract: A variable resolution analog-to-digital converter includes a sample-and-hold circuit including a plurality of sample-and-hold units which are connected in parallel and selectively activated corresponding to a required resolution to sample and hold an analog input signal, a plurality of conversion stages connected in cascade to an output of the sample-and-hold circuit to convert an output signal of the sample-and-hold circuit to a plurality of bit signals, and a synthesis circuit to synthesize the bit signals, to generate a digital output signal.

Abstract: The present invention provides a differential voltage control oscillator including: a parallel resonance circuit in which an inductor circuit, a variable capacitance circuit, and a radio-frequency switching circuit are connected in parallel together; and a negative resistance circuit connected in parallel with the parallel resonance circuit.

Abstract: A WLAN (Wireless Local Area Network) communication device comprising a WLAN frequency synthesizer for generating a synthesizer signal suitable for modulating a transmission signal and/or demodulating a reception signal and corresponding methods and integrated circuit chips are provided. The WLAN frequency synthesizer comprises a reference oscillator for generating a first reference clock signal, a fractional-N PLL (Phase-Locked Loop) unit for receiving a second reference clock signal and converting the second reference clock signal into the synthesizer signal, and a frequency multiplier for receiving the first reference clock signal and converting the first reference clock signal into the second reference clock signal to be forwarded to the fractional-N PLL unit by multiplying the frequency of the first reference clock signal by a multiplication factor. Embodiments may provide shorter settling times and/or enhanced spurious suppression of the fractional-N PLL unit.

Abstract: A polar modulator contains a phase locked loop which is designed to emit a radio-frequency signal at one frequency to one output, with the frequency being derived from the reference signal and from a phase modulation signal at a control input of the phase locked loop. The modulator additionally has a second signal input for supplying an amplitude modulation signal. The second signal input is connected to a control input of a pulse width modulator, one of whose signal inputs is coupled to the output of the phase locked loop. The pulse width modulator is designed to vary the duty ratio of a signal which is applied to the signal input, with this variation being adjustable via a regulation signal at the control input. A filter can be connected downstream from the output of the pulse width modulator and suppresses higher harmonic components in a signal which can be tapped off at the output of the pulse width modulator.

Abstract: An RF communications circuit having a reduced LO feed through image reject mixer is disclosed. The image reject mixer includes a quadrature phase transconductance stage coupled to a quadrature phase mixer of a quadrature phase mixer module and an in-phase mixer of an in-phase mixer module. The image reject mixer further includes an in-phase transconductance stage coupled to an in-phase mixer of the quadrature phase mixer module and a quadrature phase mixer of the in-phase mixer module. The output of the quadrature phase mixer and in-phase mixer of the quadrature phase mixer module are cross-coupled to form a quadrature phase local oscillator (LO) output and wherein the output of the quadrature phase mixer and in-phase mixer of the in-phase mixer module are cross-coupled to form an in-phase local oscillator (LO) output.

Abstract: An audio demodulating circuit in accordance with the present invention for demodulating audio signals in a plurality of broadcast systems of mutually different frequency deviations such as the NTSC and the PAL, is arranged such that a connection between a trap circuit for suppressing adjacent interference and an intermediate frequency signal line can be controlled without using an externally applied special signal, based on a control voltage applied from a phase comparator with respect to a voltage control oscillator which generates a local oscillation signal for extracting an audio signal from the intermediate frequency signal.

Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.

Abstract: A method and apparatus for compensating an oscillator in a location-enabled wireless device is described. In an example, a mobile device includes a wireless receiver for receiving wireless signals and a GPS receiver for receiving GPS signals. The mobile device also includes an oscillator having an associated temperature model. A frequency error is derived from a wireless signal. The temperature model is adjusted in response to the frequency error and a temperature proximate the oscillator. Frequency error of the oscillator is compensated using the adjusted temperature model. In another example, a frequency error is derived using a second oscillator within the wireless receiver.

Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.

Abstract: A PLL frequency synthesizer suitable for improving even a spurious characteristic in a lock state while ensuring a high-speed lockup characteristic to thereby implement satisfactoy communication quality includes a switch circuit interposed between a low-pass filter circuit and a voltage-controlled oscillator controlled based on a control signal to open/close control a feedback loop lying between the low-pass filter circuit and the voltage-controlled oscillator. The switch circuit is opened according to a path-opening instruction of a feedback loop based on the control signal to open the feedback loop, thereby stopping the operation of the feedback loop. If this stop operation is controlled according to the control signal so as to he carried out during a period in which a pseudo correction pulse is outputted from a charge pump circuit for each phase comparison cycle of a phase comparator, then spurious generation incident to the pseudo correction pulse can be suppressed.

Abstract: A sigma delta modulated phase lock loop reduces quantization noise by using phase interpolation to increase an effective frequency resolution of the dividing ratio of a divider.

Abstract: A bimodal power data link transceiver device (33) is provided. The device comprises a transceiver integrated circuit (IC) (14); wherein the IC comprises an oscillator (150), a frequency reference port, and a RF output port. A VCO (12) is coupled to the oscillator and a direct digital synthesizer (15) is coupled to the frequency reference port. The combination allows the IC to operate below 200 MHz. In addition, an external power amplifier (19) is connected to the RF output port thus allowing for burst RF communications at a higher power than the quiescent receive mode.

Abstract: A hybrid digital and analog phase locked loop. A voltage controlled oscillator is provided, having a fine tune input, a coarse tune input and an output. A frequency divider has an input connected to receive a signal provided by the output of the voltage controlled oscillator, and has an output for providing a signal having a frequency that is divided with respect to a signal provided to its input. A phase detector is connected to receive a reference input signal having a reference frequency at a first input thereof and is connected to receive the signal provided by the output of the frequency divider. The phase detector has an output for providing a phase error signal. An analog is circuit configured as a proportional filter and is connected to receive the phase error signal and to provide a fine tune signal at the fine tune input of the voltage controlled oscillator.

Abstract: A tuneable frequency translator is disclosed having electrical circuitry mounted to a circuit board. The circuitry is designed to provide a phase-locked loop with a resonator. Compliant material is positioned between the resonator and the circuit board. Operably coupled to the resonator is at least one passive device that is short-circuited by an electrically conductive lead. The resonant frequency of the frequency translator can be changed by severing the electrically conductive lead, and thus activating the associated passive device.

Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.

Abstract: A system for synchronizing a portable transceiver to a network is disclosed. Embodiments of the system for synchronizing a portable transceiver to a network include a crystal oscillator, a frequency synthesizer adapted to receive an output of the crystal oscillator, logic coupled to the crystal oscillator, the logic configured to estimate a frequency error of a received signal; and a first control signal supplied from the logic to the frequency synthesizer, the first control signal configured to adjust the frequency synthesizer to compensate for the error.

Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.

Abstract: An RF power oscillator for contactless card antennas shapes a carrier signal at the operating frequency utilizing a delay circuit having a number of taps for delaying the carrier signal by different lengths of time. The delayed signals are input into a buffer and output through impedance elements to a node coupled to the antenna. The resulting waveform for a square wave input signal, and equal-length delay taps, is a trapezoidal wave output. Any input wave form can be shaped in a variety of ways depending upon the combinations of delay taps used. Since the buffer drivers for each delayed wave switch state at slightly different times, the amplitude and bandwidth of emitted electromagnetic interference (EMI) is reduced for the transmission circuit.

Abstract: A receiver for use in a wireless communication system includes a voltage controlled oscillator and estimating means for obtaining a frequency estimate to adjust the voltage controlled oscillator, thereby correcting an oscillator frequency error. The estimating means performs a number of block correlations on a received signal with a known midamble reference. The output of the block correlators are conjugately multiplied and summed to produce a low-variance estimate of the phase change between correlators. A number of the largest summed values are located, and the located values that exceed a detection threshold are summed to provide a single complex number whose angle is an estimate of the phase change between the correlators.

Abstract: A power supply circuit of a low noise block converter (LNB) includes a plurality of output voltage regulators. A first output voltage regulator, a local oscillator circuit, a second output voltage regulator, and an LNA are connected in series in a direction in which a power supply current flows. Therefore, a voltage adjustment width of the output voltage regulator can be reduced and a power loss can be reduced. A value of current flowing in the power supply circuit can also be decreased. Accordingly, an LNB with a reduced power consumption can be realized.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: An electronic system for accurately controlling the RF output power from a power amplifier (21) is implemented using a multiplier (28) which multiplies the output power by itself to provide a DC component which is fed to a variable gain amplifier (29) which provides a controlling signal via a comparator (24) and an integrator (25) to the power amplifier. The transfer function between controlling signal and output power is substantially linear, even during dynamic variation of the controlling signal. The system is capable of a large dynamic range, and exhibits constant control loop bandwidth over this range. This is of particular use to TDMA applications with a large dynamic range of levelled output powers because a fixed filter function can be used to shape the transmitted burst.

Abstract: A method for WLAN signal strength determination comprises receiving a WLAN RF signal; converting the WLAN RF signal to a voltage proportional to the signal; comparing the voltage to a first reference voltage; and outputting data corresponding to WLAN RF signal strength if the voltage is greater than the first reference voltage.

Abstract: A method and apparatus for compensating an oscillator in a location-enabled wireless device is described. In an example, a mobile device includes a wireless receiver for receiving wireless signals and a GPS receiver for receiving GPS signals. The mobile device also includes an oscillator having an associated temperature model. A frequency error is derived from a wireless signal. The temperature model is adjusted in response to the frequency error and a temperature proximate the oscillator. Frequency error of the oscillator is compensated using the adjusted temperature model. In another example, a frequency error is derived using a second oscillator within the wireless receiver.

Abstract: A frequency synthesiser 50 comprises a VCO 56 whose output signal frequency is proportional to input voltage amplitude. In a first mode, the VCO output is fed via a divider 24 to a phase detector 26 which also receives a reference signal. The phase detector output passes via a loop filter 28 and a controller 70, which is passive in the first mode, back to the VCO 56 to form a closed phase-locked loop. To adjust the frequency synthesiser output frequency, the controller 70 switches the circuit into a second mode in which the VCO 56 output is not fed back, and a constant voltage source is supplied to the VCO 56 instead so that the VCO output frequency is constant. The VCO transfer function is then altered by adjusting a variable capacitor 60 therein, and the circuit is then switched back to the first mode. The locking time of the synthesiser is thereby improved as output frequency changes.

Abstract: A variable frequency oscillator comprising: an oscillatory circuit for generating a periodic output dependent on the capacitance between a first node and a second node of the circuit, and having a capacitative element connected between the first node and the second node; the capacitative element comprising: a variable capacitance unit, the capacitance of which is variable for varying the frequency of the output and a plurality of finite capacitances each being selectively connectable in parallel with the variable capacitance unit between the first node and the second node to trim the frequency of the output.

Abstract: A high frequency receiving device in accordance with the present invention includes a local oscillation circuit made up of multiple voltage-controlled oscillators. One of the oscillators is selected by a VCO selecting circuit. An oscillating signal, together with a high-frequency-received signal, is supplied to each mixer circuit. The signal outputs of the mixer circuits are supplied to respective LPFs to produce demodulated signal outputs. The cutoff frequencies of the LPFs are controlled by a cutoff frequency control circuit. A PLL is provided to correct shifts in the oscillation frequency of the voltage-controlled oscillator and intermittently shift in properties of the cutoff frequency control circuit. The circuit is reduced in size, and the signals related to the adjustment of the cutoff frequencies are prevented from undesirably find a path to act as noise on the base-band signal.

Abstract: The frequency error of an oscillator is minimized by characterizing the oscillator. A reference signal from an external source containing a minimal frequency error is provided to an electronic device. The external signal is used as a reference frequency to estimate the frequency error of an internal frequency source. The electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source. The electronic device collects and stores the values of the parameters as well as the corresponding output frequency or frequency error of the internal frequency source. The resultant characterization of the internal frequency source is used to compensate the internal frequency source when the internal frequency source is not provided the external reference signal.

Abstract: Method for calibrating a motor vehicle hands-free access system comprising a control unit (UC) with an emitting antenna (AE) and an antenna controller (PA), consists in: 1. sending to the control unit (UC), from a measurement apparatus (AM) equipped with a receiving antenna (AR) connected to the control unit (UC) via a wire link (LF), a message to configure the control unit (UC) in calibration mode, 2. transmitting a signal via said emitting and receiving antennas (AE, AR) to said measurement apparatus (AM), 3. measuring characteristics of the received signal, comparing them with reference values and sending calibration data via the wire link (LF), 4. on receipt of the data, modifying the parameters of the antenna controller (PA). Using this method, it is possible to correct certain operating defects of the hands-free access systems through an operation at the end of the motor vehicle assembly line.

Abstract: A circuit configuration having a filter, for example a bandpass filter, and a method for its operation are specified, which the circuit configuration allows for compensation of a frequency error, for example between an actual mid-frequency and a nominal frequency. A first mixer, upstream of the filter and a second mixer downstream from the filter are provided. A signal and a respective oscillation frequency are each supplied to respective inputs of the first and second mixers. The oscillation frequencies are mixed as a function of the frequency error in frequency generators such that the signal at the intermediate frequency is matched to the filter characteristics of the filter which is subject to tolerances. In consequence, filters that satisfy the stringent requirements for WCDMA mobile radio applications, but by virtue of the manufacturing technique, have an excessive mid-frequency error, can be used, for example, in heterodyne receivers.

Abstract: An RF communications circuit having a reduced LO feed through image reject mixer is disclosed. The image reject mixer includes a quadrature phase transconductance stage coupled to a quadrature phase mixer of a quadrature phase mixer module and an in-phase mixer of an in-phase mixer module. The image reject mixer further includes an in-phase transconductance stage coupled to an in-phase mixer of the quadrature phase mixer module and a quadrature phase mixer of the in-phase mixer module. The output of the quadrature phase mixer and in-phase mixer of the quadrature phase mixer module are cross-coupled to form a quadrature phase local oscillator (LO) output and wherein the output of the quadrature phase mixer and in-phase mixer of the in-phase mixer module are cross-coupled to form an in-phase local oscillator (LO) output.

Abstract: A receiver method and apparatus is presented. Signals are received from a high-voltage environment to a low-voltage environment using low-voltage devices, such as low-voltage FETs. A reference stage (i.e., first stage) provides the reference point for an input signal that is received into a second stage. The reference stage works in conjunction with the second stage to control the output of the second stage. The reference stage and the second stage communicate through floating voltage signals. The output of the second stage is an inverted signal that floats. A third stage receives the inverted signals and corrects the signal to a baseline (i.e., adds gain to the signal). The signal is then clipped by a clipping stage (i.e., fourth stage). The clipping stage clips the high-voltage signal so that it will operate with the devices in the low-voltage environment. A fifth stage is then biased with a low voltage and the clipped signal is shifted downwards. Lastly, an inverter (i.e.

Abstract: An apparatus and related method for matching antenna pattern to the mobile phone. The mobile phone includes an antenna, at least one radio frequency (RF) circuit and a diplexer for relaying signals of the RF circuits to the antenna. Each RF circuit has its own matching circuit, such that the antenna performance for receiving and transmitting signals can be independently adjusted without affecting each other.

Abstract: A wave-shaper device having an output terminal for providing a first periodic analog signal with a first frequency, the wave-shaper device including an oscillator having an output terminal for providing a second periodic analog signal with a second frequency which is multiple with an even factor of the first frequency, and means for obtaining the first analog signal from the second analog signal.

Abstract: There is provided a voltage controlled oscillation (VCO) circuit which can adjust the oscillation frequency without trimming and a semiconductor integrated circuit for communication comprising the same VCO circuit, wherein as the VCO circuit forming the PLL circuit, an LC resonance type oscillation circuit is used in which a plurality of capacitance elements are connected in parallel via a selection means such as a switch and the oscillation frequency is varied by changing the circuit constant (LC) depending on the selecting condition of the selecting means, moreover a comparing circuit for comparing the control voltage supplied to the VCO circuit from the loop filter of PLL circuit with the reference voltage and a frequency adjustment circuit for generating the signal to control the selecting means based on the comparison result of the comparing circuit are also provided to determine the signal to control the selecting means through the sequential comparison.

Abstract: To address the problem of aging and drift of a local oscillator in a mobile telephone the frequency Fi of the local oscillator is shifted upwards so that base station logging-on FCH signals are measured perfectly whether said drift is upwards or downwards. It is shown that the actual drift resulting from the initial shift and drift with time can be measured during logging on. It is shown that conforming to the standard is facilitated without having to provide an oscillator whose frequency stability with time is guaranteed.

Abstract: A frequency synthesizer usable in a wireless communication device is disclosed that may ensure a low phase noise and an improved performance. The frequency synthesizer has a phase locked loop comprising a controllable oscillator generating an output signal with an output frequency that can be adjusted within a predefined frequency range dependent on the value of a first control signal. A phase/frequency detector generates an error signal in response to a phase and/or frequency difference between an input signal generated by frequency dividing said output signal, and a reference signal. A loop filter generates the first control signal based on said error signal and outputs same to the controllable oscillator. A control unit generates a second control signal from the loop filter signal and provides the second control signal to the controllable oscillator, which is arranged for modifying the predefined frequency range based on the second control signal.

Abstract: Voltage controlled oscillator (VCO) gain tracking is used for programming modulation gain settings to minimize modulation distortion in a low bandwidth phase locked loop of a mobile station (10). A synthesizer (20) generates a tuning voltage (Vt) for controlling a frequency of a voltage controlled oscillator (VCO) modulated radio frequency signal. A controller (22) outputs a modulation data signal and includes an analog to digital converter (72) for receiving the tuning voltage from the synthesizer (20) on a VCO feedback loop (70), a gain control lookup table (LUT) (76) for storing modulation gain setting calibration data for respective mobile station sub-bands, and a gain setting digital to analog converter (DAC) (78) for outputting a modulation gain control signal to the synthesizer (20). The modulation gain setting calibration data is calibrated using a one-time or continuous calibration methodology during, respectively, a background or normal mode of mobile station operation.

Abstract: A wireless communication system, which is provided with a PLL circuit having a plurality of oscillators and is capable of processing two or more transmit and receive signal different in frequency band from one another according to the switching between the oscillators, has a reset means which resets a voltage applied to each of filter capacitors lying within the PLL circuit to a predetermined voltage when the switching between the oscillators is performed.

Abstract: Calibration of a phase locked loop and applications thereof within a radio frequency integrated circuit begins by determining an intersection of an up current and down current produced by a charge pump within the phase locked loop. The RFIC then determines a reference voltage corresponding to the intersection, which varies from an ideal voltage of VDD/2 based on process variations. The RFIC then offsets a control voltage to the voltage control oscillator (VCO) of the phase locked loop based on the reference voltage. Accordingly, by determining the offset of the actual intersection from the ideal intersection, the control voltage to the VCO may be adjusted thereby calibrating the phase locked loop for more linear performance.

Abstract: A detection circuit and method for detecting AC voltage pulses at a defined frequency relate to first transforming an input signal to a low-frequency signal by multiplying the input signal by a mixing frequency. This down-mixed signal can then be filtered and evaluated. The circuit is particularly suitable for identifying charge unit signals in the telephone network.

Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.

Abstract: A phase locked loop system for tuning the reception frequency of a receiver for digitally modulated received signals and analog-modulated received signals has at least one voltage controlled oscillator for producing an oscillator signal for a reception frequency tuning. A first frequency divider is provided for dividing the frequency of the oscillator signal to a nominal comparison frequency as a function of a receiving channel selection signal. A second frequency divider is provided for dividing a reference frequency as a function of a reception mode switching signal. A phase comparison circuit is provided for comparing the signals supplied by the frequency dividers in order to produce a tuning voltage for the voltage controlled oscillator wherein the gain of the phase comparison circuit is adjustable in order to optimize the phase noise.

Abstract: A direct conversion receiving unit includes an oscillation circuit (50) whose oscillation frequency fvco is (N/(N+1))×fR, where fR is a receiving frequency. The output of the oscillation circuit (50) is divided into two parts, one of which is converted to the frequency of (1/(N+1))×fR by a divide-by-N circuit (52). Mixing the two frequencies (1/(N+1))×fR and fvco=(N/(N+1))×fR generates the frequency fR, which is supplied to conversion mixers (38 and 44) as a local input. The receiving unit requires only one oscillation circuit, and excludes all the circuits that handle a frequency higher than fR, enabling a small size and low current consumption configuration.

Abstract: In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more amplitude calibration techniques prior to enabling the PLL. For example, an amplitude calibration unit may be used to selectively activate switched unit current sources within a tail current source of the VCO. In this manner, the amplitude the signal generated by the oscillator can be adjusted without requiring closed-loop amplitude monitoring or control.

Abstract: An electronic tuner has an input terminal, a mixer receiving the signal fed into the input terminal, a matching circuit connected to an output of the mixer, a band-pass filter connected to an output of this matching circuit, an intermediate-frequency (IF) amplifier connected to an output of the band-pass filter, and an output terminal receiving output of the IF amplifier. These circuits are composed of balanced circuits and connected by balanced lines. The mixer has a high output impedance. For the matching circuit, the impedance of the matching circuit at the band-pass filter side is equal to the impedance of the band-pass filter at the matching circuit side. This structure can realize an electronic tuner having low power consumption.

Abstract: A high frequency receiving device in accordance with the present invention includes a local oscillation circuit made up of multiple voltage-controlled oscillators. One of the oscillators is selected by a VCO selecting circuit. An oscillating signal, together with a high-frequency-received signal, is supplied to each mixer circuit. The signal outputs of the mixer circuits are supplied to respective LPFs to produce demodulated signal outputs. The cutoff frequencies of the LPFs are controlled by a cutoff frequency control circuit. A PLL is provided to correct shifts in the oscillation frequency of the voltage-controlled oscillator and intermittently shift in properties of the cutoff frequency control circuit. The circuit is reduced in size, and the signals related to the adjustment of the cutoff frequencies are prevented from undesirably find a path to act as noise on the base-band signal.

Abstract: An optoelectronic phase locked loop for clock recovery in high-speed optical time division multiplexed systems. The optoelectronic phase locked loop includes a balanced photodetector through which the polarity ambiguity in error signal is resolved and the cancellation of laser noise enabling clock recovery with low timing jitter. The optoelectronic phase locked loop also includes an electroabsorption modulator as a phase detector, a lowpass filter, a variable controlled oscillator, a power divider and an amplifer.