Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.

Abstract: Methods and systems for programmable baseband filters supporting auto-calibration in a mobile digital cellular television environment are provided. Aspects of the method may include generating within a single-chip multi-band RF receiver, at least one control signal based on signal strength of a baseband frequency signal generated within the single-chip multi-band RF receiver. A bandwidth of a filter integrated within the single-chip multi-band RF receiver may be adjusted via the generated at least one control signal. The filter may be used for filtering the generated baseband frequency signal. A frequency response signal of the filter integrated within the single-chip multi-band RF receiver may be determined via a reference frequency signal. An attenuated reference frequency signal may be generated by attenuating the reference frequency signal. The attenuated reference frequency signal may be compared with the frequency response signal. The at least one control signal may be generated based on the comparison.

Abstract: An estimator of the throughput of a channel equalizer in a wireless receiver, wherein the estimator is dependent on a number of NACK messages transmitted by the receiver.

Abstract: A low-power receiver front-end includes a transconductance amplifier that produces a single-ended current signal in response to a single-ended voltage signal. An output of the transconductance amplifier is provided to an LC tuned circuit. At resonance, the LC tuned circuit generates a differential current signal in response to the single-ended current signal. Single-ended current signals corresponding to the resonant frequency of the LC tuned circuit are converted into differential signals. Further, the LC tuned circuit amplifies the differential current signals by an associated quality factor. Further, a mixer is coupled to an output of the LC tuned circuit. The mixer generates IF signals in response to the differential current signals.

Abstract: Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Abstract: Systems and methods are provided to facilitate the distribution of audio signals over wireless networks. In one implementation, an audio system includes a head end having an encoder and a wireless network interface. Audio signals associated with a plurality of audio channels are processed by the encoder to provide an encoded signal in accordance with an audio codec. The encoded signal can be provided to a wireless network by the wireless network interface as a plurality of data packets associated with a network address in accordance with a wireless networking protocol, such as an IEEE 802.11 protocol. One or more remote endpoints can also be provided to receive the data packets from the wireless network, assemble the data packets to obtain the encoded signal, and extract at least one of the audio signals from the encoded signal in accordance with the audio codec. Multicast and unicast implementations are also provided.

Abstract: A wireless receiver scan circuit (10) including a low-IF de-rotator (210) with signal band and image band outputs, and search circuitry (80, 200) operable to parallelize (100) a frequency-scanning search by determination of the presence and absence of a transmission in both the signal band and the image band. Other circuits, systems and processes are also disclosed.

Abstract: A technique for improving the linearity of a mixer is disclosed. A converter may include a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an input of the converter, and a second conducting terminal coupled to an output of the converter, and a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to receive a local-oscillator signal having a first phase and a second phase, drive the first MOSFET off during the first phase of the local-oscillator signal, drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal, and force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.

Abstract: Systems of clock generation for integrated radio frequency receiver. In an integrated radio frequency receiver, a mixer is often used to down convert the incoming radio frequency signal. The down converted signal is then digitized and digital signal processing circuitry is used for efficient and flexible implementation of various functions to receive the underlying audio and/or data information. The mixer requires clock generation circuitry to provide a proper local oscillator signal for a selected channel. On the other hand, the digital signal processing circuitry requires its separate digital clock for proper operations. The clock generation system utilizes single local oscillator generation circuitry to provide the local oscillator signals required by the mixer and the digital clock signals required by the digital signal processing circuitry.

Abstract: A receiver has an input amplifier (RFAMP) that comprises a signal-voltage amplifier (SVA) and a feedback path (FBP). The signal-voltage amplifier (SVA) provides a voltage gain (VG) from an input node (SESf) to an output node (SON). The voltage gain (VG) is controllable. The feedback path (FBP) provides a transadmittance (GM) from the output node (SON) to the input node (SIN). The transadmittance (GM) is controllable.

Abstract: A phase locked loop (PLL) a phase detector, a charge pump, a loop filter, a controlled oscillator, and a feedback divider. The phase detector is coupled to produce a difference signal based on a difference between phase of a reference oscillation and phase of a feedback oscillation. The charge pump is coupled to convert the difference signal into an up-signal or a down signal. The loop filter coupled to filter the up signal or the down signal to produce a control signal. The controlled oscillator is coupled to generate an output oscillation based on the control signal. The feedback divider is coupled to generate the feedback oscillation from the output oscillation based on a divider value. The loop filter includes a first resistor-capacitor circuit and a second resistor-capacitor circuit. The first resistor-capacitor circuit is calibrated using a first calibration technique and the second resistor-capacitor circuit is calibrated using a second calibration technique.

Abstract: Provided is an apparatus and method for eliminating an outband interference signal. An apparatus for eliminating an interference signal includes a first mixer, a filter unit, a second mixer, and an operation unit. The first mixer downconverts a received signal containing an outband interference signal. The filter unit extracts the downconverted outband interference signal from the downconverted received signal. The second mixer upconverts the downconverted outband interference signal to restore the outband interference signal to the original frequency band. The operation unit subtracts and eliminates the restored outband interference signal from the received signal.

Abstract: Data streams stored in buffers are modulated by modulation sections. Multipliers multiply the signals output from the modulation sections by weights output from a weight control section. The signals output from the multipliers are added up by addition sections, subjected to radio transmission processing by transmission radio sections and sent through antennas. A buffer control section controls the buffers based on a retransmission count output from a retransmission count detection section. The weight control section outputs weights different from weights at the time of previous transmission to the multipliers every time data is retransmitted. This allows a diversity gain at the time of data retransmission to be increased even if a time variation of the propagation path environment for radio signals is slow.

Abstract: Techniques for compensating for I-Q mismatch in a communications receiver. In an exemplary embodiment, incoming I and Q samples are adjusted by multiplying with certain compensation coefficients to generate mismatch-compensated I and Q samples. The compensation coefficients may themselves be calculated and iteratively refined from the mismatch-compensated I and Q samples. Further techniques for partitioning the adjustment and estimation functions among computational hardware are disclosed. In an exemplary embodiment, estimation may be restricted to only those segments of the incoming I and Q samples that fulfill certain conditions, e.g., segments of the incoming I and Q samples known to be statistically uncorrelated and/or to have equal average energy.

Abstract: A wireless LAN communication device is provided for making it possible to set beacons including DTIM information elements not to be synchronous in the case that the timing for generating the beacons including DTIM information elements is the same among access points, so that it is avoidable that only a terminal device under a specific access point among access points using the same channel is subjected to a delay and jitters, while anxiety about mutual interference of the terminal devices is removed in the case of broadcast and multicast service, so that a fair broadcast and multicast service can be received. In the device, a wireless LAN control unit (202) detects beacons of other stations received in a prescribed period of time before the transmission of its own station (200). A beacon analyzing unit (203) analyzes the beacons of the other stations and adjusts transmission intervals of its own DTIM beacon.

Abstract: Disclosed herein are systems and methods for recovering a sub-carrier signal from a multiplexed signal having an embedded pilot tone signal. The recovery system includes circuitry for recovering a pilot signal from the received multiplexed signal, for generating a frequency-doubled signal from the recovered pilot signal, and for phase-shifting the frequency-doubled signal by a pre-determined phase difference from the embedded pilot tone signal. Another recovery system includes circuitry for recovering a pilot signal from the received multiplexed signal, for phase-shifting the pilot signal by a pre-determined phase difference from the embedded pilot tone signal, and for generating a frequency-doubled signal from the phase-shifted signal.

Abstract: Process for computing an estimation of the frequency offset in a receiver for a UMTS communication network said receiver receives the signal transmitted by two antennas and including two Common Pilot CHannels (CPICH), said process involving the steps of separating the two signals by means of computation and computing the frequency offset on the base of the two separated signals

Abstract: In one embodiment, the present invention includes a single chip radio tuner, which may be adapted within an integrated circuit (IC). The tuner may be provided with a configurable front end to receive and process a radio frequency (RF) signal via a signal path. This configurable front end may be differently controlled depending on a particular radio implementation in which the tuner is adapted.

Abstract: A radio receiver comprises an input (14) for a modulated radio frequency signal, a frequency down converter (16) coupled to the input, the frequency down converter including quadrature mixers (32,34) for demodulating a received modulated radio frequency signal using a local oscillator signal. An analogue-to-digital converter (54, 56) is coupled to receive demodulated signals from the mixing means. The analogue-to-digital converter, which may comprise a continuous time sigma delta converter, has an input for a sampling clock frequency (f s). A voltage controlled oscillator (38) provides the local oscillator signal and supplies a frequency divider (60, 94) used to provide the sampling clock frequency.

Abstract: A directional coupler with a high coupling per unit area and small variations in characteristic at manufacturing capable of achieving a high directivity easily and an RF circuit module provided with the directional coupler are achieved. A main-line is provided on a front surface of a multi-layer substrate, a ground plane is provided on a back surface of the multi-layer substrate. On an inner layer immediately under the main-line, two lines in parallel with the main-line are provided, and one line is provided on a layer closer to the ground plane than the two lines. By connecting the two lines and the one line with vias, a sub-line with a shape of a winding of a loop is formed. In the sub-line, a main component of a vector vertically penetrating the loop is horizontal with respect to the ground plane.

Abstract: A mechanism is provided for constructing an oversampled waveform for a set of incoming signals received by a receiver. In one implementation, the oversampled waveform is constructed by way of cooperation between the receiver and a waveform construction mechanism (WCM). The receiver receives the incoming signals, samples a subset of the incoming signals at a time, stores the subsets of sample values into a set of registers, and subsequently provides the subsets of sample values to the WCM. The WCM in turn sorts through the subsets of sample values, organizes them into proper orders, and “stitches” them together to construct the oversampled waveform for the set of incoming signals. With proper cooperation between the receiver and the WCM, and with proper processing logic on the WCM, it is possible to construct the oversampled waveform for the incoming signals without requiring large amounts of resources on the receiver.

Abstract: A receiver for receiving RF-signals in a plurality of different communication bands, each communication band including a receive frequency range and a transmit frequency range includes a plurality of receiving ports, a plurality of input circuits, a first inductor and a second inductor. Each receiving port is configured to receive RF-signals in a receive frequency range of a communication band. Each input circuit is connected to an associated receiving port for processing RF-signals applied to the receiving port. The first inductor is connected to a first group of input circuits and the second inductor is connected to a second group of input circuits, wherein the first group of input circuits and the second group of input circuits are disjunct.

Abstract: The present invention provides a method of generating mutually orthogonal reference signals for different user terminals in and OFDM system that span different but overlapping subcarriers. The subcarriers allocated to the user terminals are divided into a plurality of non-overlapping subcarrier blocks. Each user terminal is then allocated one or more subcarrier blocks. For each subcarrier block, a user terminal is assigned a reference signal comprising a base reference sequence and a linear phase rotation. To ensure mutual orthogonality among all user terminals, user terminals allocated the same subcarrier block use the same base reference sequence with different linear phase rotations.

Abstract: A radio communication method includes deciding either a sending timing or a receiving timing; measuring a receiving electric intensity; comparing a stored value and the measured receiving electric intensity; and starting a sending operation when the measure receiving electric intensity is smaller than the stored value in the sending timing and starting a receiving operation when the measurement receiving electric intensity is greater than the stored value in the receiving timing.

Abstract: An access node receives a device beacon transmitted from a wireless communication device in accordance with a system timing of a wireless wide area network (WWAN). When transmitted within a WWAN uplink channel, the device beacon is mapped to designated beacon channels within the time-frequency space of the uplink WWAN channel assignment. In response to the reception of the device beacon, communications between the wireless communication device and the access node are established. In one example, the access node is a femtocell base station. In another example, the access node is a wireless local area network (WLAN) access point.

Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies, which is desirable.

Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands or in a multi-differential branch low noise amplifier wherein each of the differential branches possess a different set of gain and linearity characteristics for a signal operating at the same frequency. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies or gain and linearity characteristics, which is desirable.

Abstract: Radio frequency signals having a plurality of frequency ranges are received and coupled to a plurality of transmission lines, each of the plurality of transmission lines being formed in a corresponding plurality of generally parallel planes. Circuitry is formed for each of the plurality of transmission lines to define substantially low impedances for all of the plurality of frequency ranges except for a frequency range or ranges to be carried by the corresponding transmission line. Signals are coupled to the plurality of transmission lines so that signals with the plurality of frequency ranges are received and distributed with substantially decreased reflection and substantially high impedance matching by the plurality of transmission lines.

Abstract: There is provided a frequency control device that includes a frequency synchronizer to transform a radio signal to a baseband signal, a same signal correlator to obtain a first correlation value between a first signal in a first position in a first transmission symbol of the baseband signal and a second signal included in a second period, a different symbol correlator to obtain a second correlation value between a third signal included in a third period of the first transmission symbol and a fourth signal included in a fourth period, a frequency error estimator to estimate a frequency error added on the radio signal based on a phase rotation value of a difference value obtained by a subtraction of the second correlation value from the first correlation value, and a frequency corrector to correct the baseband signal to cancel the frequency error.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: A programmable antenna assembly includes a configurable antenna structure, a configurable antenna interface, and a control module. The configurable antenna structure includes a plurality of antenna elements that, in response to an antenna configuration signal, are configured elements into at least one antenna. The configurable antenna interface module is coupled to the at least one antenna and, based on an antenna interface control signal, provides at least one of an impedance matching circuit and a bandpass filter. The control module is coupled to generate the antenna configuration signal and the antenna interface control signal in accordance with a first frequency band and a second frequency band such that the at least one antenna facilitates at least one of transmitting and receiving a first RF signal within the first frequency band and facilitates at least one of transmitting and receiving a second RF signal within the second frequency band.

Abstract: [Problem] Problem is to discard erroneous data more surely, and to receive correct data more surely. [Means to solve the problem] A receiving apparatus to receive data by use of a second protocol data unit, which stores a plurality of first protocol data units of a first layer set for each of plural radio bearers and which is based on a second layer corresponding to a lower layer of the first layer, includes a providing means for providing the first protocol data unit, which is stored in the second protocol data unit with specific information specifying the second protocol data unit in the second layer and a discarding means for discarding. another first protocol data unit, which is stored in the second protocol data unit storing the erroneous first protocol data unit with reference to the specific information in the case that a predetermined first protocol data unit includes an error in the first layer.

Abstract: A configurable antenna assembly includes an antenna structure and a configurable antenna interface. The antenna structure is operable, in a first mode, to provide a first antenna structure and a second antenna structure, wherein the first antenna structure receives an inbound radio frequency (RF) signal and the second antenna structure transmits an outbound RF signal. The configurable antenna interface is operable in the first mode to provide a first antenna interface and a second antenna interface, wherein the first antenna interface is configured in accordance with a receive adjust signal to adjust at least one of phase and amplitude of the inbound RF signal, and wherein the second antenna interface is configured in accordance with a transmit adjust signal to adjust at least one of phase and amplitude of the outbound RF signal.

Abstract: A wireless receiving circuit having an analog-digital converter of digital calibration type constituted by plural analog-digital converter units, shares portions about digital calibration, and applies the result of calibration of one analog-digital converter unit to other analog-digital converter units to appropriately perform each digital calibration of the plural analog-digital converter units. For example, in a wireless receiving circuit having an analog-digital converter of digital calibration type constituted of an analog-digital converter unit of I side and an analog-digital converter unit of Q side, portions about digital calibration are shared, and a calibration result of I side is applied to Q side.

Abstract: A direct conversion radio frequency (RF) tuner includes a mixer generating I and Q quadrature components. A phase detection circuit generates a phase error measurement between the I quadrature component and the Q quadrature component. A phase correction circuit corrects a phase of the Q component based on the phase error measurement, and outputs a phase-corrected Q quadrature component. An I quadrature component gain control circuit receives the I quadrature component and outputting an amplitude corrected I quadrature component. A Q quadrature component gain control circuit receives the phase corrected Q quadrature component and outputs an amplitude corrected Q quadrature component.

Abstract: Mixer circuits (1) comprise mixers (2) for receiving input signals and oscillation signals and for outputting output signals. By providing the mixers (2) with loads (3) having adjustable load values and by introducing adjustors (4) for adjusting and sweeping the loads (3), which adjusted loads (3) have different load values at different moments in time, and by introducing detectors (5) for detecting components such as second order intermodulation products of the output signal per load value and selectors (6) for selecting detection results and for instructing the adjustors (4) to set the loads (3) in response to the selected detection result, the mixer (2) is calibrated. The detectors (5) comprise filtering circuitry (52) for filtering the components and comprising slope detection circuitry (53) and the electors (6) comprise comparison circuitry (61) for comparing slope values with each other for finding an extreme slope value that defines the detection result to be selected.

Abstract: A timing skew estimation system is disclosed that includes a plurality of interleaved analog-to-digital converter circuits (ADCs), a timing mismatch estimation unit, and a correction unit. The timing mismatch estimation unit calculates a correlation between each of the plurality of ADCs. Then the timing mismatch estimation unit calculates a cost function for each of the plurality of ADCs, except the reference ADC. The timing mismatch estimation unit further calculates a gradient for each of the plurality of ADCs, except the reference ADC.

Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired using a first known signal associated with a first signal band during a startup mode. The first image correction factor has a plurality of bits including most significant bits (MSBs) and least significant bits (LSBs). The LSBs of the first image correction factor are adjusted incrementally during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received using the first image correction factor during the normal operation mode.

Abstract: A radio frequency transceiver (102), including a transmitter (104), a duplexer (108) and a direct-conversion receiver (106) including a mixer (140 and 141). An IIP2 calibration system (170), coupled to the transceiver, includes an IIP2 coefficient estimator (172) for calculating an estimate of second-order distortion intermodulation distortion, and an IIP2 controller (174) for adjusting an IIP2 tuning port of the mixer in the receiver to minimize second-order distortion intermodulation distortion in the receiver that may be caused by the receiver receiving a transmit RF signal leaking through the duplexer.

Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.

Abstract: A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascade arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.

Abstract: A DC offset of a VGA is measured by selecting a ground contact of a switch. Then, the gain of the VGA is set at an appropriate value, monitoring contacts of the switch are successively selected, and the output values of an ADC for the respective cases are measured with the input to a DAC set at zero. Then, the DC offset of the VGA is removed, the DC offset value of each circuit block, such as DAC, in a transmitting part is calculated, and parameters are set so that the DC offset value of each circuit block is minimized.

Abstract: Aspects of the present disclosure are directed toward a system in which a three-dimensional low-frequency (3D-LF) antenna and a high frequency (HF) antenna are used. The 3D-LF antenna includes three coils each oriented relative to X, Y and Z axes that define a Cartesian coordinate system for a three-dimensional space. The HF antenna is oriented along one of the axes of the LF coils and in the same antenna package as the 3D-LF antenna. The 3D-LF antenna is configured to be used in connection with an LF signal of between 3 kHz and 300 kHz. The HF antenna is configured to be used in connection with an HF signal between 3 MHz and 30 MHz.

Abstract: A wireless signal conversion system includes a conversion output apparatus and at least one conversion input apparatus. The conversion output apparatus receives a wireless signal via an antenna, and feeds signal data carried by the wireless signal into a power line. The conversion input apparatus retrieves the signal data from the power line and then provides the signal data to an electronic device.

Abstract: A multi-chip antenna diversity architecture includes a first receiver chip including a first tuner, and a first demodulator directly connected to the tuner. The first demodulator demodulates the first input signal received from the first tuner. A first power sequencer that controls the first receiver chip, and a first chip ID including a voltage source VSS that indicates the first receiver chip as a slave chip. A second receiver chip includes a second tuner, and a second demodulator directly connected to the second tuner. The second demodulator demodulates the second input signal received from the second tuner. A second diversity combiner directly connected to the second demodulator. A second chip ID includes a voltage source VDD that indicates the second receiver chip as a master chip. A Diversity State Machine (DSM) controls an operating state of the first receiver chip and the second receiver chip that are structurally identical.

Abstract: A source signal is converted into a time-variant temperature field with transduction into mechanical motion. In one embodiment, the conversion of a source signal into the time-variant temperature field is provided by utilizing a micro-fabricated fast response, bolometer-type radio frequency power meter. A resonant-type micromechanical thermal actuator may be utilized for temperature read-out and demodulation.

Abstract: A method of detecting a carrier signal includes generating a first signal that represents a strength of a received signal. A variable threshold signal is generated based on the first signal. A fixed threshold signal is generated. The method includes detecting whether a carrier signal is present in the received signal based on a comparison of the first signal with a sum of the variable threshold signal and the fixed threshold signal.

Abstract: A feed-forward device is provided for a mixer including a diplexer having a radio frequency port, an intermediate frequency port, and a common port; and a mixing circuit receiving an in-phase local oscillator signal and an out-of-phase local oscillator signal and having an output coupled to the common port of the diplexer. The feed-forward device includes: a first signal sampler having an input adapted to sample the in-phase local oscillator signal and to output a sampled in-phase local oscillator signal; a second signal sampler having an input adapted to sample the out-of-phase local oscillator signal and to output a sampled out-of-phase local oscillator signal; and an arrangement for coupling the sampled in-phase local oscillator signal and the sampled out-of-phase local oscillator signal to the common port of the diplexer.

Abstract: In a receiving circuit 44 for receiving an electromagnetic wave signal, a frequency converter/detector circuit 100 comprises a local oscillator 131 for generating an oscillation signal, plural mixers 133, 134 for mixing the received electromagnetic wave signal with the oscillation signal to generate intermediate frequency signals having different phases, and a signal generating/synthesizing circuit 140 for generating based on the intermediate frequency signals generated by the mixers other intermediate frequency signals which are different in phase from the original intermediate frequency signals, for detecting the intermediate frequency signals and other intermediate frequency signal, and for adding the detected signals together to generate a synthesized signal.

Abstract: The present invention provides a semiconductor integrated circuit including an active mixer circuit that is operated at low voltage, low noise, and low power consumption. It includes a transconductance amplifier, a transformer, and a multiplier, connects a transformer between the transconductance amplifier and the multiplier, and separates between the transconductance amplifier and the multiplier with respect to direct current inside the transformer. Further, each of the tranconductance amplifier and the multiplier is configured of transistors that are single-stacked between the supply voltage terminal and ground terminal.