Abstract: A distributed storage resource management in a hyper converged infrastructure is created. The system accesses a virtualized infrastructure comprising a plurality of host machines, each of said plurality of host machines having resources, the resources comprising: a central processing unit (CPU), a memory, and a storage, each of the plurality of host machines communicatively coupled with one or more virtual machines. The resources in each of the host machines are disaggregated. The resources are aggregated based on a nature of the resource into a common pool of shared resources. A request is received for a workload application having a resource requirement. The resource requirement of the workload application is matched with resources in the common pool of shared resources. The matched resources in the common pool of shared resources are assigned to the workload application.

Abstract: A hammer system and method thereof for monitoring an organization platform to detect system level problems of one or more applications. The hammer system may include a hammer device, an enhanced trunk group poller, and a client-specific application hammer. The client-specific application hammer may be structured as a simulator that is operable to periodically place calls into the organization platform and emulate real call scenarios. The simulator may include D-channel polling logic.

Abstract: There is described a method of managing a flow of data packets in a multiple-processing entity system comprising a plurality of look-up tables adapted to store information associated to actions to be performed on packets received by the system. The method comprises storing, on a per entry basis, in a shadowed entry associated to any table entry being updated, the previous content of said table entry being updated, in association with a table entry version number, for use for managing packets received in the system prior to any update operation. It is thus possible to continue using look-up tables while updating process is being carried out for some or all of the table entries. The solution provides benefits for systems that are limited in space and cost, by use of minimal memory thanks to the storing of small shadowed data instead of full shadowed table.

Abstract: Systems and techniques for network on a chip based computer architectures and distributing data without shared pointers therein are described. A described system includes computing resources; and a memory resource configured to maintain a dedicated memory region of the memory resource for distributed read operations requested by the computing resources. The computing resources can generate a packet to fetch data from the dedicated memory region without using memory addresses of respective data elements. The memory resource can receive the first packet, determine whether the first packet indicates the distributed read operation, and determine that the dedicated memory region is non-empty. Further, the memory resource can fetch one or more data elements from the dedicated memory region based on the first packet indicating the distributed read operation and the dedicated memory region being non-empty, and send a packet that includes the one or more fetched data elements.

Abstract: The apparatus comprises a plurality of interfaces, each interface having an associated interface ID; and a hardware-side processing device including at least one programmable hardware-implemented chip configured to process request packets, which are received from host computers and relate to access requests to one or more file system managed by the apparatus, and to generate response packets for the processed request packets; wherein, for a request packet which is received from a first host computer, at least one programmable hardware-implemented chip is configured to: determine the client ID being associated with the first host computer, determine the interface ID being associated with the first interface, determine whether the determined client ID and interface ID represent a permitted ID set or a prohibited ID set, and refrain from processing the received request packet if the determined client ID and interface ID represent a prohibited ID set.

Abstract: Provided herein is a semiconductor memory device. The semiconductor memory device includes: a memory cell array including a plurality of memory blocks; a voltage generation circuit configured to generate a plurality of operating voltages; a decoder circuit configured to transmit the plurality of operating voltages to the memory cell array in response to a serial data signal that is sequentially inputted; and a control logic configured to generate the data signal, internal address signals and an internal clock signal in response to a command.

Abstract: Systems and methods for using general software to control an internet of things (IOT) system with a virtual baseboard management controller (BMC). The system includes a cloud network server provided on a cloud network. When the cloud network server receive a gateway registration request from an IOT gateway device communicatively connected to multiple IOT devices, the cloud network server provides a virtual BMC, and registers the IOT gateway device to the virtual BMC. The virtual BMC may then allow an IOT software to register to the virtual BMC, thus enabling the IOT software to access the IOT gateway device and the IOT devices via the virtual BMC. The virtual BMC may send information to the IOT gateway device registered to the virtual BMC by a push technology. The IOT gateway device and the IOT software may respectively communicate with the virtual BMC using Intelligent Platform Management Interface (IPMI) messages.

Abstract: A multivolume management method, executed by a computer, includes storing a dataset over a plurality of media storage devices, wherein the plurality of media storage devices has a corresponding plurality of physical identifiers, generating a conversion table that assigns the plurality of physical identifiers to a corresponding plurality of sequentially ordered virtual identifiers, wherein each physical identifier is uniquely assigned to one virtual identifier, receiving a request for the dataset, wherein the request references the plurality of sequentially ordered virtual identifiers, in response to receiving the request, generating a response comprising an ordered list of physical identifiers using the conversion table, and responding to the request with the response. A computer system and computer program product corresponding to the above method are also disclosed herein.

Abstract: Techniques described herein include determining, maintaining, and applying compound service performance metrics, based on data metrics from a plurality of different services. Service-specific data metrics may be received from a plurality of different communication services offered by a service provider, for example, Internet service, voice service, video service, SMS service, etc. Different combinations, relationships, and weighting factors for the data metrics may be defined and stored for each compound performance metric. Compound performance metrics may be defined, including for example, compound customer sentiment metrics, compound customer value metrics, and/or compound customer resource usage metrics. In some cases, machine-learning and/or analytics may be performed using service-specific data metrics and corresponding customer actions, in order to determine correlations between particular combinations of data metrics and customer actions.

Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor and an access controller communicatively coupled to the processor. The access controller may be configured to, when locally coupled to a second information handling system determine if the second information handling system is authorized to perform virtual crash cart operations on the information handling system and, responsive to determining that the second information handling system is authorized to perform virtual crash cart operations on the information handling system, permit the second information handling system to perform virtual crash cart operations on the information handling system whereby the second information handling system implements one or more virtual information handling resources such that each virtual information handling resource behaves at least in part as a physical information handling resource present at the information handling system.

Abstract: It is provided to implement a different number of logical slaves in a field device for use in an AS interface network as a function of the assigned address, which slaves may be addressed using the assigned address in the standard or in the expanded addressing mode. Thus, in a field device, it is possible to provide slaves having different profiles, via which different data types may be exchanged. Furthermore, a method is provided, with which a field device having different slaves is able to be addressed in a simple manner while avoiding double addressing.

Abstract: Implementations disclosed herein include a method comprising detecting a workload request from a host, estimating a media cache fill-up rate based on the detected workload request, estimating a current media cache usage, predicting, based on the detected workload request, the estimated media cache fill-up rate and the estimated current media cache usage, a workload profile, and determining a preemptive media cache cleaning strategy based on the predicted workload profile.

Abstract: An electronic apparatus and a method for expanding a storage capacity of the electronic apparatus are provided. In the method, at least one storage equipment on a network is searched and logged in by using a network interface. A virtual disk is established and a volume of at least one disk in each storage equipment is attached to the virtual disk as a physical volume of the electronic apparatus. The physical volume is transformed into a logical volume and a file system of the logical volume is established for providing the electronic device to access the logical volume.

Abstract: Technologies for identifying data stored on a solid state drive (“SSD”) device that correspond to data associated with a delete event, and marking the deleted data stored on the SSD as invalid such that the SSD can avoid unnecessary operations on the invalid data. Included are interfaces operable to communicate invalid data information and providing a remove-on-delete command that provides invalid data information sufficient to identify the SSD data to be marked as invalid.

Abstract: In one embodiment, a method includes receiving, at a server from a client, a first request for a dialog and particular parameters associated with the first request; invoking a method of a class in a server-side library comprising server-side code, wherein the method corresponds to a dialog type of the requested dialog; generating, based on the invoked method, a first dialog code configured to implement functionalities supported by the requested dialog; sending, to the client, the first dialog code for execution to cause the dialog to be displayed; receiving a second request sent from the client in response to a specific user interaction with a component of the displayed dialog, wherein the second request is a modified version of the first request that comprises additional parameters corresponding to the specific user interaction; and sending, to the client, a second dialog code based on the additional parameters.

Abstract: A communication and security device for a portable computer having an interface for connecting the security device to a host device to enable the security device to control encryption and decryption of data communication between a processor of the host device and a data storage of the host device. Examples include a security device with data storage for storing an encryption key for the encryption and decryption of the data communication, a security processor coupled to the interface and to the data storage for controlling the data communication by use of the encryption key, and a wide area communication interface configured for secure communication with a remote device. The security processor may be configured to control the data communication between the processor of the host device and the data storage of the host device based on the secure communication.

Abstract: An information handling system for enhanced system management mode (SMM) security may include a processor, system management random access memory (SMRAM), persistent memory, and basic input/output (BIOS) memory. The system may include instructions that, when loaded and executed by the processor, cause the processor to initialize the memory, initialize the BIOS memory, initialize the persistent memory, and check whether the system has previously executed a power-on self test (POST) routine. Based on a determination that the system has not previously executed a POST routine, the processor may unzip the SMM Code located in the BIOS memory store the unzipped SMM Code in the persistent memory and in the SMRAM. Based on a determination that the system has previously executed a POST routine, the processor may create a duplicate copy of the SMM Code from the persistent memory and store the duplicate copy in the SMRAM.

Abstract: A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.

Abstract: An interface emulator for an IC is disclosed. An interface emulator includes a first first-in, first-out memory (FIFO) and a second FIFO. The first FIFO is coupled to receive data from an access port and a second FIFO coupled to receive data from at least one functional unit in the IC. The access port may be coupled to a device that is external to the IC. The external device may write information into the first FIFO, and this information may subsequently be read by a functional unit in the IC. Similarly, the functional unit may write information into the second FIFO, with the external device subsequently reading the information. Information may be written into the FIFOs in accordance with a predefined protocol. Thus, a particular type of interface may be emulated even though the physical connection and supporting circuitry for that interface is not otherwise implemented in the IC.

Abstract: In accordance with an embodiment, described herein is a system and method for testing and certification of media devices for use within a connected media environment. A testing device includes an input mechanism, for example a microphone, and a plurality of test files. Each test file can be used to produce a characteristic signal, for example an audio track having a particular frequency. The testing device emulates a gateway between a media device under test, such as an audio speaker, and a media server. Test scripts can be used to mimic commands to play or otherwise access media content at the device under test. Playback of a particular test file can be detected and recognized according to the characteristic signal produced by that test file. Resultant test information can be used to evaluate the performance and/or certify operation of the media device within the connected media environment.

Abstract: A method of using flash memories having an electrically erasable programmable read-only memory emulation in a microcontroller, includes: dividing information to be stored in a computer memory into a first piece of information having executable code, and a second piece of information having non-executable code. If a free storage capacity of a first memory is sufficiently large to receive the first piece of information storing the first piece of information in the first memory. If a free storage capacity of a second memory is sufficiently large to receive the second piece of information, storing the second piece of information in the second memory.

Abstract: A system, method, and computer-readable medium for the calculation of execution time estimates of user defined functions/user defined methods are provided. The execution of a UDF or UDM is timed several times at the time of the UDF/UDM creation, and an average execution time of the UDF/UDM is obtained. The resulting average execution time is then stored in a data dictionary where the optimizer may consult this value to factor it into the cost of execution of a query.

Abstract: A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.

Abstract: Implementing a database system using a plurality of sequentially ordered drives to store sequential portions of columns of the database, but where the database system is usable by a system configured for use with in-memory database systems. The method includes loading one or more columns of a database into main memory of a computing system as a table based database. The method further includes dividing a column of the database into sequential portions. Each of the sequential portions is of sufficient size to create efficient transfers using hard disk controllers to transfer an entire sequential portion. The method further includes writing each of the sequential portions sequentially onto sequentially ordered drives in a round robin fashion such that sequential portions of the column are on sequential drives.

Abstract: Systems and methods of emulating application-specific integrated circuits using multiple execution phases, where different inputs and outputs are used or produced by components of the emulation system are disclosed. For example, an OMUX may select and transmit different data over a serial bus based on the execution phase of the emulator system. In another example, a processor or cluster may capture outputted data during a first execution phase, execute instructions for a second execution phase, and then return to the capture outputted data for further processing during a next cycle of the first execution phase.

Abstract: Input signals, received by a primary computer, are emulated to a guest computer. For example, an input redirection component is connected between the primary computer and the guest computer. The primary computer may be communicatively connected to an input device (e.g., a touch display, a keyboard, etc.). The guest computer may not, however, be communicatively connected to the input device, and thus may be unaware of input signals from the input device. Accordingly, the input redirection component may receive, from the primary computer, a message regarding an input signal from the input device. The input redirection component may emulate the input device (e.g., connect to the guest computer as though the input redirection component is the input device), and may provide an emulated input signal, emulating the input signal, to the guest computer (e.g., the input signal, received by the primary computer, may be used to control the guest computer).

Abstract: A system and method for digitally signing an object. An object signing agent sends a signing request for an object to remote signing server, which, in response to receiving the request, generates a virtual machine executing code for signing the object. The object is signed within the virtual machine and returned to the object signing agent.

Abstract: A method for redirecting I/O (Input/Output) sequences. A computer platform is initialized. If the computer platform is enabled for command packet rerouting, the platform firmware may be used to install a runtime enable block I/O interface and a standard UNDI (Universal Network Device Interface) interface for routing I/O requests to a network controller or an out-of-band processor may be used to route I/O requests to a network interface controller. The routing of the I/O requests to the network controller or network interface controller enables the computer platform to boot from a remote block I/O storage device.

Abstract: The current document is directed to methods and subsystems for communication between virtualization layers and guest operating systems. A hardware baseboard management controller (“BMC”) provides an out-of-band communications link and management interface to a computer system that can be accessed by a system administrator through a remote console. A virtualization layer may provide a virtualized BMC (“vBMC”) that provides a data-and-command-exchange medium between a guest operating system and the virtualization layer. The virtualization layer may transmit commands, query status and configuration information, and transfer data through this data-and-command-exchange medium to the guest operating system.

Abstract: A riser card includes a main body and an inserting portion. The main body includes a lower portion and defines a power supply interface. The inserting portion is coupled to the lower portion of the main body. The inserting portion can be inserted in and coupled to different expansion slots. The power supply interface can be coupled to an external power source to supply power to the riser card.

Abstract: A universal serial bus stack may use an emulation layer to grant a non-universal serial bus device access to universal serial bus drivers and applications. The universal serial bus stack may exchange a device communication at an emulation layer. The universal serial bus stack may translate between a universal serial bus communication and the device communication at the emulation layer, and then may exchange the universal serial bus communication at a universal serial bus client interface.

Abstract: A data storage service distributes a plurality of data fragments corresponding to a data object among one or more data storage host groupings in a manner that avoids a possibility of correlated loss of multiple data fragments by consolidation of data of a data storage host grouping onto a single data storage host. The data storage service selects a data storage host grouping and determines an amount of used capacity for the selected data storage host grouping. If the selected grouping satisfies an emptiness threshold, the data storage service selects a data storage host from the grouping and consolidates one or more data sets of the grouping onto the selected data storage host. Subsequently, the data storage service updates metadata for each data storage host of the selected data storage host grouping to specify a location of data stored therein.

Abstract: Rolling back data on tape in a file system is provided. A management tape is prepared. The management tape has only index files recorded thereon. The index files contain information about start positions and lengths of corresponding data files recorded on normal tapes. The index files further contain identification information for the normal tapes. A first index file of the management tape is read. The first index file is related to a data file to be rolled back. The first index file is read out from the management tape mounted on a first tape drive. The data file to be rolled back is read out of a first normal tape. The first normal tape is identified based on information in the first index file. The first normal tape is mounted on a second tape drive.

Abstract: A method of mapping a volume of storage to a plurality of pools of storage devices specified by a host having a host identification. The volume of data storage has a volume identification and a plurality of extents. The method includes assigning a first pool of storage devices to the volume of storage based on the host identification, and determining a mapping value based on the host identification and the volume identification for the first pool of storage devices. The method also includes determining a storage device index based on the mapping value and one or more extents in the plurality of extents, and mapping a portion of the extents to the first pool of storage devices based on the storage device index.

Abstract: Systems and methods for implementing a user mode virtual serial communications port emulator are disclosed herein. According to an aspect, a method for a virtual serial communications port emulator includes using at least one processor and memory for creating a virtual serial communication port (VCP) driver in a user mode of an operating system. The method further includes emulating a physical serial communication port using the VCP driver. In addition, the method includes converting outgoing data from an application executed on the at least one processor and memory via the VCP driver into a format complying with a protocol associated with a VCP device server. The method also includes converting incoming data from the VCP device server complying with the protocol into a second format understood by the application, wherein the VCP driver is communicated with using an unpublished universally unique identifier (UUID).

Abstract: In some embodiments, a register file circuit design process includes instructing an automated integrated circuit design program to generate a register file circuit design, including providing a cell circuit design and instructing the automated integrated circuit design program to generate a selection design, a pre-decode design, and a data gating design. The cell circuit design describes a plurality of selection circuits that have a particular arrangement. The selection design describes a plurality of replica circuits that include respective pluralities of selection circuits having the particular arrangement. The pre-decode design describes a pre-decode circuit configured to identify a plurality of entries identified by a portion of a write instruction. The data gating design describes data gating circuits configured, in response to the pre-decode circuit not identifying respective entries, to disable data inputs to respective write selection circuits connected to the respective entries.

Abstract: It is provided to implement a different number of logical slaves in a field device for use in an AS interface network as a function of the assigned address, which slaves may be addressed using the assigned address in the standard or in the expanded addressing mode. Thus, in a field device, it is possible to provide slaves having different profiles, via which different data types may be exchanged. Furthermore, a method is provided, with which a field device having different slaves is able to be addressed in a simple manner while avoiding double addressing.

Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.

Abstract: Methods and apparatus for activating a purchased or previously deployed device by a subscriber. In one embodiment, activation includes authenticating the device to a service provider or carrier, and providing the device with data necessary for enabling the service to the device. In one variant, a user device is activated at a retail store, with the assistance of a carrier representative. In another variant, user equipment is activated via a communications network without the assistance of a representative. In yet another variant, the user equipment is activated via the Internet without the assistance of a representative. The provision of access data includes pre-assigning eSIM from a population of unassigned eSIMs to certain devices for various carrier networks. Alternatively, the eSIM may be assigned on an as-needed basis. Unassigned and/or unused eSIMs can be released (or sold back to the vendor) and/or reused. Solutions for eSIM backup and restoration are also described.

Abstract: An interface emulator for an IC is disclosed. An interface emulator includes a first first-in, first-out memory (FIFO) and a second FIFO. The first FIFO is coupled to receive data from an access port and a second FIFO coupled to receive data from at least one functional unit in the IC. The access port may be coupled to a device that is external to the IC. The external device may write information into the first FIFO, and this information may subsequently be read by a functional unit in the IC. Similarly, the functional unit may write information into the second FIFO, with the external device subsequently reading the information. Information may be written into the FIFOs in accordance with a predefined protocol. Thus, a particular type of interface may be emulated even though the physical connection and supporting circuitry for that interface is not otherwise implemented in the IC.

Abstract: A solid state disk controller apparatus comprises a first port; a second port having a plurality of channels; a central processing unit connected to a CPU bus; a buffer memory configured to store data to be transferred from the second port to the first port and from the first port to the second port; a buffer controller/arbiter block connected to the CPU bus and configured to control read and write operations of the buffer memory based on a control of the central processing unit; a first data transfer block connected between the first port and the buffer controller/arbiter block and configured to transfer data to be stored/read in/from the buffer memory bypassing the CPU bus; and a second data transfer block connected between the second port and the buffer controller/arbiter block and configured to transfer data to be stored/read in/from the buffer memory bypassing the CPU bus.

Abstract: A configuration arrangement includes a first interface configured to receive configuration information from a master configuration function and a second interface configured to provide at least one output to one or more entities to be configured. Configuration circuitry operates responsive to the configuration information to provide the at least one output, wherein that output controls the configuration of the one or more entities.

Abstract: A semiconductor device includes a memory region suitable for providing a plurality of read data in parallel at every read operation cycle, an output path suitable for outputting the plurality of read data at a set time in response to an internal clock and one or more internal control signals at the every read operation cycle, and an output path control unit suitable for generating the internal control signal in response to a read command and generating the internal clock in response to a system clock, wherein a shifting time of a first edge of the internal clock is adjusted by a set level at the every read operation cycle during a test mode.

Abstract: Systems and methods for reconfiguration of a hardened intellectual property (IP) block in an integrated circuit (IC) device are provided. Reconfiguration of the hardened IP block in the IC device may transition between functions supported by the hardened IP block. A transition may occur as a pre-configured profile is selected to reconfigure the hardened IP block. Further, configuration data associated with each of the pre-configured profiles of the hardened IP block may be generated and storage space to store the configuration data may be created. Additionally, reconfiguration control logic to read and implement the configuration data in hard IP design primitives may also be generated.

Abstract: In accordance with an embodiment, described herein is a system and method for testing and certification of media devices for use within a connected media environment. A testing device includes an input mechanism, for example a microphone, and a plurality of test files. Each test file can be used to produce a characteristic signal, for example an audio track having a particular frequency. The testing device emulates a gateway between a media device under test, such as an audio speaker, and a media server. Test scripts can be used to mimic commands to play or otherwise access media content at the device under test. Playback of a particular test file can be detected and recognized according to the characteristic signal produced by that test file. Resultant test information can be used to evaluate the performance and/or certify operation of the media device within the connected media environment.

Abstract: A system for annotating words of a data corpus based upon their particular concept and their corresponding grammatical sense with Conceptual Numerical Identifiers (CNIs) from a Conceptual Dictionary, pairing the words based on conceptual inter-relating network (CIRN) rules, and determining if a selected plurality of paired words are grammatically, syntactically, and linguistically correct by matching CNIs from each pair of words.

Abstract: A semiconductor system includes a first semiconductor device configured to output command addresses; and a second semiconductor device configured to generate a first control signal including a pulse controlled in its pulse width in synchronization with a toggling time of a bank active signal for selecting a bank to be activated in an active operation in response to the command addresses, a second control signal enabled in response to the bank active signal, and an internal voltage in response to the first and second control signals.

Abstract: An emergency call in an all Internet Protocol (IP) network having GPRS access is able to be completed without a valid SIM. A valid Subscriber Identity Module is substituted for the missing or invalid SIM only when an emergency call is attempted. The emergency call is either sent via an IMSI from an embedded SIM provided by the UE making the emergency call, or the emergency call is modified with an IMSI substituted by an Emergency SIM Pool Function prior to being sent to the HLR for validation. The SIM is valid for the UE's emergency call so the emergency call is completed because the UE is considered validated by the network.

Abstract: The present disclosure discloses a resource optimization method and apparatus. The method includes: detecting whether a currently started process is a process of a predetermined type; querying for suspendable processes among other currently running processes if it is detected that the currently started process is a process of the predetermined type; and suspending at least one process among the found suspendable processes.

Abstract: A data storage device includes one or more non-volatile, blockwise erasable data storage media and a mechanism for sanitizing the media in response to a single external stimulus or in response to a predetermined physical or logical condition. Optionally, only part of the media is sanitized, at a granularity finer than the blocks of the medium. Setting a flag in an auxiliary nonvolatile memory enables an interrupted sanitize to be detected and restarted. Optionally, a “death certificate” verifying the sanitizing is issued. Preferably, the media are configured in a manner that allows atomic operations of the sanitizing to be effected in parallel.