Of Peripheral Device Patents (Class 703/24)
  • Patent number: 8738335
    Abstract: Any primitive cells or blocks can be represented physically by a Barycenter compact model, and any black box model can also be physically represented by a Barycenter compact model physically. A hierarchical boundary condition between blocks is formulated by the Barycenter model or Barycenter compact model. Hierarchical boundary condition problems between blocks can be limited within two levels only if using the Barycenter model or Barycenter compact model.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: May 27, 2014
    Assignee: WorldWide Pro Ltd.
    Inventor: William Wai Yan Ho
  • Patent number: 8731897
    Abstract: A data protection and storage system includes an array of disk drives for data storage. Data is received for storage on the disk drive via an interface that is configured to emulate a tape drive interface. A virtual tape data structure is created and stored on the disk drives. The allocated capacity of the virtual tape is dynamically and transparently alterable in response to data storage demand within the virtual tape.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: May 20, 2014
    Assignee: Overland Storage, Inc.
    Inventors: John E. Matze, Michael H. Reider, Kenneth David Geist, Daniel Morgan Davies
  • Patent number: 8731898
    Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: May 20, 2014
    Assignee: Microsoft Corporation
    Inventor: Georgios Chrysanthakopoulos
  • Patent number: 8731896
    Abstract: A virtual testbed for system verification test is provided in which emulated responses are associated with certain steps of a system verification test. The emulated responses can be manually entered or populated with previous test results obtained from execution of the emulation-enabled steps on a real testbed. When the emulation-enabled steps are executed, the system verification test uses the emulated responses as the responses corresponding to the actions of the emulation-enabled steps as if the steps were executed on the real testbed, without actually executing the emulation-enabled steps on the real testbed. Therefore, the virtual testbed of the present invention allows development of test scripts for system verification test without constant, actual access to the real testbed.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: May 20, 2014
    Assignee: Spirent Communications, Inc.
    Inventors: Paul Kingston Duffie, Pawan Kumar Singh, Adam James Bovill, Rory Stephen Latchem
  • Publication number: 20140129206
    Abstract: A simulating method for a flash memory and a simulator using the simulating method are provided. The simulator is configured to couple to a memory controller. The simulating method includes: setting a predetermined response condition; providing multiple command sets, wherein each of the command sets corresponds to a memory type; receiving a first command from the memory controller; identifying a second command in the command sets according to the first command; determining if the second command matches the predetermined response condition; obtaining a first signal corresponding to the second command according to the predetermined response condition; and, transmitting the first signal to the memory controller. Accordingly, the usage of the simulator is flexible.
    Type: Application
    Filed: December 20, 2012
    Publication date: May 8, 2014
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Kuo-Yi Cheng, Yi-Hong Huang, Huang-Heng Cheng
  • Patent number: 8719548
    Abstract: A method (and structure) of mapping a memory addressing of a multiprocessing system when it is emulated using a virtual memory addressing of another multiprocessing system includes accessing a local lookaside table (LLT) on a target processor with a target virtual memory address. Whether there is a “miss” in the LLT is determined and, with the miss determined in the LLT, a lock for a global page table is obtained.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: May 6, 2014
    Assignee: International Business Machines Corporation
    Inventors: Erik Richter Altman, Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener, Sumeda Wasudeo Sathaye
  • Patent number: 8683543
    Abstract: A virtual set-top box (vSTB) for executing a middleware component, designed originally for use with the physical STB, including emulating hardware capabilities of the physical STB to process IPTV content received over a connection for presenting the IPTV content on a display of the electronic device.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: March 25, 2014
    Assignee: DISH Digital L.L.C.
    Inventors: Geraint Jenkin, Marcus C. Liassides, Jayne L. Gilmour, Christopher G. Hooks, David F. Evans
  • Patent number: 8676560
    Abstract: In a normal operation, a physical unit simulator is allowed to speculatively perform high-speed continuous execution. Only when an actual input comes in, a speculative input and the actual input are compared with each other. Thereafter, in response to inconsistency between the inputs, the physical unit simulator is returned to a point closest to the point of the actual input and is allowed to execute a variable step module to reach the point of the actual input. Upon arrival at the point of the actual input, the simulator is shifted back to the high-speed continuous execution from there. Thus, a processing speed of the simulator can be significantly improved.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Koichi Kajitani, Hideaki Komatsu, Shuichi Shimizu
  • Patent number: 8670972
    Abstract: An apparatus and method apparatus and/or computer software to automate testing of a voice self service platform. In its software embodiment, the present invention comprises software that runs on the windows platform to simulate all the components of an Interactive Voice Recognition Unit (VRU). In addition this embodiment can also be used as a helper unit to test individual components of an interactive voice recognition (IVR).
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: March 11, 2014
    Assignee: West Corporation
    Inventors: Mahendra Varman, Mahmood S. Akhwand
  • Patent number: 8656189
    Abstract: Systems and methods are provided for transmitting data for secure storage. For each of two or more data sets, a plurality of shares are generated containing a distribution of data from an encrypted version of the data set. The shares are then stored in a shared memory device, wherein a data set may be reconstructed from a threshold number of the associated plurality of shares using an associated key. Also provided are systems and methods for providing access to secured data. A plurality of shares containing a distribution of data from an encrypted version of a data set are stored in a memory device. A client is provided with a virtual machine that indicates the plurality of shares, and the capability to reconstruct the data set from the plurality of shares using an associated key.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: February 18, 2014
    Assignee: Security First Corp.
    Inventors: Rick L. Orsini, Mark S. O'Hare, Matt Staker
  • Patent number: 8656236
    Abstract: Techniques related to remotely boundary scanning of an integrated circuit embedded in a target computing system are disclosed herein. In an example, a host computing system includes a first peripheral port and a second peripheral port. A port-to-port boundary scan assembly is to interface boundary scan data between the first and the second peripheral ports. Thereby the boundary scan data can be routed from the second peripheral bus to the target computing system via a network port at the host computing system.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: February 18, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kamran H Casim, Russ W Herrell, Martin Goldstein
  • Patent number: 8639370
    Abstract: A system includes a computer having a device driver. The device driver includes a detection module to detect an audio input. The device driver includes a selection module to send the audio input to audio hardware after detection of the audio input. The device driver also includes an emulation module to send hardware emulation information to an operating system audio application to replace feedback data received at the device driver from the audio hardware and sent from the device driver to the operating system audio application.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: January 28, 2014
    Assignee: Sigmatel, Inc.
    Inventors: Antonio Torrini, Konstantin Shkolnyy
  • Publication number: 20140025365
    Abstract: System and method for achieving reproducibility of a simulation operation while reasonably keeping an operation speed. A peripheral scheduler clears completion flags of all the peripheral emulators to thereby start parallel operations thereof. Then, based on processing break timing set for the individual peripheral emulators, the peripheral scheduler finds one of the peripheral emulators which is scheduled to reach a processing break at the earliest. The found peripheral emulator is referred to as a peripheral P. In a case where a time of the processing break of the peripheral P is T, the peripheral scheduler continues execution of processor emulators and plant simulators up until a time point of the time T. The peripheral scheduler waits for setting of a completion flag of the peripheral P. In response to the setting, the peripheral scheduler performs data synchronization among the peripheral P, the processor emulators, and the plant simulators.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 23, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kohichi Kajitani, Hideaki Komatsu, Shu Shimizu
  • Patent number: 8626475
    Abstract: Systems and methods for controlling settings of a design system include receiving, via a communications interface, identifying data associated with a multiphysics modeling system. Instructions are transmitted via the communication interface or another interface. The instructions include model settings related to a multiphysics model at least partially residing in the multiphysics modeling system. Model results are received that are at least partially derived from the transmitted model settings. At least a portion of the received model results are displayed in a graphical user interface associated with the design system.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: January 7, 2014
    Assignee: Comsol AB
    Inventors: Eduardo Fontes, Lars Langemyr, Daniel Bertilsson, Anders Forsell, Johan Kannala, Tomas Normark
  • Patent number: 8612633
    Abstract: Techniques for reducing virtual machine input/output emulation overhead and decreasing the attack surface of a virtual machine architecture are disclosed.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: December 17, 2013
    Assignee: Microsoft Corporation
    Inventors: Lawrence R. Cleeton, Andrei Warkentin, Andrew Nicholas, Rene Antonio Vega, Jacob Oshins, John A. Starks
  • Patent number: 8612674
    Abstract: Virtual tape libraries (VTLs) and methods for concurrently accessing a VTL are provided. One VTL includes memory partitioned into multiple volumes, multiple virtual drives, and a processor. The processor is configured to enable multiple applications to concurrently access a virtual storage volume in a first or second access mode. One method includes receiving a first request for a first application to access a virtual storage volume to write data to or read data from the virtual storage volume and granting the first request. The method further includes receiving a second request for a second application to concurrently access the virtual storage volume to write data to or read data from the virtual storage volume, determining if the first and second requests are compatible, and accepting or denying the second request based on the determination. Also provided are physical computer storage mediums including computer code for performing the above method.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: December 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kai A. G. Asher, Howard N. Martin
  • Patent number: 8594991
    Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: November 26, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 8589142
    Abstract: In one embodiment, apparatus are provided, including an embedded device simulation engine, an application run controller, and a status provider. The embedded device simulation engine is provided to simulate, on a computer platform other than a target embedded device, a 3D application authored for the target embedded device. The application run controller is provided to control the manner in which the 3D application is run in the embedded device simulation engine. The status provider is provided to provide, as the 3D application is run in the simulated environment of the embedded device simulation engine, information regarding statuses of 3D icons in the scene or scenes of the 3D application, of animations defined of the 3D icons in the 3D application, and of events occurring that affect the 3D application.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: November 19, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: James Ritts, Baback Elmieh, David L Durnil
  • Patent number: 8582126
    Abstract: A design support method of verifying control on a device of an image forming apparatus registers, in a storage device, trigger information for specifying a content of control to be executed when a start condition for switching the control state of the device is satisfied (S1002). The apparatus then registers, in the storage device, the allowable range of the state change of the device due to control switched when the start condition is satisfied (S1003). The apparatus then verifies whether the state change of the device due to the control switched when the start condition is satisfied falls outside the allowable range, by referring to the operation state of the device which is input through an input unit, and the trigger information registered in the storage device (S1004).
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: November 12, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Ono, Masahiro Serizawa, Hideyuki Ikegami, Akira Morisawa
  • Patent number: 8571848
    Abstract: In a network emulation system of the present invention, a packet transmitted from a user-mode application program is intercepted at a kernel-mode network driver and transferred to a user-mode emulation module to perform emulation, and, thereafter, the corresponding packet is returned to the network driver. The emulation module emulates a network characteristic of a multi-node environment through configuration of virtual network topology. At this time, the emulation module classifies the intercepted packets for each flow, stores the classified packets in a plurality of real queues, stores a virtual packet corresponding to the real packet in a virtual queue, and transfers the virtual packet to a virtual network including a plurality of virtual nodes to emulate the network.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: October 29, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Kwang Sik Shin
  • Patent number: 8538741
    Abstract: A method and apparatus that partitions a single display's viewable area into at least two virtual viewable areas, and emulates the at least two virtual viewable areas as at least two emulated physical displays with an operating system such that the operating system behaves as if interfacing with at least two actual independent physical displays. The method provides the operating system with generated display identification data (such as “EDID”) for each of the emulated physical displays in response to a query from the operating system. The method and apparatus also receive notification of an interrupt (where the interrupt corresponds to the single physical display), and reports to the operating system with at least two sets of interrupt reporting information, corresponding to the at least two emulated physical displays, as if two interrupts were received. The operating system is thereby “faked” into acting as if two physical displays are in operation.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: September 17, 2013
    Assignee: ATI Technologies ULC
    Inventors: Yinan Jiang, Shahriar Pezeshgi, Ming-Wei Chien
  • Patent number: 8532976
    Abstract: To provide an emulator capable of targeting a device capable of accepting connection of an expansion device for expanding a controller connection port to a plurality of controller connection ports. The emulator, targeting a device having at least one controller connection port and capable of accepting connection of an expansion device for expanding the controller connection port to a plurality of controller connection ports so as to accept connection of a plurality of controllers, emulates operation of the targeted device. The emulator assigns port identification information to each of controllers connected via wire or radio, the port identification information indicating to which of a controller connection port of the targeted device and the controller connection ports of the expansion device connected to the device the controller is assumed to be connected. The assigned port identification information is provided to a process for receiving an operation carried out on the controller.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: September 10, 2013
    Assignees: Sony Corporation, Sony Computer Entertainment Inc.
    Inventors: Shinichi Tanaka, Tadayasu Hakamatani, Masaki Higuchi
  • Publication number: 20130226552
    Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.
    Type: Application
    Filed: March 29, 2013
    Publication date: August 29, 2013
    Applicant: Microsoft Corporation
    Inventor: Microsoft Corporation
  • Publication number: 20130218551
    Abstract: A method, apparatus, system, and computer program product for secure server system management. A payload containing system software and/or firmware updates is distributed in an on-demand, secure I/O operation. The I/O operation is performed via a secured communication channel inaccessible by the server operating system to an emulated USB drive. The secure communication channel can be established for the I/O operation only after authenticating the recipient of the payload, and the payload can be protected from access by a potentially-infected server operating system. Furthermore, the payload can be delivered on demand rather than relying on a BIOS update schedule, and the payload can be delivered at speeds of a write operation to a USB drive.
    Type: Application
    Filed: March 21, 2013
    Publication date: August 22, 2013
    Inventors: Palsamy Sakthikumar, Michael A. Rothman, Vincent J. Zimmer, Robert C. Swanson, Mallik Bulusu
  • Patent number: 8515562
    Abstract: A computer based control system including a field network to which field devices equipped with hardware addresses and logical names are to be connected, a control device performing addressing control in relation to the field devices and their logical addresses and a simulation handling device. The simulation handling device has an own logical address, an own hardware address and is capable of obtaining a logical address, as well as possibly a logical name and/or a hardware address of at least one field device involved in the simulation. It notifies the control device that the field device is connected to the field network, detects a control signal directed towards field device addressed using the logical and/or hardware address of this field device and responds to the control signal with simulation results using the same logical and/or hardware address as the source of the response.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: August 20, 2013
    Assignee: ABB Research Ltd.
    Inventor: Kai Hansen
  • Patent number: 8482874
    Abstract: A shingled magnetic recording hard drive is presented to a resource manager of a host device as an emulated device such as one or more optical media, an array of sequential access media, and/or write-once, read-many device. Data targeted for the emulated device is written to the shingled magnetic recording hard drive.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: July 9, 2013
    Assignee: Seagate Technology LLC
    Inventor: Joshua Bartholomew Tinker
  • Patent number: 8484626
    Abstract: A method may include creating an Extensible Markup Language (XML) instruction file based on screen shots of a host system, providing the XML instruction file to a screen scraper program, executing screen scraping operations based on the XML instruction file, and outputting a user interface file based on the screen scraping operations that corresponds to extracted data output from the host system.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 9, 2013
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Sreeramamurthy Nagulu, Sijo Kuriakose
  • Patent number: 8478834
    Abstract: Methods, systems, and products are disclosed for data transfers between nodes in a parallel computer that include: receiving, by an origin DMA on an origin node, a buffer identifier for a buffer containing data for transfer to a target node; sending, by the origin DMA to the target node, a RTS message; transferring, by the origin DMA, a data portion to the target node using a memory FIFO operation that specifies one end of the buffer from which to begin transferring the data; receiving, by the origin DMA, an acknowledgement of the RTS message from the target node; and transferring, by the origin DMA in response to receiving the acknowledgement, any remaining data portion to the target node using a direct put operation that specifies the other end of the buffer from which to begin transferring the data, including initiating the direct put operation without invoking an origin processing core.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventor: Michael A. Blocksome
  • Patent number: 8473263
    Abstract: A system for simulating interdependencies between multiple critical physical infrastructure models includes a first infrastructure data model that models a first physical infrastructure; a second infrastructure data model that models a second physical infrastructure, wherein the second physical infrastructure is a different physical infrastructure from the first physical infrastructure; a simulation engine adapted to automatically produce a change in the second infrastructure data model in response to a change in the first infrastructure data model; a user interface permitting a user to interact with the simulation engine; wherein the user interface and the simulation engine are configured such that the user can disable an element of the first physical infrastructure, and subsequently re-enable the element of the first physical infrastructure; wherein the first infrastructure data model comprises a transport network; and wherein the second infrastructure data model comprises a channel network.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: June 25, 2013
    Inventors: William J. Tolone, Elwood Wray Johnson, Kyle Joseph Thieman, David Wilson, Marc Thomas Calello, Wei-ning Xiang, Andrew Marcellus Stogner, Seok-Won Lee, Michael Russel
  • Patent number: 8468009
    Abstract: A hardware emulator having an emulation unit with a shadow processor is described. The shadow processor is capable of performing an extra look up table (LUT) operation in addition to the LUT operation performed by a processor within the emulation unit. The emulation unit comprises a memory for supplying a first amount of data to a shadow processor register, wherein the shadow processor register stores the first amount of data for later retrieval. The data stored in the shadow processor register function as operands for a truth table stored in the memory and are used to select a function bit out from the memory. The selected function bit out represents a Boolean evaluation of the operands.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: June 18, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Mikhail Bershteyn, Beshara G. Elmufdi
  • Patent number: 8447554
    Abstract: The invention is a turn-key, modular platform, including software and hardware, for testing physical system components such as motors remotely over the Internet. The system allows remote customers to test multiple physical system components under the specific loading conditions of the real-world application. This will provide more detailed and accurate information than what is usually given in the data sheets for system component performance, enabling the user to make a more-reliable decision. With respect to motors, the hardware consists of a torque motor that moves autonomously in xy plane to couple to the individual test motors, through a unique coupling mechanism, and emulate various load profiles on them. Test motors are mounted onto modular fixtures that allow for one-time manual positioning in xyz space.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: May 21, 2013
    Inventors: Mohammed Reza Emami, Michael-Anthony Tedesco
  • Patent number: 8428929
    Abstract: A method, apparatus, system, and computer program product for secure server system management. A payload containing system software and/or firmware updates is distributed in an on-demand, secure I/O operation. The I/O operation is performed via a secured communication channel inaccessible by the server operating system to an emulated USB drive. The secure communication channel can be established for the I/O operation only after authenticating the recipient of the payload, and the payload can be protected from access by a potentially-infected server operating system. Furthermore, the payload can be delivered on demand rather than relying on a BIOS update schedule, and the payload can be delivered at speeds of a write operation to a USB drive.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: April 23, 2013
    Assignee: Intel Corporation
    Inventors: Palsamy Sakthikumar, Michael A. Rothman, Vincent J. Zimmer, Robert C. Swanson, Mallik Bulusu
  • Patent number: 8417774
    Abstract: An apparatus, system, and method are disclosed for a baseboard management controller (BMC) which includes an FPGA with a monitor module for monitoring the operations parameters of a host computer device. In addition, the BMC has a host connector that connects the BMC to the system bus of the host computing device, allowing the BMC access to the computing elements on the host. The host connector has reconfigurable pins with connection configuration controlled by the FPGA. In addition, the BMC has a server with a processor and associated non-volatile memory on board. The operating system provides services to the host computing device and its constituent components, as well as allowing advanced networking and interconnectivity with other BMCs in a management network.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: April 9, 2013
    Assignee: Fusion-IO, Inc.
    Inventors: David Flynn, John Strasser, Jonathan Thatcher
  • Patent number: 8412508
    Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: April 2, 2013
    Assignee: Microsoft Corporation
    Inventor: Georgios Chrysanthakopoulos
  • Patent number: 8406238
    Abstract: A portable electronic device and an image communication method thereof are provided. The portable electronic device includes a display, a processing module and a memory. The processing module provides frame data of a corresponding frame for the display to show, enables the portable electronic device to emulate a virtual storage device under a communication link, and produces image data compliant with a file format according to the frame data of the frame. The memory stores the image data, which can be read through the communication link. The processing module provides a frame data update for the display to show and updates the image data according to the frame data update.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: March 26, 2013
    Assignee: HTC Corporation
    Inventor: Ming-Yu Chen
  • Publication number: 20130073275
    Abstract: An emulator is provided which can enhance the efficiency of setup change of operating conditions for a peripheral circuit of a slave processor by a master processor. The emulator comprises a master processor and a slave processor which configure an emulation processor. The slave processor comprises a predetermined peripheral circuit. In a break state, the slave processor receives control data and a first command from the master processor via a first communication path, and stores the control data in a predetermined storage area according to the first command. When the master processor executes a target program to perform function setup of the predetermined peripheral circuit, the master processor issues a second command to the slave processor via the first communication path, and the slave processor executes the first evaluation control program to set the control data specified by the second command to the peripheral circuit from the storage area.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 21, 2013
    Inventor: Kazuo USUI
  • Patent number: 8401835
    Abstract: In the case of tracing processor activity and generating data streams multiple triggers can be generated at the same time. The issue is further complicated in a protected pipeline where certain locations are considered as in illegal instruction boundary. During those cycles certain information is invalid and cannot be transmitted to the user. Thus a received trace trigger cannot begin. This invention resolves all ambiguities related to multiple triggers so that the user has a known predictable behavior based on the setup of the triggers.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: March 19, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Manisha Agarwala, John M. Johnsen, Lewis Nardini
  • Patent number: 8396696
    Abstract: A circuit is simulated by using distributed computing to obtain a real solution. The circuit may be an entire integrated circuit, portion of an integrated circuit, or a circuit block. A circuit simulation technique of the invention generates a system graph, finds a tree, and partitions the tree into two or more subtrees. The technique identifies global links and local links in the graph. Each subtree may be solved individually using distributed, parallel computing. Using the results for the subtrees, the technique obtains a real solution, branch voltages and currents, for the circuit.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: March 12, 2013
    Assignee: Worldwide Pro Ltd.
    Inventor: William Wai Yan Ho
  • Patent number: 8392169
    Abstract: Generating a virtual CD recorder by using a storage device is proposed. The storage device includes a first data sector for storing auto-run data and a second data sector for storing table of content (TOC) information data. When the storage device is connected to a host, a detecting module of the host detects whether the TOC information data exists in the second sector. When the TOC information data exists or could be accessed, a reading module can read a first disc image file based on the TOC information data. A burning module can record data into a second disc image file and update the TOC information data associated with the second disc image file in the second sector.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: March 5, 2013
    Assignee: Genesys Logic, Inc.
    Inventor: Chi-hung Chiang
  • Patent number: 8385902
    Abstract: The present disclosure relates to a system and method for remotely operating one or more peripheral devices of a wireless device using a server and client architecture. In one aspect, the system may comprise a wireless device that includes a processor, a memory, a peripheral device, and a server adapted to communicate with the peripheral device; and a removable media device that includes a memory, a processor, and a client adapted to communicate with the server of the wireless device. In another aspect, the method may comprise the steps of emulating a hardware interface on a removable media device; mapping a peripheral device of a wireless device to the interface; mapping a processor of the media device to the peripheral device; wrapping and sending hardware commands from a client of the media device to a server of the wireless device; and executing the commands on the peripheral device.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: February 26, 2013
    Assignee: Cassis International Pte Ltd.
    Inventor: Kwang Wee Lee
  • Patent number: 8386228
    Abstract: Provided is a microcomputer simulator capable of quickly dealing with change of a target microcomputer to thereby enable a speedy development of software. The microcomputer simulator is a microcomputer simulator for simulating a microcomputer including therein a CPU and a peripheral circuit of the CPU, and includes a mother board including a CPU for executing application software to be processed by the CPU provided in the microcomputer, and an IO board for executing, at an FPGA thereof, processing of the peripheral circuit provided in the microcomputer and IO processing executed by the CPU provided in the microcomputer. The FPGA includes a common memory portion so that the microcomputer simulator updates data stored in the common memory portion through a communication bus provided between the mother board 10 and the IO board, and causes data to be exchanged between the CPU provided in the mother board and the FPGA.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: February 26, 2013
    Assignee: Fujitsu Ten Limited
    Inventors: Atsushi Yamanaka, Masahiro Maekawa, Kohichi Kanoh, Takashi Higuchi
  • Patent number: 8374842
    Abstract: An access monitoring section (11) obtains access information including an address conforming to an address stored in a monitoring address setting section (10) from an access signal output from a CPU (1) to a peripheral device (3). An access judging section (13) compares the access information received from the access monitoring section (11) and the last access information stored in an access storing section (12), and stores the obtained access information in the access storing section (12) and requests the transmission of an exception generation notification to an exception generating section (14) when the received access information is different from the last access information while excluding the last access information stored in the access storing section (12) from access information to be compared when the received access information is the same as the last access information. By this construction, throughput can be reduced at the time of emulation and the peripheral device can be efficiently emulated.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: February 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Katsushige Amano, Tadao Tanikawa
  • Publication number: 20130030786
    Abstract: Example embodiments disclosed herein relate to emulating an input/output component of a device. The device includes an external connection to connect the device to another device. The device also includes multiple input/output components. One of the input/output components is selected. The selected input/output is emulated for the other device.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Inventors: Irwan Halim, Norman P. Brown, William R. Whipple
  • Patent number: 8364448
    Abstract: A method includes causing a circuit simulator to perform a circuit simulation using circuit data stored in a storage, the circuit data containing a module to be modeled and a circuit for making a change to a clock to be inputted into the module and clock setting data stored in a storage, the clock setting data being intended to, at a predetermined timing, make a change to the clock to be inputted into the module, and storing a result of the circuit simulation in a simulation result data storage; and generating a hidden markov model about input and output signals of the module from values and times of the signals in accordance with a predetermined algorithm, the values and times being contained in the circuit simulation result stored in the simulation result data storage, and storing data about the model in a hidden markov model data storage.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: January 29, 2013
    Assignee: Fujitsu Limited
    Inventor: Yutaka Tamiya
  • Patent number: 8335661
    Abstract: Various methods and systems for scoring applications are disclosed. One method involves generating a baseline measuring a parameter of a computer system. The parameter is related, directly or indirectly, to the energy consumption of the computer system. The method next involves installing and running an application on the computer system. The previously measured parameter is measured with the application running. Next, a score is calculated for the application based on the two measurements. This score indicates how green the application is.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: December 18, 2012
    Assignee: Symantec Operating Corporation
    Inventor: Sourabh Satish
  • Patent number: 8332905
    Abstract: A virtual set-top box (vSTB) for executing a middleware component, designed originally for use with the physical STB, including emulating hardware capabilities of the physical STB to process IPTV content received over a connection for presenting the IPTV content on a display of the electronic device.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: December 11, 2012
    Assignee: EchoStar Advanced Technologies L.L.C.
    Inventors: Geraint Jenkin, Marcus C. Liassides, Jayne L. Gilmour, Christopher G. Hooks, David J. Evans
  • Patent number: 8332203
    Abstract: A system and methods emulate an application executing in real time in a mobile device. The mobile device is emulated in real time using a model running on a processor extrinsic to the mobile device. The model is based on characteristics indicative of performance of the mobile device. The application is executed in real time within the model and the application executing in the model is monitored to determine resource utilization information by the application for the mobile device. The resource utilization information for the mobile device is displayed.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: December 11, 2012
    Assignee: Wapp Tech Corp.
    Inventor: Donavan Paul Poulin
  • Patent number: 8301422
    Abstract: A process for creating a semi-equipment library for a computerized simulator that simulates an electronic system having plural pieces of semi-equipment. The process includes creation of an algorithm representing the respective piece of semi-equipment, the algorithm being in the form of blocks compatible with a simulation language for the simulator. The process includes listing standards that define the piece of semi-equipment and coding the listed standards. The coding includes generating computer code suitable for the simulator and placing the generated computer code in respective ones of the blocks, which are integrated into the semi-equipment library.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: October 30, 2012
    Assignee: Airbus Operations S.A.S.
    Inventors: Alain Baccou, Patrice Marin
  • Patent number: 8296122
    Abstract: An external connection interface emulation method and apparatus of a mobile terminal for exploiting the mobile terminal as a network adaptor of another terminal are provided. The external connection interface emulation apparatus includes a network modem for supporting communication through the mobile communication system; and a controller, which configures the network modem for operating the mobile terminal as an external network adaptor of another terminal or a communication device as it is, according to an input signal. The external connection interface emulation apparatus and method establish a communication link between a WiBro modem and a USB port at the software level making it possible to use the mobile phone as an external modem regardless of whether the WiBro modem and the USB port are compatible or not.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: October 23, 2012
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Sung Guk Na, Rae Jin Uh
  • Patent number: 8266387
    Abstract: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. One or more central processing units are provided with transactional memory hardware that is operable to accelerate virtualization. The transactional memory hardware has a facility to maintain private state, a facility to render memory accesses from other central processing units visible to software, and support for atomic commit of the private state. The transactional memory hardware can be used, for example, to facilitate emulation of precise exception semantics. The private state is operable to enable an emulated state to remain inconsistent with an architectural state and only synchronized on certain boundaries. An optimized sequence of instructions is executed using chunk-accurate simulation to try and achieve a same end effect.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: September 11, 2012
    Assignee: Microsoft Corporation
    Inventors: Martin Taillefer, Darek Mihocka, Bruno Silva